xref: /freebsd/sys/amd64/include/vmm_dev.h (revision fba3cde907930eed2adb8a320524bc250338c729)
1 /*-
2  * Copyright (c) 2011 NetApp, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #ifndef	_VMM_DEV_H_
30 #define	_VMM_DEV_H_
31 
32 #ifdef _KERNEL
33 void	vmmdev_init(void);
34 int	vmmdev_cleanup(void);
35 #endif
36 
37 struct vm_memory_segment {
38 	vm_paddr_t	gpa;	/* in */
39 	size_t		len;
40 	int		wired;
41 };
42 
43 struct vm_register {
44 	int		cpuid;
45 	int		regnum;		/* enum vm_reg_name */
46 	uint64_t	regval;
47 };
48 
49 struct vm_seg_desc {			/* data or code segment */
50 	int		cpuid;
51 	int		regnum;		/* enum vm_reg_name */
52 	struct seg_desc desc;
53 };
54 
55 struct vm_run {
56 	int		cpuid;
57 	uint64_t	rip;		/* start running here */
58 	struct vm_exit	vm_exit;
59 };
60 
61 struct vm_event {
62 	int		cpuid;
63 	enum vm_event_type type;
64 	int		vector;
65 	uint32_t	error_code;
66 	int		error_code_valid;
67 };
68 
69 struct vm_lapic_irq {
70 	int		cpuid;
71 	int		vector;
72 };
73 
74 struct vm_capability {
75 	int		cpuid;
76 	enum vm_cap_type captype;
77 	int		capval;
78 	int		allcpus;
79 };
80 
81 struct vm_pptdev {
82 	int		bus;
83 	int		slot;
84 	int		func;
85 };
86 
87 struct vm_pptdev_mmio {
88 	int		bus;
89 	int		slot;
90 	int		func;
91 	vm_paddr_t	gpa;
92 	vm_paddr_t	hpa;
93 	size_t		len;
94 };
95 
96 struct vm_pptdev_msi {
97 	int		vcpu;
98 	int		bus;
99 	int		slot;
100 	int		func;
101 	int		numvec;		/* 0 means disabled */
102 	int		vector;
103 	int		destcpu;
104 };
105 
106 struct vm_pptdev_msix {
107 	int		vcpu;
108 	int		bus;
109 	int		slot;
110 	int		func;
111 	int		idx;
112 	uint32_t	msg;
113 	uint32_t	vector_control;
114 	uint64_t	addr;
115 };
116 
117 struct vm_nmi {
118 	int		cpuid;
119 };
120 
121 #define	MAX_VM_STATS	64
122 struct vm_stats {
123 	int		cpuid;				/* in */
124 	int		num_entries;			/* out */
125 	struct timeval	tv;
126 	uint64_t	statbuf[MAX_VM_STATS];
127 };
128 
129 struct vm_stat_desc {
130 	int		index;				/* in */
131 	char		desc[128];			/* out */
132 };
133 
134 struct vm_x2apic {
135 	int			cpuid;
136 	enum x2apic_state	state;
137 };
138 
139 struct vm_gpa_pte {
140 	uint64_t	gpa;				/* in */
141 	uint64_t	pte[4];				/* out */
142 	int		ptenum;
143 };
144 
145 enum {
146 	/* general routines */
147 	IOCNUM_ABIVERS = 0,
148 	IOCNUM_RUN = 1,
149 	IOCNUM_SET_CAPABILITY = 2,
150 	IOCNUM_GET_CAPABILITY = 3,
151 
152 	/* memory apis */
153 	IOCNUM_MAP_MEMORY = 10,
154 	IOCNUM_GET_MEMORY_SEG = 11,
155 	IOCNUM_GET_GPA_PMAP = 12,
156 
157 	/* register/state accessors */
158 	IOCNUM_SET_REGISTER = 20,
159 	IOCNUM_GET_REGISTER = 21,
160 	IOCNUM_SET_SEGMENT_DESCRIPTOR = 22,
161 	IOCNUM_GET_SEGMENT_DESCRIPTOR = 23,
162 
163 	/* interrupt injection */
164 	IOCNUM_INJECT_EVENT = 30,
165 	IOCNUM_LAPIC_IRQ = 31,
166 	IOCNUM_INJECT_NMI = 32,
167 
168 	/* PCI pass-thru */
169 	IOCNUM_BIND_PPTDEV = 40,
170 	IOCNUM_UNBIND_PPTDEV = 41,
171 	IOCNUM_MAP_PPTDEV_MMIO = 42,
172 	IOCNUM_PPTDEV_MSI = 43,
173 	IOCNUM_PPTDEV_MSIX = 44,
174 
175 	/* statistics */
176 	IOCNUM_VM_STATS = 50,
177 	IOCNUM_VM_STAT_DESC = 51,
178 
179 	/* kernel device state */
180 	IOCNUM_SET_X2APIC_STATE = 60,
181 	IOCNUM_GET_X2APIC_STATE = 61,
182 };
183 
184 #define	VM_RUN		\
185 	_IOWR('v', IOCNUM_RUN, struct vm_run)
186 #define	VM_MAP_MEMORY	\
187 	_IOWR('v', IOCNUM_MAP_MEMORY, struct vm_memory_segment)
188 #define	VM_GET_MEMORY_SEG \
189 	_IOWR('v', IOCNUM_GET_MEMORY_SEG, struct vm_memory_segment)
190 #define	VM_SET_REGISTER \
191 	_IOW('v', IOCNUM_SET_REGISTER, struct vm_register)
192 #define	VM_GET_REGISTER \
193 	_IOWR('v', IOCNUM_GET_REGISTER, struct vm_register)
194 #define	VM_SET_SEGMENT_DESCRIPTOR \
195 	_IOW('v', IOCNUM_SET_SEGMENT_DESCRIPTOR, struct vm_seg_desc)
196 #define	VM_GET_SEGMENT_DESCRIPTOR \
197 	_IOWR('v', IOCNUM_GET_SEGMENT_DESCRIPTOR, struct vm_seg_desc)
198 #define	VM_INJECT_EVENT	\
199 	_IOW('v', IOCNUM_INJECT_EVENT, struct vm_event)
200 #define	VM_LAPIC_IRQ 		\
201 	_IOW('v', IOCNUM_LAPIC_IRQ, struct vm_lapic_irq)
202 #define	VM_SET_CAPABILITY \
203 	_IOW('v', IOCNUM_SET_CAPABILITY, struct vm_capability)
204 #define	VM_GET_CAPABILITY \
205 	_IOWR('v', IOCNUM_GET_CAPABILITY, struct vm_capability)
206 #define	VM_BIND_PPTDEV \
207 	_IOW('v', IOCNUM_BIND_PPTDEV, struct vm_pptdev)
208 #define	VM_UNBIND_PPTDEV \
209 	_IOW('v', IOCNUM_UNBIND_PPTDEV, struct vm_pptdev)
210 #define	VM_MAP_PPTDEV_MMIO \
211 	_IOW('v', IOCNUM_MAP_PPTDEV_MMIO, struct vm_pptdev_mmio)
212 #define	VM_PPTDEV_MSI \
213 	_IOW('v', IOCNUM_PPTDEV_MSI, struct vm_pptdev_msi)
214 #define	VM_PPTDEV_MSIX \
215 	_IOW('v', IOCNUM_PPTDEV_MSIX, struct vm_pptdev_msix)
216 #define VM_INJECT_NMI \
217 	_IOW('v', IOCNUM_INJECT_NMI, struct vm_nmi)
218 #define	VM_STATS \
219 	_IOWR('v', IOCNUM_VM_STATS, struct vm_stats)
220 #define	VM_STAT_DESC \
221 	_IOWR('v', IOCNUM_VM_STAT_DESC, struct vm_stat_desc)
222 #define	VM_SET_X2APIC_STATE \
223 	_IOW('v', IOCNUM_SET_X2APIC_STATE, struct vm_x2apic)
224 #define	VM_GET_X2APIC_STATE \
225 	_IOWR('v', IOCNUM_GET_X2APIC_STATE, struct vm_x2apic)
226 #define	VM_GET_GPA_PMAP \
227 	_IOWR('v', IOCNUM_GET_GPA_PMAP, struct vm_gpa_pte)
228 #endif
229