xref: /freebsd/sys/amd64/include/vmm_dev.h (revision 864c53ead899f7838cd2e1cca3b485a4a82f5cdc)
1 /*-
2  * Copyright (c) 2011 NetApp, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #ifndef	_VMM_DEV_H_
30 #define	_VMM_DEV_H_
31 
32 #ifdef _KERNEL
33 void	vmmdev_init(void);
34 int	vmmdev_cleanup(void);
35 #endif
36 
37 struct vm_memory_segment {
38 	vm_paddr_t	gpa;	/* in */
39 	size_t		len;
40 	int		wired;
41 };
42 
43 struct vm_register {
44 	int		cpuid;
45 	int		regnum;		/* enum vm_reg_name */
46 	uint64_t	regval;
47 };
48 
49 struct vm_seg_desc {			/* data or code segment */
50 	int		cpuid;
51 	int		regnum;		/* enum vm_reg_name */
52 	struct seg_desc desc;
53 };
54 
55 struct vm_run {
56 	int		cpuid;
57 	uint64_t	rip;		/* start running here */
58 	struct vm_exit	vm_exit;
59 };
60 
61 struct vm_exception {
62 	int		cpuid;
63 	int		vector;
64 	uint32_t	error_code;
65 	int		error_code_valid;
66 };
67 
68 struct vm_lapic_msi {
69 	uint64_t	msg;
70 	uint64_t	addr;
71 };
72 
73 struct vm_lapic_irq {
74 	int		cpuid;
75 	int		vector;
76 };
77 
78 struct vm_ioapic_irq {
79 	int		irq;
80 };
81 
82 struct vm_isa_irq {
83 	int		atpic_irq;
84 	int		ioapic_irq;
85 };
86 
87 struct vm_isa_irq_trigger {
88 	int		atpic_irq;
89 	enum vm_intr_trigger trigger;
90 };
91 
92 struct vm_capability {
93 	int		cpuid;
94 	enum vm_cap_type captype;
95 	int		capval;
96 	int		allcpus;
97 };
98 
99 struct vm_pptdev {
100 	int		bus;
101 	int		slot;
102 	int		func;
103 };
104 
105 struct vm_pptdev_mmio {
106 	int		bus;
107 	int		slot;
108 	int		func;
109 	vm_paddr_t	gpa;
110 	vm_paddr_t	hpa;
111 	size_t		len;
112 };
113 
114 struct vm_pptdev_msi {
115 	int		vcpu;
116 	int		bus;
117 	int		slot;
118 	int		func;
119 	int		numvec;		/* 0 means disabled */
120 	uint64_t	msg;
121 	uint64_t	addr;
122 };
123 
124 struct vm_pptdev_msix {
125 	int		vcpu;
126 	int		bus;
127 	int		slot;
128 	int		func;
129 	int		idx;
130 	uint64_t	msg;
131 	uint32_t	vector_control;
132 	uint64_t	addr;
133 };
134 
135 struct vm_nmi {
136 	int		cpuid;
137 };
138 
139 #define	MAX_VM_STATS	64
140 struct vm_stats {
141 	int		cpuid;				/* in */
142 	int		num_entries;			/* out */
143 	struct timeval	tv;
144 	uint64_t	statbuf[MAX_VM_STATS];
145 };
146 
147 struct vm_stat_desc {
148 	int		index;				/* in */
149 	char		desc[128];			/* out */
150 };
151 
152 struct vm_x2apic {
153 	int			cpuid;
154 	enum x2apic_state	state;
155 };
156 
157 struct vm_gpa_pte {
158 	uint64_t	gpa;				/* in */
159 	uint64_t	pte[4];				/* out */
160 	int		ptenum;
161 };
162 
163 struct vm_hpet_cap {
164 	uint32_t	capabilities;	/* lower 32 bits of HPET capabilities */
165 };
166 
167 struct vm_suspend {
168 	enum vm_suspend_how how;
169 };
170 
171 struct vm_gla2gpa {
172 	int		vcpuid;		/* inputs */
173 	int 		prot;		/* PROT_READ or PROT_WRITE */
174 	uint64_t	gla;
175 	struct vm_guest_paging paging;
176 	int		fault;		/* outputs */
177 	uint64_t	gpa;
178 };
179 
180 struct vm_activate_cpu {
181 	int		vcpuid;
182 };
183 
184 struct vm_cpuset {
185 	int		which;
186 	int		cpusetsize;
187 	cpuset_t	*cpus;
188 };
189 #define	VM_ACTIVE_CPUS		0
190 #define	VM_SUSPENDED_CPUS	1
191 
192 enum {
193 	/* general routines */
194 	IOCNUM_ABIVERS = 0,
195 	IOCNUM_RUN = 1,
196 	IOCNUM_SET_CAPABILITY = 2,
197 	IOCNUM_GET_CAPABILITY = 3,
198 	IOCNUM_SUSPEND = 4,
199 	IOCNUM_REINIT = 5,
200 
201 	/* memory apis */
202 	IOCNUM_MAP_MEMORY = 10,
203 	IOCNUM_GET_MEMORY_SEG = 11,
204 	IOCNUM_GET_GPA_PMAP = 12,
205 	IOCNUM_GLA2GPA = 13,
206 
207 	/* register/state accessors */
208 	IOCNUM_SET_REGISTER = 20,
209 	IOCNUM_GET_REGISTER = 21,
210 	IOCNUM_SET_SEGMENT_DESCRIPTOR = 22,
211 	IOCNUM_GET_SEGMENT_DESCRIPTOR = 23,
212 
213 	/* interrupt injection */
214 	IOCNUM_INJECT_EXCEPTION = 30,
215 	IOCNUM_LAPIC_IRQ = 31,
216 	IOCNUM_INJECT_NMI = 32,
217 	IOCNUM_IOAPIC_ASSERT_IRQ = 33,
218 	IOCNUM_IOAPIC_DEASSERT_IRQ = 34,
219 	IOCNUM_IOAPIC_PULSE_IRQ = 35,
220 	IOCNUM_LAPIC_MSI = 36,
221 	IOCNUM_LAPIC_LOCAL_IRQ = 37,
222 	IOCNUM_IOAPIC_PINCOUNT = 38,
223 
224 	/* PCI pass-thru */
225 	IOCNUM_BIND_PPTDEV = 40,
226 	IOCNUM_UNBIND_PPTDEV = 41,
227 	IOCNUM_MAP_PPTDEV_MMIO = 42,
228 	IOCNUM_PPTDEV_MSI = 43,
229 	IOCNUM_PPTDEV_MSIX = 44,
230 
231 	/* statistics */
232 	IOCNUM_VM_STATS = 50,
233 	IOCNUM_VM_STAT_DESC = 51,
234 
235 	/* kernel device state */
236 	IOCNUM_SET_X2APIC_STATE = 60,
237 	IOCNUM_GET_X2APIC_STATE = 61,
238 	IOCNUM_GET_HPET_CAPABILITIES = 62,
239 
240 	/* legacy interrupt injection */
241 	IOCNUM_ISA_ASSERT_IRQ = 80,
242 	IOCNUM_ISA_DEASSERT_IRQ = 81,
243 	IOCNUM_ISA_PULSE_IRQ = 82,
244 	IOCNUM_ISA_SET_IRQ_TRIGGER = 83,
245 
246 	/* vm_cpuset */
247 	IOCNUM_ACTIVATE_CPU = 90,
248 	IOCNUM_GET_CPUSET = 91,
249 };
250 
251 #define	VM_RUN		\
252 	_IOWR('v', IOCNUM_RUN, struct vm_run)
253 #define	VM_SUSPEND	\
254 	_IOW('v', IOCNUM_SUSPEND, struct vm_suspend)
255 #define	VM_REINIT	\
256 	_IO('v', IOCNUM_REINIT)
257 #define	VM_MAP_MEMORY	\
258 	_IOWR('v', IOCNUM_MAP_MEMORY, struct vm_memory_segment)
259 #define	VM_GET_MEMORY_SEG \
260 	_IOWR('v', IOCNUM_GET_MEMORY_SEG, struct vm_memory_segment)
261 #define	VM_SET_REGISTER \
262 	_IOW('v', IOCNUM_SET_REGISTER, struct vm_register)
263 #define	VM_GET_REGISTER \
264 	_IOWR('v', IOCNUM_GET_REGISTER, struct vm_register)
265 #define	VM_SET_SEGMENT_DESCRIPTOR \
266 	_IOW('v', IOCNUM_SET_SEGMENT_DESCRIPTOR, struct vm_seg_desc)
267 #define	VM_GET_SEGMENT_DESCRIPTOR \
268 	_IOWR('v', IOCNUM_GET_SEGMENT_DESCRIPTOR, struct vm_seg_desc)
269 #define	VM_INJECT_EXCEPTION	\
270 	_IOW('v', IOCNUM_INJECT_EXCEPTION, struct vm_exception)
271 #define	VM_LAPIC_IRQ 		\
272 	_IOW('v', IOCNUM_LAPIC_IRQ, struct vm_lapic_irq)
273 #define	VM_LAPIC_LOCAL_IRQ 	\
274 	_IOW('v', IOCNUM_LAPIC_LOCAL_IRQ, struct vm_lapic_irq)
275 #define	VM_LAPIC_MSI		\
276 	_IOW('v', IOCNUM_LAPIC_MSI, struct vm_lapic_msi)
277 #define	VM_IOAPIC_ASSERT_IRQ	\
278 	_IOW('v', IOCNUM_IOAPIC_ASSERT_IRQ, struct vm_ioapic_irq)
279 #define	VM_IOAPIC_DEASSERT_IRQ	\
280 	_IOW('v', IOCNUM_IOAPIC_DEASSERT_IRQ, struct vm_ioapic_irq)
281 #define	VM_IOAPIC_PULSE_IRQ	\
282 	_IOW('v', IOCNUM_IOAPIC_PULSE_IRQ, struct vm_ioapic_irq)
283 #define	VM_IOAPIC_PINCOUNT	\
284 	_IOR('v', IOCNUM_IOAPIC_PINCOUNT, int)
285 #define	VM_ISA_ASSERT_IRQ	\
286 	_IOW('v', IOCNUM_ISA_ASSERT_IRQ, struct vm_isa_irq)
287 #define	VM_ISA_DEASSERT_IRQ	\
288 	_IOW('v', IOCNUM_ISA_DEASSERT_IRQ, struct vm_isa_irq)
289 #define	VM_ISA_PULSE_IRQ	\
290 	_IOW('v', IOCNUM_ISA_PULSE_IRQ, struct vm_isa_irq)
291 #define	VM_ISA_SET_IRQ_TRIGGER	\
292 	_IOW('v', IOCNUM_ISA_SET_IRQ_TRIGGER, struct vm_isa_irq_trigger)
293 #define	VM_SET_CAPABILITY \
294 	_IOW('v', IOCNUM_SET_CAPABILITY, struct vm_capability)
295 #define	VM_GET_CAPABILITY \
296 	_IOWR('v', IOCNUM_GET_CAPABILITY, struct vm_capability)
297 #define	VM_BIND_PPTDEV \
298 	_IOW('v', IOCNUM_BIND_PPTDEV, struct vm_pptdev)
299 #define	VM_UNBIND_PPTDEV \
300 	_IOW('v', IOCNUM_UNBIND_PPTDEV, struct vm_pptdev)
301 #define	VM_MAP_PPTDEV_MMIO \
302 	_IOW('v', IOCNUM_MAP_PPTDEV_MMIO, struct vm_pptdev_mmio)
303 #define	VM_PPTDEV_MSI \
304 	_IOW('v', IOCNUM_PPTDEV_MSI, struct vm_pptdev_msi)
305 #define	VM_PPTDEV_MSIX \
306 	_IOW('v', IOCNUM_PPTDEV_MSIX, struct vm_pptdev_msix)
307 #define VM_INJECT_NMI \
308 	_IOW('v', IOCNUM_INJECT_NMI, struct vm_nmi)
309 #define	VM_STATS \
310 	_IOWR('v', IOCNUM_VM_STATS, struct vm_stats)
311 #define	VM_STAT_DESC \
312 	_IOWR('v', IOCNUM_VM_STAT_DESC, struct vm_stat_desc)
313 #define	VM_SET_X2APIC_STATE \
314 	_IOW('v', IOCNUM_SET_X2APIC_STATE, struct vm_x2apic)
315 #define	VM_GET_X2APIC_STATE \
316 	_IOWR('v', IOCNUM_GET_X2APIC_STATE, struct vm_x2apic)
317 #define	VM_GET_HPET_CAPABILITIES \
318 	_IOR('v', IOCNUM_GET_HPET_CAPABILITIES, struct vm_hpet_cap)
319 #define	VM_GET_GPA_PMAP \
320 	_IOWR('v', IOCNUM_GET_GPA_PMAP, struct vm_gpa_pte)
321 #define	VM_GLA2GPA	\
322 	_IOWR('v', IOCNUM_GLA2GPA, struct vm_gla2gpa)
323 #define	VM_ACTIVATE_CPU	\
324 	_IOW('v', IOCNUM_ACTIVATE_CPU, struct vm_activate_cpu)
325 #define	VM_GET_CPUS	\
326 	_IOW('v', IOCNUM_GET_CPUSET, struct vm_cpuset)
327 #endif
328