1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _VMM_DEV_H_ 30 #define _VMM_DEV_H_ 31 32 #ifdef _KERNEL 33 void vmmdev_init(void); 34 int vmmdev_cleanup(void); 35 #endif 36 37 struct vm_memory_segment { 38 vm_paddr_t gpa; /* in */ 39 size_t len; 40 int wired; 41 }; 42 43 struct vm_register { 44 int cpuid; 45 int regnum; /* enum vm_reg_name */ 46 uint64_t regval; 47 }; 48 49 struct vm_seg_desc { /* data or code segment */ 50 int cpuid; 51 int regnum; /* enum vm_reg_name */ 52 struct seg_desc desc; 53 }; 54 55 struct vm_run { 56 int cpuid; 57 uint64_t rip; /* start running here */ 58 struct vm_exit vm_exit; 59 }; 60 61 struct vm_event { 62 int cpuid; 63 enum vm_event_type type; 64 int vector; 65 uint32_t error_code; 66 int error_code_valid; 67 }; 68 69 struct vm_lapic_irq { 70 int cpuid; 71 int vector; 72 }; 73 74 struct vm_ioapic_irq { 75 int irq; 76 }; 77 78 struct vm_capability { 79 int cpuid; 80 enum vm_cap_type captype; 81 int capval; 82 int allcpus; 83 }; 84 85 struct vm_pptdev { 86 int bus; 87 int slot; 88 int func; 89 }; 90 91 struct vm_pptdev_mmio { 92 int bus; 93 int slot; 94 int func; 95 vm_paddr_t gpa; 96 vm_paddr_t hpa; 97 size_t len; 98 }; 99 100 struct vm_pptdev_msi { 101 int vcpu; 102 int bus; 103 int slot; 104 int func; 105 int numvec; /* 0 means disabled */ 106 int vector; 107 int destcpu; 108 }; 109 110 struct vm_pptdev_msix { 111 int vcpu; 112 int bus; 113 int slot; 114 int func; 115 int idx; 116 uint32_t msg; 117 uint32_t vector_control; 118 uint64_t addr; 119 }; 120 121 struct vm_nmi { 122 int cpuid; 123 }; 124 125 #define MAX_VM_STATS 64 126 struct vm_stats { 127 int cpuid; /* in */ 128 int num_entries; /* out */ 129 struct timeval tv; 130 uint64_t statbuf[MAX_VM_STATS]; 131 }; 132 133 struct vm_stat_desc { 134 int index; /* in */ 135 char desc[128]; /* out */ 136 }; 137 138 struct vm_x2apic { 139 int cpuid; 140 enum x2apic_state state; 141 }; 142 143 struct vm_gpa_pte { 144 uint64_t gpa; /* in */ 145 uint64_t pte[4]; /* out */ 146 int ptenum; 147 }; 148 149 enum { 150 /* general routines */ 151 IOCNUM_ABIVERS = 0, 152 IOCNUM_RUN = 1, 153 IOCNUM_SET_CAPABILITY = 2, 154 IOCNUM_GET_CAPABILITY = 3, 155 156 /* memory apis */ 157 IOCNUM_MAP_MEMORY = 10, 158 IOCNUM_GET_MEMORY_SEG = 11, 159 IOCNUM_GET_GPA_PMAP = 12, 160 161 /* register/state accessors */ 162 IOCNUM_SET_REGISTER = 20, 163 IOCNUM_GET_REGISTER = 21, 164 IOCNUM_SET_SEGMENT_DESCRIPTOR = 22, 165 IOCNUM_GET_SEGMENT_DESCRIPTOR = 23, 166 167 /* interrupt injection */ 168 IOCNUM_INJECT_EVENT = 30, 169 IOCNUM_LAPIC_IRQ = 31, 170 IOCNUM_INJECT_NMI = 32, 171 IOCNUM_IOAPIC_ASSERT_IRQ = 33, 172 IOCNUM_IOAPIC_DEASSERT_IRQ = 34, 173 IOCNUM_IOAPIC_PULSE_IRQ = 35, 174 175 /* PCI pass-thru */ 176 IOCNUM_BIND_PPTDEV = 40, 177 IOCNUM_UNBIND_PPTDEV = 41, 178 IOCNUM_MAP_PPTDEV_MMIO = 42, 179 IOCNUM_PPTDEV_MSI = 43, 180 IOCNUM_PPTDEV_MSIX = 44, 181 182 /* statistics */ 183 IOCNUM_VM_STATS = 50, 184 IOCNUM_VM_STAT_DESC = 51, 185 186 /* kernel device state */ 187 IOCNUM_SET_X2APIC_STATE = 60, 188 IOCNUM_GET_X2APIC_STATE = 61, 189 }; 190 191 #define VM_RUN \ 192 _IOWR('v', IOCNUM_RUN, struct vm_run) 193 #define VM_MAP_MEMORY \ 194 _IOWR('v', IOCNUM_MAP_MEMORY, struct vm_memory_segment) 195 #define VM_GET_MEMORY_SEG \ 196 _IOWR('v', IOCNUM_GET_MEMORY_SEG, struct vm_memory_segment) 197 #define VM_SET_REGISTER \ 198 _IOW('v', IOCNUM_SET_REGISTER, struct vm_register) 199 #define VM_GET_REGISTER \ 200 _IOWR('v', IOCNUM_GET_REGISTER, struct vm_register) 201 #define VM_SET_SEGMENT_DESCRIPTOR \ 202 _IOW('v', IOCNUM_SET_SEGMENT_DESCRIPTOR, struct vm_seg_desc) 203 #define VM_GET_SEGMENT_DESCRIPTOR \ 204 _IOWR('v', IOCNUM_GET_SEGMENT_DESCRIPTOR, struct vm_seg_desc) 205 #define VM_INJECT_EVENT \ 206 _IOW('v', IOCNUM_INJECT_EVENT, struct vm_event) 207 #define VM_LAPIC_IRQ \ 208 _IOW('v', IOCNUM_LAPIC_IRQ, struct vm_lapic_irq) 209 #define VM_IOAPIC_ASSERT_IRQ \ 210 _IOW('v', IOCNUM_IOAPIC_ASSERT_IRQ, struct vm_ioapic_irq) 211 #define VM_IOAPIC_DEASSERT_IRQ \ 212 _IOW('v', IOCNUM_IOAPIC_DEASSERT_IRQ, struct vm_ioapic_irq) 213 #define VM_IOAPIC_PULSE_IRQ \ 214 _IOW('v', IOCNUM_IOAPIC_PULSE_IRQ, struct vm_ioapic_irq) 215 #define VM_SET_CAPABILITY \ 216 _IOW('v', IOCNUM_SET_CAPABILITY, struct vm_capability) 217 #define VM_GET_CAPABILITY \ 218 _IOWR('v', IOCNUM_GET_CAPABILITY, struct vm_capability) 219 #define VM_BIND_PPTDEV \ 220 _IOW('v', IOCNUM_BIND_PPTDEV, struct vm_pptdev) 221 #define VM_UNBIND_PPTDEV \ 222 _IOW('v', IOCNUM_UNBIND_PPTDEV, struct vm_pptdev) 223 #define VM_MAP_PPTDEV_MMIO \ 224 _IOW('v', IOCNUM_MAP_PPTDEV_MMIO, struct vm_pptdev_mmio) 225 #define VM_PPTDEV_MSI \ 226 _IOW('v', IOCNUM_PPTDEV_MSI, struct vm_pptdev_msi) 227 #define VM_PPTDEV_MSIX \ 228 _IOW('v', IOCNUM_PPTDEV_MSIX, struct vm_pptdev_msix) 229 #define VM_INJECT_NMI \ 230 _IOW('v', IOCNUM_INJECT_NMI, struct vm_nmi) 231 #define VM_STATS \ 232 _IOWR('v', IOCNUM_VM_STATS, struct vm_stats) 233 #define VM_STAT_DESC \ 234 _IOWR('v', IOCNUM_VM_STAT_DESC, struct vm_stat_desc) 235 #define VM_SET_X2APIC_STATE \ 236 _IOW('v', IOCNUM_SET_X2APIC_STATE, struct vm_x2apic) 237 #define VM_GET_X2APIC_STATE \ 238 _IOWR('v', IOCNUM_GET_X2APIC_STATE, struct vm_x2apic) 239 #define VM_GET_GPA_PMAP \ 240 _IOWR('v', IOCNUM_GET_GPA_PMAP, struct vm_gpa_pte) 241 #endif 242