xref: /freebsd/sys/amd64/include/tss.h (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf)
1 /*-
2  * SPDX-License-Identifier: BSD-3-Clause
3  *
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	from: @(#)tss.h	5.4 (Berkeley) 1/18/91
35  */
36 
37 #ifndef _MACHINE_TSS_H_
38 #define _MACHINE_TSS_H_ 1
39 
40 /*
41  * amd64 Context Data Type
42  *
43  * The alignment is pretty messed up here due to reuse of the original 32 bit
44  * fields.  It might be worth trying to set the tss on a +4 byte offset to
45  * make the 64 bit fields aligned in practice.
46  */
47 struct amd64tss {
48 	u_int32_t	tss_rsvd0;
49 	u_int64_t	tss_rsp0 __packed; 	/* kernel stack pointer ring 0 */
50 	u_int64_t	tss_rsp1 __packed; 	/* kernel stack pointer ring 1 */
51 	u_int64_t	tss_rsp2 __packed; 	/* kernel stack pointer ring 2 */
52 	u_int32_t	tss_rsvd1;
53 	u_int32_t	tss_rsvd2;
54 	u_int64_t	tss_ist1 __packed;	/* Interrupt stack table 1 */
55 	u_int64_t	tss_ist2 __packed;	/* Interrupt stack table 2 */
56 	u_int64_t	tss_ist3 __packed;	/* Interrupt stack table 3 */
57 	u_int64_t	tss_ist4 __packed;	/* Interrupt stack table 4 */
58 	u_int64_t	tss_ist5 __packed;	/* Interrupt stack table 5 */
59 	u_int64_t	tss_ist6 __packed;	/* Interrupt stack table 6 */
60 	u_int64_t	tss_ist7 __packed;	/* Interrupt stack table 7 */
61 	u_int32_t	tss_rsvd3;
62 	u_int32_t	tss_rsvd4;
63 	u_int16_t	tss_rsvd5;
64 	u_int16_t	tss_iobase;	/* io bitmap offset */
65 };
66 
67 #endif /* _MACHINE_TSS_H_ */
68