1 /* 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * the Systems Programming Group of the University of Utah Computer 7 * Science Department and William Jolitz of UUNET Technologies Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * Derived from hp300 version by Mike Hibler, this version by William 38 * Jolitz uses a recursive map [a pde points to the page directory] to 39 * map the page tables using the pagetables themselves. This is done to 40 * reduce the impact on kernel virtual memory for lots of sparse address 41 * space, and to reduce the cost of memory to each process. 42 * 43 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90 44 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91 45 * $FreeBSD$ 46 */ 47 48 #ifndef _MACHINE_PMAP_H_ 49 #define _MACHINE_PMAP_H_ 50 51 /* 52 * Page-directory and page-table entires follow this format, with a few 53 * of the fields not present here and there, depending on a lot of things. 54 */ 55 /* ---- Intel Nomenclature ---- */ 56 #define PG_V 0x001 /* P Valid */ 57 #define PG_RW 0x002 /* R/W Read/Write */ 58 #define PG_U 0x004 /* U/S User/Supervisor */ 59 #define PG_NC_PWT 0x008 /* PWT Write through */ 60 #define PG_NC_PCD 0x010 /* PCD Cache disable */ 61 #define PG_A 0x020 /* A Accessed */ 62 #define PG_M 0x040 /* D Dirty */ 63 #define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */ 64 #define PG_G 0x100 /* G Global */ 65 #define PG_AVAIL1 0x200 /* / Available for system */ 66 #define PG_AVAIL2 0x400 /* < programmers use */ 67 #define PG_AVAIL3 0x800 /* \ */ 68 69 70 /* Our various interpretations of the above */ 71 #define PG_W PG_AVAIL1 /* "Wired" pseudoflag */ 72 #define PG_MANAGED PG_AVAIL2 73 #define PG_FRAME (~((vm_paddr_t)PAGE_MASK)) 74 #define PG_PROT (PG_RW|PG_U) /* all protection bits . */ 75 #define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */ 76 77 /* 78 * Page Protection Exception bits 79 */ 80 81 #define PGEX_P 0x01 /* Protection violation vs. not present */ 82 #define PGEX_W 0x02 /* during a Write cycle */ 83 #define PGEX_U 0x04 /* access from User mode (UPL) */ 84 85 /* 86 * Size of Kernel address space. This is the number of level 4 (top) 87 * entries. We use half of them for the kernel due to the 48 bit 88 * virtual address sign extension. 89 */ 90 #define KVA_PAGES 1536 91 92 /* 93 * Pte related macros. This is complicated by having to deal with 94 * the sign extension of the 48th bit. 95 */ 96 #define VADDR_SIGN(l4) \ 97 ((l4) >= NPML4EPG/2 ? ((unsigned long)-1 << 47) : 0ul) 98 #define VADDR(l4, l3, l2, l1) ( \ 99 ((unsigned long)(l4) << PML4SHIFT) | VADDR_SIGN(l4) | \ 100 ((unsigned long)(l3) << PDPSHIFT) | \ 101 ((unsigned long)(l2) << PDRSHIFT) | \ 102 ((unsigned long)(l1) << PAGE_SHIFT)) 103 104 105 #ifndef NKPT 106 #define NKPT 120 /* initial number of kernel page tables */ 107 #endif 108 #ifndef NKPDE 109 #define NKPDE (KVA_PAGES) /* number of page tables/pde's */ 110 #endif 111 112 /* 113 * The *PTDI values control the layout of virtual memory 114 */ 115 #define KPTDI (NPDEPTD-NKPDE) /* start of kernel virtual pde's */ 116 #define PTDPTDI (KPTDI-NPGPTD) /* ptd entry that points to ptd! */ 117 118 /* 119 * XXX doesn't really belong here I guess... 120 */ 121 #define ISA_HOLE_START 0xa0000 122 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START) 123 124 #ifndef LOCORE 125 126 #include <sys/queue.h> 127 128 typedef u_int64_t pd_entry_t; 129 typedef u_int64_t pt_entry_t; 130 typedef u_int64_t pdp_entry_t; 131 typedef u_int64_t pml4_entry_t; 132 133 #define PML4ESHIFT (3) 134 #define PDPESHIFT (3) 135 #define PTESHIFT (3) 136 #define PDESHIFT (3) 137 138 /* 139 * Address of current and alternate address space page table maps 140 * and directories. 141 * XXX it might be saner to just direct map all of physical memory 142 * into the kernel using 2MB pages. We have enough space to do 143 * it (2^47 bits of KVM, while current max physical addressability 144 * is 2^40 physical bits). Then we can get rid of the evil hole 145 * in the page tables and the evil overlapping. 146 */ 147 #ifdef _KERNEL 148 extern pt_entry_t PTmap[]; 149 extern pd_entry_t PDmap[]; 150 extern pdp_entry_t PDPmap[]; 151 extern pml4_entry_t PML4[]; 152 extern pdp_entry_t PDP[]; 153 extern pd_entry_t PTD[]; 154 extern pd_entry_t PTDpde[]; 155 156 extern u_int64_t IdlePML4; /* physical address of "Idle" state directory */ 157 extern u_int64_t IdlePDP; /* physical address of "Idle" state directory */ 158 extern u_int64_t IdlePTD; /* physical address of "Idle" state directory */ 159 #endif 160 161 #ifdef _KERNEL 162 /* 163 * virtual address to page table entry and 164 * to physical address. Likewise for alternate address space. 165 * Note: these work recursively, thus vtopte of a pte will give 166 * the corresponding pde that in turn maps it. 167 */ 168 #define vtopte(va) (PTmap + amd64_btop(va)) 169 170 /* 171 * Routine: pmap_kextract 172 * Function: 173 * Extract the physical page address associated 174 * kernel virtual address. 175 */ 176 static __inline vm_paddr_t 177 pmap_kextract(vm_offset_t va) 178 { 179 vm_paddr_t pa; 180 181 pa = PTD[va >> PDRSHIFT]; 182 if (pa & PG_PS) { 183 pa = (pa & ~(NBPDR - 1)) | (va & (NBPDR - 1)); 184 } else { 185 pa = *vtopte(va); 186 pa = (pa & PG_FRAME) | (va & PAGE_MASK); 187 } 188 return pa; 189 } 190 191 #define vtophys(va) pmap_kextract(((vm_offset_t) (va))) 192 193 static __inline pt_entry_t 194 pte_load(pt_entry_t *ptep) 195 { 196 pt_entry_t r; 197 198 r = *ptep; 199 return (r); 200 } 201 202 static __inline pt_entry_t 203 pte_load_store(pt_entry_t *ptep, pt_entry_t pte) 204 { 205 pt_entry_t r; 206 207 r = *ptep; 208 *ptep = pte; 209 return (r); 210 } 211 212 #define pte_load_clear(pte) atomic_readandclear_long(pte) 213 214 #define pte_clear(ptep) pte_load_store((ptep), (pt_entry_t)0ULL) 215 #define pte_store(ptep, pte) pte_load_store((ptep), (pt_entry_t)pte) 216 217 #define pde_store(pdep, pde) pte_store((pdep), (pde)) 218 219 #endif /* _KERNEL */ 220 221 /* 222 * Pmap stuff 223 */ 224 struct pv_entry; 225 226 struct md_page { 227 int pv_list_count; 228 TAILQ_HEAD(,pv_entry) pv_list; 229 }; 230 231 struct pmap { 232 pd_entry_t *pm_pdir; /* KVA of page directory */ 233 vm_object_t pm_pteobj; /* Container for pte's */ 234 TAILQ_HEAD(,pv_entry) pm_pvlist; /* list of mappings in pmap */ 235 u_long pm_active; /* active on cpus */ 236 struct pmap_statistics pm_stats; /* pmap statistics */ 237 LIST_ENTRY(pmap) pm_list; /* List of all pmaps */ 238 pdp_entry_t *pm_pdp; /* KVA of level 3 page table */ 239 pml4_entry_t *pm_pml4; /* KVA of level 4 page table */ 240 }; 241 242 #define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list)) 243 #define pmap_resident_count(pmap) (pmap)->pm_stats.resident_count 244 245 typedef struct pmap *pmap_t; 246 247 #ifdef _KERNEL 248 extern struct pmap kernel_pmap_store; 249 #define kernel_pmap (&kernel_pmap_store) 250 #endif 251 252 /* 253 * For each vm_page_t, there is a list of all currently valid virtual 254 * mappings of that page. An entry is a pv_entry_t, the list is pv_table. 255 */ 256 typedef struct pv_entry { 257 pmap_t pv_pmap; /* pmap where mapping lies */ 258 vm_offset_t pv_va; /* virtual address for mapping */ 259 TAILQ_ENTRY(pv_entry) pv_list; 260 TAILQ_ENTRY(pv_entry) pv_plist; 261 vm_page_t pv_ptem; /* VM page for pte */ 262 } *pv_entry_t; 263 264 #ifdef _KERNEL 265 266 #define NPPROVMTRR 8 267 #define PPRO_VMTRRphysBase0 0x200 268 #define PPRO_VMTRRphysMask0 0x201 269 struct ppro_vmtrr { 270 u_int64_t base, mask; 271 }; 272 extern struct ppro_vmtrr PPro_vmtrr[NPPROVMTRR]; 273 274 extern caddr_t CADDR1; 275 extern pt_entry_t *CMAP1; 276 extern vm_paddr_t avail_end; 277 extern vm_paddr_t avail_start; 278 extern vm_offset_t clean_eva; 279 extern vm_offset_t clean_sva; 280 extern vm_paddr_t phys_avail[]; 281 extern char *ptvmmap; /* poor name! */ 282 extern vm_offset_t virtual_avail; 283 extern vm_offset_t virtual_end; 284 285 void pmap_bootstrap(vm_paddr_t, vm_paddr_t); 286 void pmap_kenter(vm_offset_t va, vm_paddr_t pa); 287 void pmap_kremove(vm_offset_t); 288 void *pmap_mapdev(vm_paddr_t, vm_size_t); 289 void pmap_unmapdev(vm_offset_t, vm_size_t); 290 pt_entry_t *pmap_pte_quick(pmap_t, vm_offset_t) __pure2; 291 void pmap_invalidate_page(pmap_t, vm_offset_t); 292 void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t); 293 void pmap_invalidate_all(pmap_t); 294 295 #endif /* _KERNEL */ 296 297 #endif /* !LOCORE */ 298 299 #endif /* !_MACHINE_PMAP_H_ */ 300