xref: /freebsd/sys/amd64/include/pcpu.h (revision 98158c753d29521e87113410d95e6fb053d7bb0c)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) Peter Wemm <peter@netplex.com.au>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #ifndef _MACHINE_PCPU_H_
32 #define	_MACHINE_PCPU_H_
33 
34 #ifndef _SYS_CDEFS_H_
35 #error "sys/cdefs.h is a prerequisite for this file"
36 #endif
37 
38 #include <machine/tss.h>
39 
40 #define	PC_PTI_STACK_SZ	16
41 
42 struct monitorbuf {
43 	int idle_state;		/* Used by cpu_idle_mwait. */
44 	int stop_state;		/* Used by cpustop_handler. */
45 	char padding[128 - (2 * sizeof(int))];
46 };
47 _Static_assert(sizeof(struct monitorbuf) == 128, "2x cache line");
48 
49 /*
50  * The SMP parts are setup in pmap.c and locore.s for the BSP, and
51  * mp_machdep.c sets up the data for the AP's to "see" when they awake.
52  * The reason for doing it via a struct is so that an array of pointers
53  * to each CPU's data can be set up for things like "check curproc on all
54  * other processors"
55  */
56 #define	PCPU_MD_FIELDS							\
57 	struct monitorbuf pc_monitorbuf __aligned(128);	/* cache line */\
58 	struct	pcpu *pc_prvspace;	/* Self-reference */		\
59 	struct	pmap *pc_curpmap;					\
60 	struct	amd64tss *pc_tssp;	/* TSS segment active on CPU */	\
61 	void	*pc_pad0;						\
62 	uint64_t pc_kcr3;						\
63 	uint64_t pc_ucr3;						\
64 	uint64_t pc_saved_ucr3;						\
65 	register_t pc_rsp0;						\
66 	register_t pc_scratch_rsp;	/* User %rsp in syscall */	\
67 	register_t pc_scratch_rax;					\
68 	u_int	pc_apic_id;						\
69 	u_int   pc_acpi_id;		/* ACPI CPU id */		\
70 	/* Pointer to the CPU %fs descriptor */				\
71 	struct user_segment_descriptor	*pc_fs32p;			\
72 	/* Pointer to the CPU %gs descriptor */				\
73 	struct user_segment_descriptor	*pc_gs32p;			\
74 	/* Pointer to the CPU LDT descriptor */				\
75 	struct system_segment_descriptor *pc_ldt;			\
76 	/* Pointer to the CPU TSS descriptor */				\
77 	struct system_segment_descriptor *pc_tss;			\
78 	uint64_t	pc_pm_save_cnt;					\
79 	u_int	pc_cmci_mask;		/* MCx banks for CMCI */	\
80 	uint64_t pc_dbreg[16];		/* ddb debugging regs */	\
81 	uint64_t pc_pti_stack[PC_PTI_STACK_SZ];				\
82 	register_t pc_pti_rsp0;						\
83 	int pc_dbreg_cmd;		/* ddb debugging reg cmd */	\
84 	u_int	pc_vcpu_id;		/* Xen vCPU ID */		\
85 	uint32_t pc_pcid_next;						\
86 	uint32_t pc_pcid_gen;						\
87 	uint32_t pc_smp_tlb_done;	/* TLB op acknowledgement */	\
88 	uint32_t pc_ibpb_set;						\
89 	void	*pc_mds_buf;						\
90 	void	*pc_mds_buf64;						\
91 	uint32_t pc_pad[2];						\
92 	uint8_t	pc_mds_tmp[64];						\
93 	u_int 	pc_ipi_bitmap;						\
94 	struct amd64tss pc_common_tss;					\
95 	char	__pad[3068]		/* pad to UMA_PCPU_ALLOC_SIZE */
96 
97 #define	PC_DBREG_CMD_NONE	0
98 #define	PC_DBREG_CMD_LOAD	1
99 
100 #ifdef _KERNEL
101 
102 #define MONITOR_STOPSTATE_RUNNING	0
103 #define MONITOR_STOPSTATE_STOPPED	1
104 
105 #if defined(__GNUCLIKE_ASM) && defined(__GNUCLIKE___TYPEOF)
106 
107 /*
108  * Evaluates to the byte offset of the per-cpu variable name.
109  */
110 #define	__pcpu_offset(name)						\
111 	__offsetof(struct pcpu, name)
112 
113 /*
114  * Evaluates to the type of the per-cpu variable name.
115  */
116 #define	__pcpu_type(name)						\
117 	__typeof(((struct pcpu *)0)->name)
118 
119 /*
120  * Evaluates to the address of the per-cpu variable name.
121  */
122 #define	__PCPU_PTR(name) __extension__ ({				\
123 	__pcpu_type(name) *__p;						\
124 									\
125 	__asm __volatile("movq %%gs:%1,%0; addq %2,%0"			\
126 	    : "=r" (__p)						\
127 	    : "m" (*(struct pcpu *)(__pcpu_offset(pc_prvspace))),	\
128 	      "i" (__pcpu_offset(name)));				\
129 									\
130 	__p;								\
131 })
132 
133 /*
134  * Evaluates to the value of the per-cpu variable name.
135  */
136 #define	__PCPU_GET(name) __extension__ ({				\
137 	__pcpu_type(name) __res;					\
138 	struct __s {							\
139 		u_char	__b[MIN(sizeof(__pcpu_type(name)), 8)];		\
140 	} __s;								\
141 									\
142 	if (sizeof(__res) == 1 || sizeof(__res) == 2 ||			\
143 	    sizeof(__res) == 4 || sizeof(__res) == 8) {			\
144 		__asm __volatile("mov %%gs:%1,%0"			\
145 		    : "=r" (__s)					\
146 		    : "m" (*(struct __s *)(__pcpu_offset(name))));	\
147 		*(struct __s *)(void *)&__res = __s;			\
148 	} else {							\
149 		__res = *__PCPU_PTR(name);				\
150 	}								\
151 	__res;								\
152 })
153 
154 /*
155  * Adds the value to the per-cpu counter name.  The implementation
156  * must be atomic with respect to interrupts.
157  */
158 #define	__PCPU_ADD(name, val) do {					\
159 	__pcpu_type(name) __val;					\
160 	struct __s {							\
161 		u_char	__b[MIN(sizeof(__pcpu_type(name)), 8)];		\
162 	} __s;								\
163 									\
164 	__val = (val);							\
165 	if (sizeof(__val) == 1 || sizeof(__val) == 2 ||			\
166 	    sizeof(__val) == 4 || sizeof(__val) == 8) {			\
167 		__s = *(struct __s *)(void *)&__val;			\
168 		__asm __volatile("add %1,%%gs:%0"			\
169 		    : "=m" (*(struct __s *)(__pcpu_offset(name)))	\
170 		    : "r" (__s));					\
171 	} else								\
172 		*__PCPU_PTR(name) += __val;				\
173 } while (0)
174 
175 /*
176  * Increments the value of the per-cpu counter name.  The implementation
177  * must be atomic with respect to interrupts.
178  */
179 #define	__PCPU_INC(name) do {						\
180 	CTASSERT(sizeof(__pcpu_type(name)) == 1 ||			\
181 	    sizeof(__pcpu_type(name)) == 2 ||				\
182 	    sizeof(__pcpu_type(name)) == 4 ||				\
183 	    sizeof(__pcpu_type(name)) == 8);				\
184 	if (sizeof(__pcpu_type(name)) == 1) {				\
185 		__asm __volatile("incb %%gs:%0"				\
186 		    : "=m" (*(__pcpu_type(name) *)(__pcpu_offset(name)))\
187 		    : "m" (*(__pcpu_type(name) *)(__pcpu_offset(name))));\
188 	} else if (sizeof(__pcpu_type(name)) == 2) {			\
189 		__asm __volatile("incw %%gs:%0"				\
190 		    : "=m" (*(__pcpu_type(name) *)(__pcpu_offset(name)))\
191 		    : "m" (*(__pcpu_type(name) *)(__pcpu_offset(name))));\
192 	} else if (sizeof(__pcpu_type(name)) == 4) {			\
193 		__asm __volatile("incl %%gs:%0"				\
194 		    : "=m" (*(__pcpu_type(name) *)(__pcpu_offset(name)))\
195 		    : "m" (*(__pcpu_type(name) *)(__pcpu_offset(name))));\
196 	} else if (sizeof(__pcpu_type(name)) == 8) {			\
197 		__asm __volatile("incq %%gs:%0"				\
198 		    : "=m" (*(__pcpu_type(name) *)(__pcpu_offset(name)))\
199 		    : "m" (*(__pcpu_type(name) *)(__pcpu_offset(name))));\
200 	}								\
201 } while (0)
202 
203 /*
204  * Sets the value of the per-cpu variable name to value val.
205  */
206 #define	__PCPU_SET(name, val) {						\
207 	__pcpu_type(name) __val;					\
208 	struct __s {							\
209 		u_char	__b[MIN(sizeof(__pcpu_type(name)), 8)];		\
210 	} __s;								\
211 									\
212 	__val = (val);							\
213 	if (sizeof(__val) == 1 || sizeof(__val) == 2 ||			\
214 	    sizeof(__val) == 4 || sizeof(__val) == 8) {			\
215 		__s = *(struct __s *)(void *)&__val;			\
216 		__asm __volatile("mov %1,%%gs:%0"			\
217 		    : "=m" (*(struct __s *)(__pcpu_offset(name)))	\
218 		    : "r" (__s));					\
219 	} else {							\
220 		*__PCPU_PTR(name) = __val;				\
221 	}								\
222 }
223 
224 #define	get_pcpu() __extension__ ({					\
225 	struct pcpu *__pc;						\
226 									\
227 	__asm __volatile("movq %%gs:%1,%0"				\
228 	    : "=r" (__pc)						\
229 	    : "m" (*(struct pcpu *)(__pcpu_offset(pc_prvspace))));	\
230 	__pc;								\
231 })
232 
233 #define	PCPU_GET(member)	__PCPU_GET(pc_ ## member)
234 #define	PCPU_ADD(member, val)	__PCPU_ADD(pc_ ## member, val)
235 #define	PCPU_INC(member)	__PCPU_INC(pc_ ## member)
236 #define	PCPU_PTR(member)	__PCPU_PTR(pc_ ## member)
237 #define	PCPU_SET(member, val)	__PCPU_SET(pc_ ## member, val)
238 
239 #define	IS_BSP()	(PCPU_GET(cpuid) == 0)
240 
241 #else /* !__GNUCLIKE_ASM || !__GNUCLIKE___TYPEOF */
242 
243 #error "this file needs to be ported to your compiler"
244 
245 #endif /* __GNUCLIKE_ASM && __GNUCLIKE___TYPEOF */
246 
247 #endif /* _KERNEL */
248 
249 #endif /* !_MACHINE_PCPU_H_ */
250