xref: /freebsd/sys/amd64/include/ieeefp.h (revision f5147e312f43a9050468de539aeafa072caa1a60)
1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
3  *
4  * Copyright (c) 2003 Peter Wemm.
5  * Copyright (c) 1990 Andrew Moore, Talke Studio
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by the University of
19  *	California, Berkeley and its contributors.
20  * 4. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  * 	from: @(#) ieeefp.h 	1.0 (Berkeley) 9/23/93
37  * $FreeBSD$
38  */
39 
40 #ifndef _MACHINE_IEEEFP_H_
41 #define _MACHINE_IEEEFP_H_
42 
43 /*
44  * Deprecated historical FPU control interface
45  *
46  * IEEE floating point type, constant and function definitions.
47  * XXX: {FP,SSE}*FLD and {FP,SSE}*OFF are undocumented pollution.
48  */
49 
50 #ifndef _SYS_CDEFS_H_
51 #error this file needs sys/cdefs.h as a prerequisite
52 #endif
53 
54 /*
55  * Rounding modes.
56  */
57 typedef enum {
58 	FP_RN=0,	/* round to nearest */
59 	FP_RM,		/* round down towards minus infinity */
60 	FP_RP,		/* round up towards plus infinity */
61 	FP_RZ		/* truncate */
62 } fp_rnd_t;
63 
64 /*
65  * Precision (i.e., rounding precision) modes.
66  */
67 typedef enum {
68 	FP_PS=0,	/* 24 bit (single-precision) */
69 	FP_PRS,		/* reserved */
70 	FP_PD,		/* 53 bit (double-precision) */
71 	FP_PE		/* 64 bit (extended-precision) */
72 } fp_prec_t;
73 
74 #define fp_except_t	int
75 
76 /*
77  * Exception bit masks.
78  */
79 #define FP_X_INV	0x01	/* invalid operation */
80 #define FP_X_DNML	0x02	/* denormal */
81 #define FP_X_DZ		0x04	/* zero divide */
82 #define FP_X_OFL	0x08	/* overflow */
83 #define FP_X_UFL	0x10	/* underflow */
84 #define FP_X_IMP	0x20	/* (im)precision */
85 #define FP_X_STK	0x40	/* stack fault */
86 
87 /*
88  * FPU control word bit-field masks.
89  */
90 #define FP_MSKS_FLD	0x3f	/* exception masks field */
91 #define FP_PRC_FLD	0x300	/* precision control field */
92 #define	FP_RND_FLD	0xc00	/* rounding control field */
93 
94 /*
95  * FPU status word bit-field masks.
96  */
97 #define FP_STKY_FLD	0x3f	/* sticky flags field */
98 
99 /*
100  * SSE mxcsr register bit-field masks.
101  */
102 #define	SSE_STKY_FLD	0x3f	/* exception flags */
103 #define	SSE_DAZ_FLD	0x40	/* Denormals are zero */
104 #define	SSE_MSKS_FLD	0x1f80	/* exception masks field */
105 #define	SSE_RND_FLD	0x6000	/* rounding control */
106 #define	SSE_FZ_FLD	0x8000	/* flush to zero on underflow */
107 
108 /*
109  * FPU control word bit-field offsets (shift counts).
110  */
111 #define FP_MSKS_OFF	0	/* exception masks offset */
112 #define FP_PRC_OFF	8	/* precision control offset */
113 #define	FP_RND_OFF	10	/* rounding control offset */
114 
115 /*
116  * FPU status word bit-field offsets (shift counts).
117  */
118 #define FP_STKY_OFF	0	/* sticky flags offset */
119 
120 /*
121  * SSE mxcsr register bit-field offsets (shift counts).
122  */
123 #define	SSE_STKY_OFF	0	/* exception flags offset */
124 #define	SSE_DAZ_OFF	6	/* DAZ exception mask offset */
125 #define	SSE_MSKS_OFF	7	/* other exception masks offset */
126 #define	SSE_RND_OFF	13	/* rounding control offset */
127 #define	SSE_FZ_OFF	15	/* flush to zero offset */
128 
129 #ifdef __GNUCLIKE_ASM
130 
131 #define	__fldcw(addr)	__asm __volatile("fldcw %0" : : "m" (*(addr)))
132 #define	__fldenv(addr)	__asm __volatile("fldenv %0" : : "m" (*(addr)))
133 #define	__fnstcw(addr)	__asm __volatile("fnstcw %0" : "=m" (*(addr)))
134 #define	__fnstenv(addr)	__asm __volatile("fnstenv %0" : "=m" (*(addr)))
135 #define	__fnstsw(addr)	__asm __volatile("fnstsw %0" : "=m" (*(addr)))
136 #define	__ldmxcsr(addr)	__asm __volatile("ldmxcsr %0" : : "m" (*(addr)))
137 #define	__stmxcsr(addr)	__asm __volatile("stmxcsr %0" : "=m" (*(addr)))
138 
139 /*
140  * Load the control word.  Be careful not to trap if there is a currently
141  * unmasked exception (ones that will become freshly unmasked are not a
142  * problem).  This case must be handled by a save/restore of the
143  * environment or even of the full x87 state.  Accessing the environment
144  * is very inefficient, so only do it when necessary.
145  */
146 static __inline void
147 __fnldcw(unsigned short _cw, unsigned short _newcw)
148 {
149 	struct {
150 		unsigned _cw;
151 		unsigned _other[6];
152 	} _env;
153 	unsigned short _sw;
154 
155 	if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) {
156 		__fnstsw(&_sw);
157 		if (((_sw & ~_cw) & FP_STKY_FLD) != 0) {
158 			__fnstenv(&_env);
159 			_env._cw = _newcw;
160 			__fldenv(&_env);
161 			return;
162 		}
163 	}
164 	__fldcw(&_newcw);
165 }
166 
167 /*
168  * General notes about conflicting SSE vs FP status bits.
169  * This code assumes that software will not fiddle with the control
170  * bits of the SSE and x87 in such a way to get them out of sync and
171  * still expect this to work.  Break this at your peril.
172  * Because I based this on the i386 port, the x87 state is used for
173  * the fpget*() functions, and is shadowed into the SSE state for
174  * the fpset*() functions.  For dual source fpget*() functions, I
175  * merge the two together.  I think.
176  */
177 
178 static __inline fp_rnd_t
179 __fpgetround(void)
180 {
181 	unsigned short _cw;
182 
183 	__fnstcw(&_cw);
184 	return ((fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF));
185 }
186 
187 static __inline fp_rnd_t
188 __fpsetround(fp_rnd_t _m)
189 {
190 	fp_rnd_t _p;
191 	unsigned _mxcsr;
192 	unsigned short _cw, _newcw;
193 
194 	__fnstcw(&_cw);
195 	_p = (fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF);
196 	_newcw = _cw & ~FP_RND_FLD;
197 	_newcw |= (_m << FP_RND_OFF) & FP_RND_FLD;
198 	__fnldcw(_cw, _newcw);
199 	__stmxcsr(&_mxcsr);
200 	_mxcsr &= ~SSE_RND_FLD;
201 	_mxcsr |= (_m << SSE_RND_OFF) & SSE_RND_FLD;
202 	__ldmxcsr(&_mxcsr);
203 	return (_p);
204 }
205 
206 /*
207  * Get or set the rounding precision for x87 arithmetic operations.
208  * There is no equivalent SSE mode or control.
209  */
210 
211 static __inline fp_prec_t
212 __fpgetprec(void)
213 {
214 	unsigned short _cw;
215 
216 	__fnstcw(&_cw);
217 	return ((fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF));
218 }
219 
220 static __inline fp_prec_t
221 __fpsetprec(fp_prec_t _m)
222 {
223 	fp_prec_t _p;
224 	unsigned short _cw, _newcw;
225 
226 	__fnstcw(&_cw);
227 	_p = (fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF);
228 	_newcw = _cw & ~FP_PRC_FLD;
229 	_newcw |= (_m << FP_PRC_OFF) & FP_PRC_FLD;
230 	__fnldcw(_cw, _newcw);
231 	return (_p);
232 }
233 
234 /*
235  * Get or set the exception mask.
236  * Note that the x87 mask bits are inverted by the API -- a mask bit of 1
237  * means disable for x87 and SSE, but for fp*mask() it means enable.
238  */
239 
240 static __inline fp_except_t
241 __fpgetmask(void)
242 {
243 	unsigned short _cw;
244 
245 	__fnstcw(&_cw);
246 	return ((~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF);
247 }
248 
249 static __inline fp_except_t
250 __fpsetmask(fp_except_t _m)
251 {
252 	fp_except_t _p;
253 	unsigned _mxcsr;
254 	unsigned short _cw, _newcw;
255 
256 	__fnstcw(&_cw);
257 	_p = (~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF;
258 	_newcw = _cw & ~FP_MSKS_FLD;
259 	_newcw |= (~_m << FP_MSKS_OFF) & FP_MSKS_FLD;
260 	__fnldcw(_cw, _newcw);
261 	__stmxcsr(&_mxcsr);
262 	/* XXX should we clear non-ieee SSE_DAZ_FLD and SSE_FZ_FLD ? */
263 	_mxcsr &= ~SSE_MSKS_FLD;
264 	_mxcsr |= (~_m << SSE_MSKS_OFF) & SSE_MSKS_FLD;
265 	__ldmxcsr(&_mxcsr);
266 	return (_p);
267 }
268 
269 static __inline fp_except_t
270 __fpgetsticky(void)
271 {
272 	unsigned _ex, _mxcsr;
273 	unsigned short _sw;
274 
275 	__fnstsw(&_sw);
276 	_ex = (_sw & FP_STKY_FLD) >> FP_STKY_OFF;
277 	__stmxcsr(&_mxcsr);
278 	_ex |= (_mxcsr & SSE_STKY_FLD) >> SSE_STKY_OFF;
279 	return ((fp_except_t)_ex);
280 }
281 
282 #endif /* __GNUCLIKE_ASM */
283 
284 #if !defined(__IEEEFP_NOINLINES__) && defined(__GNUCLIKE_ASM)
285 
286 #define	fpgetmask()	__fpgetmask()
287 #define	fpgetprec()	__fpgetprec()
288 #define	fpgetround()	__fpgetround()
289 #define	fpgetsticky()	__fpgetsticky()
290 #define	fpsetmask(m)	__fpsetmask(m)
291 #define	fpsetprec(m)	__fpsetprec(m)
292 #define	fpsetround(m)	__fpsetround(m)
293 
294 #else /* !(!__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM) */
295 
296 /* Augment the userland declarations. */
297 __BEGIN_DECLS
298 extern fp_rnd_t    fpgetround(void);
299 extern fp_rnd_t    fpsetround(fp_rnd_t);
300 extern fp_except_t fpgetmask(void);
301 extern fp_except_t fpsetmask(fp_except_t);
302 extern fp_except_t fpgetsticky(void);
303 extern fp_except_t fpsetsticky(fp_except_t);
304 fp_prec_t	fpgetprec(void);
305 fp_prec_t	fpsetprec(fp_prec_t);
306 __END_DECLS
307 
308 #endif /* !__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM */
309 
310 #endif /* !_MACHINE_IEEEFP_H_ */
311