15b81b6b3SRodney W. Grimes /*- 25b81b6b3SRodney W. Grimes * Copyright (c) 1990 The Regents of the University of California. 35b81b6b3SRodney W. Grimes * All rights reserved. 45b81b6b3SRodney W. Grimes * 55b81b6b3SRodney W. Grimes * This code is derived from software contributed to Berkeley by 65b81b6b3SRodney W. Grimes * William Jolitz. 75b81b6b3SRodney W. Grimes * 85b81b6b3SRodney W. Grimes * Redistribution and use in source and binary forms, with or without 95b81b6b3SRodney W. Grimes * modification, are permitted provided that the following conditions 105b81b6b3SRodney W. Grimes * are met: 115b81b6b3SRodney W. Grimes * 1. Redistributions of source code must retain the above copyright 125b81b6b3SRodney W. Grimes * notice, this list of conditions and the following disclaimer. 135b81b6b3SRodney W. Grimes * 2. Redistributions in binary form must reproduce the above copyright 145b81b6b3SRodney W. Grimes * notice, this list of conditions and the following disclaimer in the 155b81b6b3SRodney W. Grimes * documentation and/or other materials provided with the distribution. 165b81b6b3SRodney W. Grimes * 3. All advertising materials mentioning features or use of this software 175b81b6b3SRodney W. Grimes * must display the following acknowledgement: 185b81b6b3SRodney W. Grimes * This product includes software developed by the University of 195b81b6b3SRodney W. Grimes * California, Berkeley and its contributors. 205b81b6b3SRodney W. Grimes * 4. Neither the name of the University nor the names of its contributors 215b81b6b3SRodney W. Grimes * may be used to endorse or promote products derived from this software 225b81b6b3SRodney W. Grimes * without specific prior written permission. 235b81b6b3SRodney W. Grimes * 245b81b6b3SRodney W. Grimes * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 255b81b6b3SRodney W. Grimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 265b81b6b3SRodney W. Grimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 275b81b6b3SRodney W. Grimes * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 285b81b6b3SRodney W. Grimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 295b81b6b3SRodney W. Grimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 305b81b6b3SRodney W. Grimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 315b81b6b3SRodney W. Grimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 325b81b6b3SRodney W. Grimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 335b81b6b3SRodney W. Grimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 345b81b6b3SRodney W. Grimes * SUCH DAMAGE. 355b81b6b3SRodney W. Grimes * 3634a8ed1bSRodney W. Grimes * from: @(#)npx.h 5.3 (Berkeley) 1/18/91 37a1ca704eSBruce Evans * $Id: npx.h,v 1.5 1994/11/04 02:13:15 jkh Exp $ 385b81b6b3SRodney W. Grimes */ 395b81b6b3SRodney W. Grimes 405b81b6b3SRodney W. Grimes /* 415b81b6b3SRodney W. Grimes * 287/387 NPX Coprocessor Data Structures and Constants 425b81b6b3SRodney W. Grimes * W. Jolitz 1/90 435b81b6b3SRodney W. Grimes */ 445b81b6b3SRodney W. Grimes 45a1ca704eSBruce Evans #ifndef _MACHINE_NPX_H_ 46a1ca704eSBruce Evans #define _MACHINE_NPX_H_ 475b81b6b3SRodney W. Grimes 485b81b6b3SRodney W. Grimes /* Environment information of floating point unit */ 495b81b6b3SRodney W. Grimes struct env87 { 505b81b6b3SRodney W. Grimes long en_cw; /* control word (16bits) */ 515b81b6b3SRodney W. Grimes long en_sw; /* status word (16bits) */ 525b81b6b3SRodney W. Grimes long en_tw; /* tag word (16bits) */ 535b81b6b3SRodney W. Grimes long en_fip; /* floating point instruction pointer */ 545b81b6b3SRodney W. Grimes u_short en_fcs; /* floating code segment selector */ 555b81b6b3SRodney W. Grimes u_short en_opcode; /* opcode last executed (11 bits ) */ 565b81b6b3SRodney W. Grimes long en_foo; /* floating operand offset */ 575b81b6b3SRodney W. Grimes long en_fos; /* floating operand segment selector */ 585b81b6b3SRodney W. Grimes }; 595b81b6b3SRodney W. Grimes 605b81b6b3SRodney W. Grimes /* Contents of each floating point accumulator */ 615b81b6b3SRodney W. Grimes struct fpacc87 { 625b81b6b3SRodney W. Grimes #ifdef dontdef /* too unportable */ 635b81b6b3SRodney W. Grimes u_long fp_mantlo; /* mantissa low (31:0) */ 645b81b6b3SRodney W. Grimes u_long fp_manthi; /* mantissa high (63:32) */ 655b81b6b3SRodney W. Grimes int fp_exp:15; /* exponent */ 665b81b6b3SRodney W. Grimes int fp_sgn:1; /* mantissa sign */ 675b81b6b3SRodney W. Grimes #else 685b81b6b3SRodney W. Grimes u_char fp_bytes[10]; 695b81b6b3SRodney W. Grimes #endif 705b81b6b3SRodney W. Grimes }; 715b81b6b3SRodney W. Grimes 725b81b6b3SRodney W. Grimes /* Floating point context */ 735b81b6b3SRodney W. Grimes struct save87 { 745b81b6b3SRodney W. Grimes struct env87 sv_env; /* floating point control/status */ 755b81b6b3SRodney W. Grimes struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */ 765b81b6b3SRodney W. Grimes u_long sv_ex_sw; /* status word for last exception (was pad) */ 775b81b6b3SRodney W. Grimes u_long sv_ex_tw; /* tag word for last exception (was pad) */ 78021d975dSAndreas Schulz u_char sv_pad[60]; /* needed for the GPL math emulator */ 79021d975dSAndreas Schulz /* the whole length of this structure 80021d975dSAndreas Schulz must match i387_union */ 815b81b6b3SRodney W. Grimes }; 825b81b6b3SRodney W. Grimes 835b81b6b3SRodney W. Grimes /* Cyrix EMC memory - mapped coprocessor context switch information */ 845b81b6b3SRodney W. Grimes struct emcsts { 855b81b6b3SRodney W. Grimes long em_msw; /* memory mapped status register when swtched */ 865b81b6b3SRodney W. Grimes long em_tar; /* memory mapped temp A register when swtched */ 875b81b6b3SRodney W. Grimes long em_dl; /* memory mapped D low register when swtched */ 885b81b6b3SRodney W. Grimes }; 895b81b6b3SRodney W. Grimes 905b81b6b3SRodney W. Grimes /* Intel prefers long real (53 bit) precision */ 915b81b6b3SRodney W. Grimes #define __iBCS_NPXCW__ 0x262 925b81b6b3SRodney W. Grimes /* wfj prefers temporary real (64 bit) precision */ 935b81b6b3SRodney W. Grimes #define __386BSD_NPXCW__ 0x362 945b81b6b3SRodney W. Grimes /* 955b81b6b3SRodney W. Grimes * bde prefers 53 bit precision and all exceptions masked. 965b81b6b3SRodney W. Grimes * 975b81b6b3SRodney W. Grimes * The standard control word from finit is 0x37F, giving: 985b81b6b3SRodney W. Grimes * 995b81b6b3SRodney W. Grimes * round to nearest 1005b81b6b3SRodney W. Grimes * 64-bit precision 1015b81b6b3SRodney W. Grimes * all exceptions masked. 1025b81b6b3SRodney W. Grimes * 1035b81b6b3SRodney W. Grimes * Now I want: 1045b81b6b3SRodney W. Grimes * 1055b81b6b3SRodney W. Grimes * affine mode for 287's (if they work at all) (1 in bitfield 1<<12) 1065b81b6b3SRodney W. Grimes * 53-bit precision (2 in bitfield 3<<8) 1075b81b6b3SRodney W. Grimes * overflow exception unmasked (0 in bitfield 1<<3) 1085b81b6b3SRodney W. Grimes * zero divide exception unmasked (0 in bitfield 1<<2) 1095b81b6b3SRodney W. Grimes * invalid-operand exception unmasked (0 in bitfield 1<<0). 1105b81b6b3SRodney W. Grimes * 1115b81b6b3SRodney W. Grimes * 64-bit precision often gives bad results with high level languages 1125b81b6b3SRodney W. Grimes * because it makes the results of calculations depend on whether 1135b81b6b3SRodney W. Grimes * intermediate values are stored in memory or in FPU registers. 1145b81b6b3SRodney W. Grimes * 1155b81b6b3SRodney W. Grimes * The "Intel" and wfj control words have: 1165b81b6b3SRodney W. Grimes * 1175b81b6b3SRodney W. Grimes * underflow exception unmasked (0 in bitfield 1<<4) 1185b81b6b3SRodney W. Grimes * 1195b81b6b3SRodney W. Grimes * but that causes an unexpected exception in the test program 'paranoia' 1205b81b6b3SRodney W. Grimes * and makes denormals useless (DBL_MIN / 2 underflows). It doesn't make 1215b81b6b3SRodney W. Grimes * a lot of sense to trap underflow without trapping denormals. 1225b81b6b3SRodney W. Grimes * 1235b81b6b3SRodney W. Grimes * Later I will want the IEEE default of all exceptions masked. See the 1245b81b6b3SRodney W. Grimes * 0.0 math manpage for why this is better. The 0.1 math manpage is empty. 1255b81b6b3SRodney W. Grimes */ 1265b81b6b3SRodney W. Grimes #define __BDE_NPXCW__ 0x1272 1275b81b6b3SRodney W. Grimes #define __BETTER_BDE_NPXCW__ 0x127f 1285b81b6b3SRodney W. Grimes 1295b81b6b3SRodney W. Grimes #ifdef __BROKEN_NPXCW__ 130fb59d6abSJordan K. Hubbard #ifdef __FreeBSD__ 1315b81b6b3SRodney W. Grimes #define __INITIAL_NPXCW__ __386BSD_NPXCW__ 1325b81b6b3SRodney W. Grimes #else 1335b81b6b3SRodney W. Grimes #define __INITIAL_NPXCW__ __iBCS_NPXCW__ 1345b81b6b3SRodney W. Grimes #endif 1355b81b6b3SRodney W. Grimes #else 1365b81b6b3SRodney W. Grimes #define __INITIAL_NPXCW__ __BDE_NPXCW__ 1375b81b6b3SRodney W. Grimes #endif 1385b81b6b3SRodney W. Grimes 139a1ca704eSBruce Evans #ifdef KERNEL 140a1ca704eSBruce Evans #include <sys/cdefs.h> 141a1ca704eSBruce Evans #include <machine/frame.h> 142a1ca704eSBruce Evans 143a1ca704eSBruce Evans struct proc; 144a1ca704eSBruce Evans 145a1ca704eSBruce Evans int npxdna __P((void)); 146a1ca704eSBruce Evans void npxexit __P((struct proc *p)); 147a1ca704eSBruce Evans void npxinit __P((u_int control)); 148a1ca704eSBruce Evans void npxintr __P((struct intrframe frame)); 149a1ca704eSBruce Evans void npxsave __P((struct save87 *addr)); 150a1ca704eSBruce Evans #endif 151a1ca704eSBruce Evans 152a1ca704eSBruce Evans #endif /* !_MACHINE_NPX_H_ */ 153