xref: /freebsd/sys/amd64/include/cpufunc.h (revision 39beb93c3f8bdbf72a61fda42300b5ebed7390c8)
1 /*-
2  * Copyright (c) 2003 Peter Wemm.
3  * Copyright (c) 1993 The Regents of the University of California.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 4. Neither the name of the University nor the names of its contributors
15  *    may be used to endorse or promote products derived from this software
16  *    without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * $FreeBSD$
31  */
32 
33 /*
34  * Functions to provide access to special i386 instructions.
35  * This in included in sys/systm.h, and that file should be
36  * used in preference to this.
37  */
38 
39 #ifndef _MACHINE_CPUFUNC_H_
40 #define	_MACHINE_CPUFUNC_H_
41 
42 #ifndef _SYS_CDEFS_H_
43 #error this file needs sys/cdefs.h as a prerequisite
44 #endif
45 
46 struct region_descriptor;
47 
48 #define readb(va)	(*(volatile u_int8_t *) (va))
49 #define readw(va)	(*(volatile u_int16_t *) (va))
50 #define readl(va)	(*(volatile u_int32_t *) (va))
51 #define readq(va)	(*(volatile u_int64_t *) (va))
52 
53 #define writeb(va, d)	(*(volatile u_int8_t *) (va) = (d))
54 #define writew(va, d)	(*(volatile u_int16_t *) (va) = (d))
55 #define writel(va, d)	(*(volatile u_int32_t *) (va) = (d))
56 #define writeq(va, d)	(*(volatile u_int64_t *) (va) = (d))
57 
58 #if defined(__GNUCLIKE_ASM) && defined(__CC_SUPPORTS___INLINE)
59 
60 static __inline void
61 breakpoint(void)
62 {
63 	__asm __volatile("int $3");
64 }
65 
66 static __inline u_int
67 bsfl(u_int mask)
68 {
69 	u_int	result;
70 
71 	__asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
72 	return (result);
73 }
74 
75 static __inline u_long
76 bsfq(u_long mask)
77 {
78 	u_long	result;
79 
80 	__asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask));
81 	return (result);
82 }
83 
84 static __inline u_int
85 bsrl(u_int mask)
86 {
87 	u_int	result;
88 
89 	__asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
90 	return (result);
91 }
92 
93 static __inline u_long
94 bsrq(u_long mask)
95 {
96 	u_long	result;
97 
98 	__asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask));
99 	return (result);
100 }
101 
102 static __inline void
103 disable_intr(void)
104 {
105 	__asm __volatile("cli" : : : "memory");
106 }
107 
108 static __inline void
109 do_cpuid(u_int ax, u_int *p)
110 {
111 	__asm __volatile("cpuid"
112 			 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
113 			 :  "0" (ax));
114 }
115 
116 static __inline void
117 cpuid_count(u_int ax, u_int cx, u_int *p)
118 {
119 	__asm __volatile("cpuid"
120 			 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
121 			 :  "0" (ax), "c" (cx));
122 }
123 
124 static __inline void
125 enable_intr(void)
126 {
127 	__asm __volatile("sti");
128 }
129 
130 #ifdef _KERNEL
131 
132 #define	HAVE_INLINE_FFS
133 #define        ffs(x)  __builtin_ffs(x)
134 
135 #define	HAVE_INLINE_FFSL
136 
137 static __inline int
138 ffsl(long mask)
139 {
140 	return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1);
141 }
142 
143 #define	HAVE_INLINE_FLS
144 
145 static __inline int
146 fls(int mask)
147 {
148 	return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1);
149 }
150 
151 #define	HAVE_INLINE_FLSL
152 
153 static __inline int
154 flsl(long mask)
155 {
156 	return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1);
157 }
158 
159 #endif /* _KERNEL */
160 
161 static __inline void
162 halt(void)
163 {
164 	__asm __volatile("hlt");
165 }
166 
167 #if !defined(__GNUCLIKE_BUILTIN_CONSTANT_P) || __GNUCLIKE_ASM < 3
168 
169 #define	inb(port)		inbv(port)
170 #define	outb(port, data)	outbv(port, data)
171 
172 #else /* __GNUCLIKE_BUILTIN_CONSTANT_P && __GNUCLIKE_ASM >= 3 */
173 
174 /*
175  * The following complications are to get around gcc not having a
176  * constraint letter for the range 0..255.  We still put "d" in the
177  * constraint because "i" isn't a valid constraint when the port
178  * isn't constant.  This only matters for -O0 because otherwise
179  * the non-working version gets optimized away.
180  *
181  * Use an expression-statement instead of a conditional expression
182  * because gcc-2.6.0 would promote the operands of the conditional
183  * and produce poor code for "if ((inb(var) & const1) == const2)".
184  *
185  * The unnecessary test `(port) < 0x10000' is to generate a warning if
186  * the `port' has type u_short or smaller.  Such types are pessimal.
187  * This actually only works for signed types.  The range check is
188  * careful to avoid generating warnings.
189  */
190 #define	inb(port) __extension__ ({					\
191 	u_char	_data;							\
192 	if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100	\
193 	    && (port) < 0x10000)					\
194 		_data = inbc(port);					\
195 	else								\
196 		_data = inbv(port);					\
197 	_data; })
198 
199 #define	outb(port, data) (						\
200 	__builtin_constant_p(port) && ((port) & 0xffff) < 0x100		\
201 	&& (port) < 0x10000						\
202 	? outbc(port, data) : outbv(port, data))
203 
204 static __inline u_char
205 inbc(u_int port)
206 {
207 	u_char	data;
208 
209 	__asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
210 	return (data);
211 }
212 
213 static __inline void
214 outbc(u_int port, u_char data)
215 {
216 	__asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
217 }
218 
219 #endif /* __GNUCLIKE_BUILTIN_CONSTANT_P  && __GNUCLIKE_ASM >= 3*/
220 
221 static __inline u_char
222 inbv(u_int port)
223 {
224 	u_char	data;
225 	/*
226 	 * We use %%dx and not %1 here because i/o is done at %dx and not at
227 	 * %edx, while gcc generates inferior code (movw instead of movl)
228 	 * if we tell it to load (u_short) port.
229 	 */
230 	__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
231 	return (data);
232 }
233 
234 static __inline u_int
235 inl(u_int port)
236 {
237 	u_int	data;
238 
239 	__asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
240 	return (data);
241 }
242 
243 static __inline void
244 insb(u_int port, void *addr, size_t cnt)
245 {
246 	__asm __volatile("cld; rep; insb"
247 			 : "+D" (addr), "+c" (cnt)
248 			 : "d" (port)
249 			 : "memory");
250 }
251 
252 static __inline void
253 insw(u_int port, void *addr, size_t cnt)
254 {
255 	__asm __volatile("cld; rep; insw"
256 			 : "+D" (addr), "+c" (cnt)
257 			 : "d" (port)
258 			 : "memory");
259 }
260 
261 static __inline void
262 insl(u_int port, void *addr, size_t cnt)
263 {
264 	__asm __volatile("cld; rep; insl"
265 			 : "+D" (addr), "+c" (cnt)
266 			 : "d" (port)
267 			 : "memory");
268 }
269 
270 static __inline void
271 invd(void)
272 {
273 	__asm __volatile("invd");
274 }
275 
276 static __inline u_short
277 inw(u_int port)
278 {
279 	u_short	data;
280 
281 	__asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
282 	return (data);
283 }
284 
285 static __inline void
286 outbv(u_int port, u_char data)
287 {
288 	u_char	al;
289 	/*
290 	 * Use an unnecessary assignment to help gcc's register allocator.
291 	 * This make a large difference for gcc-1.40 and a tiny difference
292 	 * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
293 	 * best results.  gcc-2.6.0 can't handle this.
294 	 */
295 	al = data;
296 	__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
297 }
298 
299 static __inline void
300 outl(u_int port, u_int data)
301 {
302 	/*
303 	 * outl() and outw() aren't used much so we haven't looked at
304 	 * possible micro-optimizations such as the unnecessary
305 	 * assignment for them.
306 	 */
307 	__asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
308 }
309 
310 static __inline void
311 outsb(u_int port, const void *addr, size_t cnt)
312 {
313 	__asm __volatile("cld; rep; outsb"
314 			 : "+S" (addr), "+c" (cnt)
315 			 : "d" (port));
316 }
317 
318 static __inline void
319 outsw(u_int port, const void *addr, size_t cnt)
320 {
321 	__asm __volatile("cld; rep; outsw"
322 			 : "+S" (addr), "+c" (cnt)
323 			 : "d" (port));
324 }
325 
326 static __inline void
327 outsl(u_int port, const void *addr, size_t cnt)
328 {
329 	__asm __volatile("cld; rep; outsl"
330 			 : "+S" (addr), "+c" (cnt)
331 			 : "d" (port));
332 }
333 
334 static __inline void
335 outw(u_int port, u_short data)
336 {
337 	__asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
338 }
339 
340 static __inline void
341 ia32_pause(void)
342 {
343 	__asm __volatile("pause");
344 }
345 
346 static __inline u_long
347 read_rflags(void)
348 {
349 	u_long	rf;
350 
351 	__asm __volatile("pushfq; popq %0" : "=r" (rf));
352 	return (rf);
353 }
354 
355 static __inline u_int64_t
356 rdmsr(u_int msr)
357 {
358 	u_int32_t low, high;
359 
360 	__asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr));
361 	return (low | ((u_int64_t)high << 32));
362 }
363 
364 static __inline u_int64_t
365 rdpmc(u_int pmc)
366 {
367 	u_int32_t low, high;
368 
369 	__asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc));
370 	return (low | ((u_int64_t)high << 32));
371 }
372 
373 static __inline u_int64_t
374 rdtsc(void)
375 {
376 	u_int32_t low, high;
377 
378 	__asm __volatile("rdtsc" : "=a" (low), "=d" (high));
379 	return (low | ((u_int64_t)high << 32));
380 }
381 
382 static __inline void
383 wbinvd(void)
384 {
385 	__asm __volatile("wbinvd");
386 }
387 
388 static __inline void
389 write_rflags(u_long rf)
390 {
391 	__asm __volatile("pushq %0;  popfq" : : "r" (rf));
392 }
393 
394 static __inline void
395 wrmsr(u_int msr, u_int64_t newval)
396 {
397 	u_int32_t low, high;
398 
399 	low = newval;
400 	high = newval >> 32;
401 	__asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr));
402 }
403 
404 static __inline void
405 load_cr0(u_long data)
406 {
407 
408 	__asm __volatile("movq %0,%%cr0" : : "r" (data));
409 }
410 
411 static __inline u_long
412 rcr0(void)
413 {
414 	u_long	data;
415 
416 	__asm __volatile("movq %%cr0,%0" : "=r" (data));
417 	return (data);
418 }
419 
420 static __inline u_long
421 rcr2(void)
422 {
423 	u_long	data;
424 
425 	__asm __volatile("movq %%cr2,%0" : "=r" (data));
426 	return (data);
427 }
428 
429 static __inline void
430 load_cr3(u_long data)
431 {
432 
433 	__asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory");
434 }
435 
436 static __inline u_long
437 rcr3(void)
438 {
439 	u_long	data;
440 
441 	__asm __volatile("movq %%cr3,%0" : "=r" (data));
442 	return (data);
443 }
444 
445 static __inline void
446 load_cr4(u_long data)
447 {
448 	__asm __volatile("movq %0,%%cr4" : : "r" (data));
449 }
450 
451 static __inline u_long
452 rcr4(void)
453 {
454 	u_long	data;
455 
456 	__asm __volatile("movq %%cr4,%0" : "=r" (data));
457 	return (data);
458 }
459 
460 /*
461  * Global TLB flush (except for thise for pages marked PG_G)
462  */
463 static __inline void
464 invltlb(void)
465 {
466 
467 	load_cr3(rcr3());
468 }
469 
470 /*
471  * TLB flush for an individual page (even if it has PG_G).
472  * Only works on 486+ CPUs (i386 does not have PG_G).
473  */
474 static __inline void
475 invlpg(u_long addr)
476 {
477 
478 	__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
479 }
480 
481 static __inline u_int
482 rfs(void)
483 {
484 	u_int sel;
485 	__asm __volatile("mov %%fs,%0" : "=rm" (sel));
486 	return (sel);
487 }
488 
489 static __inline u_int
490 rgs(void)
491 {
492 	u_int sel;
493 	__asm __volatile("mov %%gs,%0" : "=rm" (sel));
494 	return (sel);
495 }
496 
497 static __inline u_int
498 rss(void)
499 {
500 	u_int sel;
501 	__asm __volatile("mov %%ss,%0" : "=rm" (sel));
502 	return (sel);
503 }
504 
505 static __inline void
506 load_ds(u_int sel)
507 {
508 	__asm __volatile("mov %0,%%ds" : : "rm" (sel));
509 }
510 
511 static __inline void
512 load_es(u_int sel)
513 {
514 	__asm __volatile("mov %0,%%es" : : "rm" (sel));
515 }
516 
517 static inline void
518 cpu_monitor(const void *addr, int extensions, int hints)
519 {
520 	__asm __volatile("monitor;"
521 	    : :"a" (addr), "c" (extensions), "d"(hints));
522 }
523 
524 static inline void
525 cpu_mwait(int extensions, int hints)
526 {
527 	__asm __volatile("mwait;" : :"a" (hints), "c" (extensions));
528 }
529 
530 #ifdef _KERNEL
531 /* This is defined in <machine/specialreg.h> but is too painful to get to */
532 #ifndef	MSR_FSBASE
533 #define	MSR_FSBASE	0xc0000100
534 #endif
535 static __inline void
536 load_fs(u_int sel)
537 {
538 	register u_int32_t fsbase __asm("ecx");
539 
540 	/* Preserve the fsbase value across the selector load */
541 	fsbase = MSR_FSBASE;
542         __asm __volatile("rdmsr; mov %0,%%fs; wrmsr"
543             : : "rm" (sel), "c" (fsbase) : "eax", "edx");
544 }
545 
546 #ifndef	MSR_GSBASE
547 #define	MSR_GSBASE	0xc0000101
548 #endif
549 static __inline void
550 load_gs(u_int sel)
551 {
552 	register u_int32_t gsbase __asm("ecx");
553 
554 	/*
555 	 * Preserve the gsbase value across the selector load.
556 	 * Note that we have to disable interrupts because the gsbase
557 	 * being trashed happens to be the kernel gsbase at the time.
558 	 */
559 	gsbase = MSR_GSBASE;
560         __asm __volatile("pushfq; cli; rdmsr; mov %0,%%gs; wrmsr; popfq"
561             : : "rm" (sel), "c" (gsbase) : "eax", "edx");
562 }
563 #else
564 /* Usable by userland */
565 static __inline void
566 load_fs(u_int sel)
567 {
568 	__asm __volatile("mov %0,%%fs" : : "rm" (sel));
569 }
570 
571 static __inline void
572 load_gs(u_int sel)
573 {
574 	__asm __volatile("mov %0,%%gs" : : "rm" (sel));
575 }
576 #endif
577 
578 static __inline void
579 lidt(struct region_descriptor *addr)
580 {
581 	__asm __volatile("lidt (%0)" : : "r" (addr));
582 }
583 
584 static __inline void
585 lldt(u_short sel)
586 {
587 	__asm __volatile("lldt %0" : : "r" (sel));
588 }
589 
590 static __inline void
591 ltr(u_short sel)
592 {
593 	__asm __volatile("ltr %0" : : "r" (sel));
594 }
595 
596 static __inline u_int64_t
597 rdr0(void)
598 {
599 	u_int64_t data;
600 	__asm __volatile("movq %%dr0,%0" : "=r" (data));
601 	return (data);
602 }
603 
604 static __inline void
605 load_dr0(u_int64_t dr0)
606 {
607 	__asm __volatile("movq %0,%%dr0" : : "r" (dr0));
608 }
609 
610 static __inline u_int64_t
611 rdr1(void)
612 {
613 	u_int64_t data;
614 	__asm __volatile("movq %%dr1,%0" : "=r" (data));
615 	return (data);
616 }
617 
618 static __inline void
619 load_dr1(u_int64_t dr1)
620 {
621 	__asm __volatile("movq %0,%%dr1" : : "r" (dr1));
622 }
623 
624 static __inline u_int64_t
625 rdr2(void)
626 {
627 	u_int64_t data;
628 	__asm __volatile("movq %%dr2,%0" : "=r" (data));
629 	return (data);
630 }
631 
632 static __inline void
633 load_dr2(u_int64_t dr2)
634 {
635 	__asm __volatile("movq %0,%%dr2" : : "r" (dr2));
636 }
637 
638 static __inline u_int64_t
639 rdr3(void)
640 {
641 	u_int64_t data;
642 	__asm __volatile("movq %%dr3,%0" : "=r" (data));
643 	return (data);
644 }
645 
646 static __inline void
647 load_dr3(u_int64_t dr3)
648 {
649 	__asm __volatile("movq %0,%%dr3" : : "r" (dr3));
650 }
651 
652 static __inline u_int64_t
653 rdr4(void)
654 {
655 	u_int64_t data;
656 	__asm __volatile("movq %%dr4,%0" : "=r" (data));
657 	return (data);
658 }
659 
660 static __inline void
661 load_dr4(u_int64_t dr4)
662 {
663 	__asm __volatile("movq %0,%%dr4" : : "r" (dr4));
664 }
665 
666 static __inline u_int64_t
667 rdr5(void)
668 {
669 	u_int64_t data;
670 	__asm __volatile("movq %%dr5,%0" : "=r" (data));
671 	return (data);
672 }
673 
674 static __inline void
675 load_dr5(u_int64_t dr5)
676 {
677 	__asm __volatile("movq %0,%%dr5" : : "r" (dr5));
678 }
679 
680 static __inline u_int64_t
681 rdr6(void)
682 {
683 	u_int64_t data;
684 	__asm __volatile("movq %%dr6,%0" : "=r" (data));
685 	return (data);
686 }
687 
688 static __inline void
689 load_dr6(u_int64_t dr6)
690 {
691 	__asm __volatile("movq %0,%%dr6" : : "r" (dr6));
692 }
693 
694 static __inline u_int64_t
695 rdr7(void)
696 {
697 	u_int64_t data;
698 	__asm __volatile("movq %%dr7,%0" : "=r" (data));
699 	return (data);
700 }
701 
702 static __inline void
703 load_dr7(u_int64_t dr7)
704 {
705 	__asm __volatile("movq %0,%%dr7" : : "r" (dr7));
706 }
707 
708 static __inline register_t
709 intr_disable(void)
710 {
711 	register_t rflags;
712 
713 	rflags = read_rflags();
714 	disable_intr();
715 	return (rflags);
716 }
717 
718 static __inline void
719 intr_restore(register_t rflags)
720 {
721 	write_rflags(rflags);
722 }
723 
724 #else /* !(__GNUCLIKE_ASM && __CC_SUPPORTS___INLINE) */
725 
726 int	breakpoint(void);
727 u_int	bsfl(u_int mask);
728 u_int	bsrl(u_int mask);
729 void	disable_intr(void);
730 void	do_cpuid(u_int ax, u_int *p);
731 void	enable_intr(void);
732 void	halt(void);
733 void	ia32_pause(void);
734 u_char	inb(u_int port);
735 u_int	inl(u_int port);
736 void	insb(u_int port, void *addr, size_t cnt);
737 void	insl(u_int port, void *addr, size_t cnt);
738 void	insw(u_int port, void *addr, size_t cnt);
739 register_t	intr_disable(void);
740 void	intr_restore(register_t rf);
741 void	invd(void);
742 void	invlpg(u_int addr);
743 void	invltlb(void);
744 u_short	inw(u_int port);
745 void	lidt(struct region_descriptor *addr);
746 void	lldt(u_short sel);
747 void	load_cr0(u_long cr0);
748 void	load_cr3(u_long cr3);
749 void	load_cr4(u_long cr4);
750 void	load_dr0(u_int64_t dr0);
751 void	load_dr1(u_int64_t dr1);
752 void	load_dr2(u_int64_t dr2);
753 void	load_dr3(u_int64_t dr3);
754 void	load_dr4(u_int64_t dr4);
755 void	load_dr5(u_int64_t dr5);
756 void	load_dr6(u_int64_t dr6);
757 void	load_dr7(u_int64_t dr7);
758 void	load_fs(u_int sel);
759 void	load_gs(u_int sel);
760 void	ltr(u_short sel);
761 void	outb(u_int port, u_char data);
762 void	outl(u_int port, u_int data);
763 void	outsb(u_int port, const void *addr, size_t cnt);
764 void	outsl(u_int port, const void *addr, size_t cnt);
765 void	outsw(u_int port, const void *addr, size_t cnt);
766 void	outw(u_int port, u_short data);
767 u_long	rcr0(void);
768 u_long	rcr2(void);
769 u_long	rcr3(void);
770 u_long	rcr4(void);
771 u_int64_t rdmsr(u_int msr);
772 u_int64_t rdpmc(u_int pmc);
773 u_int64_t rdr0(void);
774 u_int64_t rdr1(void);
775 u_int64_t rdr2(void);
776 u_int64_t rdr3(void);
777 u_int64_t rdr4(void);
778 u_int64_t rdr5(void);
779 u_int64_t rdr6(void);
780 u_int64_t rdr7(void);
781 u_int64_t rdtsc(void);
782 u_int	read_rflags(void);
783 u_int	rfs(void);
784 u_int	rgs(void);
785 void	wbinvd(void);
786 void	write_rflags(u_int rf);
787 void	wrmsr(u_int msr, u_int64_t newval);
788 
789 #endif	/* __GNUCLIKE_ASM && __CC_SUPPORTS___INLINE */
790 
791 void	reset_dbregs(void);
792 
793 #ifdef _KERNEL
794 int	rdmsr_safe(u_int msr, uint64_t *val);
795 int	wrmsr_safe(u_int msr, uint64_t newval);
796 #endif
797 
798 #endif /* !_MACHINE_CPUFUNC_H_ */
799