1 /*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1993 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * $FreeBSD$ 35 */ 36 37 /* 38 * Functions to provide access to special i386 instructions. 39 * This in included in sys/systm.h, and that file should be 40 * used in preference to this. 41 */ 42 43 #ifndef _MACHINE_CPUFUNC_H_ 44 #define _MACHINE_CPUFUNC_H_ 45 46 struct region_descriptor; 47 48 #define readb(va) (*(volatile u_int8_t *) (va)) 49 #define readw(va) (*(volatile u_int16_t *) (va)) 50 #define readl(va) (*(volatile u_int32_t *) (va)) 51 #define readq(va) (*(volatile u_int64_t *) (va)) 52 53 #define writeb(va, d) (*(volatile u_int8_t *) (va) = (d)) 54 #define writew(va, d) (*(volatile u_int16_t *) (va) = (d)) 55 #define writel(va, d) (*(volatile u_int32_t *) (va) = (d)) 56 #define writeq(va, d) (*(volatile u_int64_t *) (va) = (d)) 57 58 #ifdef __GNUC__ 59 60 static __inline void 61 breakpoint(void) 62 { 63 __asm __volatile("int $3"); 64 } 65 66 static __inline u_int 67 bsfl(u_int mask) 68 { 69 u_int result; 70 71 __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask)); 72 return (result); 73 } 74 75 static __inline u_long 76 bsfq(u_long mask) 77 { 78 u_long result; 79 80 __asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask)); 81 return (result); 82 } 83 84 static __inline u_int 85 bsrl(u_int mask) 86 { 87 u_int result; 88 89 __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask)); 90 return (result); 91 } 92 93 static __inline u_long 94 bsrq(u_long mask) 95 { 96 u_long result; 97 98 __asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask)); 99 return (result); 100 } 101 102 static __inline void 103 disable_intr(void) 104 { 105 __asm __volatile("cli" : : : "memory"); 106 } 107 108 static __inline void 109 do_cpuid(u_int ax, u_int *p) 110 { 111 __asm __volatile("cpuid" 112 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) 113 : "0" (ax)); 114 } 115 116 static __inline void 117 enable_intr(void) 118 { 119 __asm __volatile("sti"); 120 } 121 122 #ifdef _KERNEL 123 124 #define HAVE_INLINE_FFS 125 126 static __inline int 127 ffs(int mask) 128 { 129 #if 0 130 /* 131 * Note that gcc-2's builtin ffs would be used if we didn't declare 132 * this inline or turn off the builtin. The builtin is faster but 133 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later 134 * versions. 135 */ 136 return (mask == 0 ? mask : (int)bsfl((u_int)mask) + 1); 137 #else 138 /* Actually, the above is way out of date. The builtins use cmov etc */ 139 return (__builtin_ffs(mask)); 140 #endif 141 } 142 143 #define HAVE_INLINE_FFSL 144 145 static __inline int 146 ffsl(long mask) 147 { 148 return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1); 149 } 150 151 #define HAVE_INLINE_FLS 152 153 static __inline int 154 fls(int mask) 155 { 156 return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1); 157 } 158 159 #define HAVE_INLINE_FLSL 160 161 static __inline int 162 flsl(long mask) 163 { 164 return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1); 165 } 166 167 #endif /* _KERNEL */ 168 169 static __inline void 170 halt(void) 171 { 172 __asm __volatile("hlt"); 173 } 174 175 #if __GNUC__ < 2 176 177 #define inb(port) inbv(port) 178 #define outb(port, data) outbv(port, data) 179 180 #else /* __GNUC >= 2 */ 181 182 /* 183 * The following complications are to get around gcc not having a 184 * constraint letter for the range 0..255. We still put "d" in the 185 * constraint because "i" isn't a valid constraint when the port 186 * isn't constant. This only matters for -O0 because otherwise 187 * the non-working version gets optimized away. 188 * 189 * Use an expression-statement instead of a conditional expression 190 * because gcc-2.6.0 would promote the operands of the conditional 191 * and produce poor code for "if ((inb(var) & const1) == const2)". 192 * 193 * The unnecessary test `(port) < 0x10000' is to generate a warning if 194 * the `port' has type u_short or smaller. Such types are pessimal. 195 * This actually only works for signed types. The range check is 196 * careful to avoid generating warnings. 197 */ 198 #define inb(port) __extension__ ({ \ 199 u_char _data; \ 200 if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 201 && (port) < 0x10000) \ 202 _data = inbc(port); \ 203 else \ 204 _data = inbv(port); \ 205 _data; }) 206 207 #define outb(port, data) ( \ 208 __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 209 && (port) < 0x10000 \ 210 ? outbc(port, data) : outbv(port, data)) 211 212 static __inline u_char 213 inbc(u_int port) 214 { 215 u_char data; 216 217 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port))); 218 return (data); 219 } 220 221 static __inline void 222 outbc(u_int port, u_char data) 223 { 224 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port))); 225 } 226 227 #endif /* __GNUC <= 2 */ 228 229 static __inline u_char 230 inbv(u_int port) 231 { 232 u_char data; 233 /* 234 * We use %%dx and not %1 here because i/o is done at %dx and not at 235 * %edx, while gcc generates inferior code (movw instead of movl) 236 * if we tell it to load (u_short) port. 237 */ 238 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 239 return (data); 240 } 241 242 static __inline u_int 243 inl(u_int port) 244 { 245 u_int data; 246 247 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port)); 248 return (data); 249 } 250 251 static __inline void 252 insb(u_int port, void *addr, size_t cnt) 253 { 254 __asm __volatile("cld; rep; insb" 255 : "+D" (addr), "+c" (cnt) 256 : "d" (port) 257 : "memory"); 258 } 259 260 static __inline void 261 insw(u_int port, void *addr, size_t cnt) 262 { 263 __asm __volatile("cld; rep; insw" 264 : "+D" (addr), "+c" (cnt) 265 : "d" (port) 266 : "memory"); 267 } 268 269 static __inline void 270 insl(u_int port, void *addr, size_t cnt) 271 { 272 __asm __volatile("cld; rep; insl" 273 : "+D" (addr), "+c" (cnt) 274 : "d" (port) 275 : "memory"); 276 } 277 278 static __inline void 279 invd(void) 280 { 281 __asm __volatile("invd"); 282 } 283 284 static __inline u_short 285 inw(u_int port) 286 { 287 u_short data; 288 289 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port)); 290 return (data); 291 } 292 293 static __inline void 294 outbv(u_int port, u_char data) 295 { 296 u_char al; 297 /* 298 * Use an unnecessary assignment to help gcc's register allocator. 299 * This make a large difference for gcc-1.40 and a tiny difference 300 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 301 * best results. gcc-2.6.0 can't handle this. 302 */ 303 al = data; 304 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 305 } 306 307 static __inline void 308 outl(u_int port, u_int data) 309 { 310 /* 311 * outl() and outw() aren't used much so we haven't looked at 312 * possible micro-optimizations such as the unnecessary 313 * assignment for them. 314 */ 315 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port)); 316 } 317 318 static __inline void 319 outsb(u_int port, const void *addr, size_t cnt) 320 { 321 __asm __volatile("cld; rep; outsb" 322 : "+S" (addr), "+c" (cnt) 323 : "d" (port)); 324 } 325 326 static __inline void 327 outsw(u_int port, const void *addr, size_t cnt) 328 { 329 __asm __volatile("cld; rep; outsw" 330 : "+S" (addr), "+c" (cnt) 331 : "d" (port)); 332 } 333 334 static __inline void 335 outsl(u_int port, const void *addr, size_t cnt) 336 { 337 __asm __volatile("cld; rep; outsl" 338 : "+S" (addr), "+c" (cnt) 339 : "d" (port)); 340 } 341 342 static __inline void 343 outw(u_int port, u_short data) 344 { 345 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port)); 346 } 347 348 static __inline void 349 ia32_pause(void) 350 { 351 __asm __volatile("pause"); 352 } 353 354 static __inline u_long 355 read_rflags(void) 356 { 357 u_long rf; 358 359 __asm __volatile("pushfq; popq %0" : "=r" (rf)); 360 return (rf); 361 } 362 363 static __inline u_int64_t 364 rdmsr(u_int msr) 365 { 366 u_int32_t low, high; 367 368 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr)); 369 return (low | ((u_int64_t)high << 32)); 370 } 371 372 static __inline u_int64_t 373 rdpmc(u_int pmc) 374 { 375 u_int32_t low, high; 376 377 __asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc)); 378 return (low | ((u_int64_t)high << 32)); 379 } 380 381 static __inline u_int64_t 382 rdtsc(void) 383 { 384 u_int32_t low, high; 385 386 __asm __volatile("rdtsc" : "=a" (low), "=d" (high)); 387 return (low | ((u_int64_t)high << 32)); 388 } 389 390 static __inline void 391 wbinvd(void) 392 { 393 __asm __volatile("wbinvd"); 394 } 395 396 static __inline void 397 write_rflags(u_long rf) 398 { 399 __asm __volatile("pushq %0; popfq" : : "r" (rf)); 400 } 401 402 static __inline void 403 wrmsr(u_int msr, u_int64_t newval) 404 { 405 u_int32_t low, high; 406 407 low = newval; 408 high = newval >> 32; 409 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr)); 410 } 411 412 static __inline void 413 load_cr0(u_long data) 414 { 415 416 __asm __volatile("movq %0,%%cr0" : : "r" (data)); 417 } 418 419 static __inline u_long 420 rcr0(void) 421 { 422 u_long data; 423 424 __asm __volatile("movq %%cr0,%0" : "=r" (data)); 425 return (data); 426 } 427 428 static __inline u_long 429 rcr2(void) 430 { 431 u_long data; 432 433 __asm __volatile("movq %%cr2,%0" : "=r" (data)); 434 return (data); 435 } 436 437 static __inline void 438 load_cr3(u_long data) 439 { 440 441 __asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory"); 442 } 443 444 static __inline u_long 445 rcr3(void) 446 { 447 u_long data; 448 449 __asm __volatile("movq %%cr3,%0" : "=r" (data)); 450 return (data); 451 } 452 453 static __inline void 454 load_cr4(u_long data) 455 { 456 __asm __volatile("movq %0,%%cr4" : : "r" (data)); 457 } 458 459 static __inline u_long 460 rcr4(void) 461 { 462 u_long data; 463 464 __asm __volatile("movq %%cr4,%0" : "=r" (data)); 465 return (data); 466 } 467 468 /* 469 * Global TLB flush (except for thise for pages marked PG_G) 470 */ 471 static __inline void 472 invltlb(void) 473 { 474 475 load_cr3(rcr3()); 476 } 477 478 /* 479 * TLB flush for an individual page (even if it has PG_G). 480 * Only works on 486+ CPUs (i386 does not have PG_G). 481 */ 482 static __inline void 483 invlpg(u_long addr) 484 { 485 486 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory"); 487 } 488 489 static __inline u_int 490 rfs(void) 491 { 492 u_int sel; 493 __asm __volatile("movl %%fs,%0" : "=rm" (sel)); 494 return (sel); 495 } 496 497 static __inline u_int 498 rgs(void) 499 { 500 u_int sel; 501 __asm __volatile("movl %%gs,%0" : "=rm" (sel)); 502 return (sel); 503 } 504 505 static __inline void 506 load_ds(u_int sel) 507 { 508 __asm __volatile("movl %0,%%ds" : : "rm" (sel)); 509 } 510 511 static __inline void 512 load_es(u_int sel) 513 { 514 __asm __volatile("movl %0,%%es" : : "rm" (sel)); 515 } 516 517 #ifdef _KERNEL 518 /* This is defined in <machine/specialreg.h> but is too painful to get to */ 519 #ifndef MSR_FSBASE 520 #define MSR_FSBASE 0xc0000100 521 #endif 522 static __inline void 523 load_fs(u_int sel) 524 { 525 register u_int32_t fsbase __asm("ecx"); 526 527 /* Preserve the fsbase value across the selector load */ 528 fsbase = MSR_FSBASE; 529 __asm __volatile("rdmsr; movl %0,%%fs; wrmsr" 530 : : "rm" (sel), "c" (fsbase) : "eax", "edx"); 531 } 532 533 #ifndef MSR_GSBASE 534 #define MSR_GSBASE 0xc0000101 535 #endif 536 static __inline void 537 load_gs(u_int sel) 538 { 539 register u_int32_t gsbase __asm("ecx"); 540 541 /* 542 * Preserve the gsbase value across the selector load. 543 * Note that we have to disable interrupts because the gsbase 544 * being trashed happens to be the kernel gsbase at the time. 545 */ 546 gsbase = MSR_GSBASE; 547 __asm __volatile("pushfq; cli; rdmsr; movl %0,%%gs; wrmsr; popfq" 548 : : "rm" (sel), "c" (gsbase) : "eax", "edx"); 549 } 550 #else 551 /* Usable by userland */ 552 static __inline void 553 load_fs(u_int sel) 554 { 555 __asm __volatile("movl %0,%%fs" : : "rm" (sel)); 556 } 557 558 static __inline void 559 load_gs(u_int sel) 560 { 561 __asm __volatile("movl %0,%%gs" : : "rm" (sel)); 562 } 563 #endif 564 565 static __inline void 566 lidt(struct region_descriptor *addr) 567 { 568 __asm __volatile("lidt (%0)" : : "r" (addr)); 569 } 570 571 static __inline void 572 lldt(u_short sel) 573 { 574 __asm __volatile("lldt %0" : : "r" (sel)); 575 } 576 577 static __inline void 578 ltr(u_short sel) 579 { 580 __asm __volatile("ltr %0" : : "r" (sel)); 581 } 582 583 static __inline u_int64_t 584 rdr0(void) 585 { 586 u_int64_t data; 587 __asm __volatile("movq %%dr0,%0" : "=r" (data)); 588 return (data); 589 } 590 591 static __inline void 592 load_dr0(u_int64_t dr0) 593 { 594 __asm __volatile("movq %0,%%dr0" : : "r" (dr0)); 595 } 596 597 static __inline u_int64_t 598 rdr1(void) 599 { 600 u_int64_t data; 601 __asm __volatile("movq %%dr1,%0" : "=r" (data)); 602 return (data); 603 } 604 605 static __inline void 606 load_dr1(u_int64_t dr1) 607 { 608 __asm __volatile("movq %0,%%dr1" : : "r" (dr1)); 609 } 610 611 static __inline u_int64_t 612 rdr2(void) 613 { 614 u_int64_t data; 615 __asm __volatile("movq %%dr2,%0" : "=r" (data)); 616 return (data); 617 } 618 619 static __inline void 620 load_dr2(u_int64_t dr2) 621 { 622 __asm __volatile("movq %0,%%dr2" : : "r" (dr2)); 623 } 624 625 static __inline u_int64_t 626 rdr3(void) 627 { 628 u_int64_t data; 629 __asm __volatile("movq %%dr3,%0" : "=r" (data)); 630 return (data); 631 } 632 633 static __inline void 634 load_dr3(u_int64_t dr3) 635 { 636 __asm __volatile("movq %0,%%dr3" : : "r" (dr3)); 637 } 638 639 static __inline u_int64_t 640 rdr4(void) 641 { 642 u_int64_t data; 643 __asm __volatile("movq %%dr4,%0" : "=r" (data)); 644 return (data); 645 } 646 647 static __inline void 648 load_dr4(u_int64_t dr4) 649 { 650 __asm __volatile("movq %0,%%dr4" : : "r" (dr4)); 651 } 652 653 static __inline u_int64_t 654 rdr5(void) 655 { 656 u_int64_t data; 657 __asm __volatile("movq %%dr5,%0" : "=r" (data)); 658 return (data); 659 } 660 661 static __inline void 662 load_dr5(u_int64_t dr5) 663 { 664 __asm __volatile("movq %0,%%dr5" : : "r" (dr5)); 665 } 666 667 static __inline u_int64_t 668 rdr6(void) 669 { 670 u_int64_t data; 671 __asm __volatile("movq %%dr6,%0" : "=r" (data)); 672 return (data); 673 } 674 675 static __inline void 676 load_dr6(u_int64_t dr6) 677 { 678 __asm __volatile("movq %0,%%dr6" : : "r" (dr6)); 679 } 680 681 static __inline u_int64_t 682 rdr7(void) 683 { 684 u_int64_t data; 685 __asm __volatile("movq %%dr7,%0" : "=r" (data)); 686 return (data); 687 } 688 689 static __inline void 690 load_dr7(u_int64_t dr7) 691 { 692 __asm __volatile("movq %0,%%dr7" : : "r" (dr7)); 693 } 694 695 static __inline register_t 696 intr_disable(void) 697 { 698 register_t rflags; 699 700 rflags = read_rflags(); 701 disable_intr(); 702 return (rflags); 703 } 704 705 static __inline void 706 intr_restore(register_t rflags) 707 { 708 write_rflags(rflags); 709 } 710 711 #else /* !__GNUC__ */ 712 713 int breakpoint(void); 714 u_int bsfl(u_int mask); 715 u_int bsrl(u_int mask); 716 void disable_intr(void); 717 void do_cpuid(u_int ax, u_int *p); 718 void enable_intr(void); 719 void halt(void); 720 void ia32_pause(void); 721 u_char inb(u_int port); 722 u_int inl(u_int port); 723 void insb(u_int port, void *addr, size_t cnt); 724 void insl(u_int port, void *addr, size_t cnt); 725 void insw(u_int port, void *addr, size_t cnt); 726 register_t intr_disable(void); 727 void intr_restore(register_t rf); 728 void invd(void); 729 void invlpg(u_int addr); 730 void invltlb(void); 731 u_short inw(u_int port); 732 void lidt(struct region_descriptor *addr); 733 void lldt(u_short sel); 734 void load_cr0(u_long cr0); 735 void load_cr3(u_long cr3); 736 void load_cr4(u_long cr4); 737 void load_dr0(u_int64_t dr0); 738 void load_dr1(u_int64_t dr1); 739 void load_dr2(u_int64_t dr2); 740 void load_dr3(u_int64_t dr3); 741 void load_dr4(u_int64_t dr4); 742 void load_dr5(u_int64_t dr5); 743 void load_dr6(u_int64_t dr6); 744 void load_dr7(u_int64_t dr7); 745 void load_fs(u_int sel); 746 void load_gs(u_int sel); 747 void ltr(u_short sel); 748 void outb(u_int port, u_char data); 749 void outl(u_int port, u_int data); 750 void outsb(u_int port, const void *addr, size_t cnt); 751 void outsl(u_int port, const void *addr, size_t cnt); 752 void outsw(u_int port, const void *addr, size_t cnt); 753 void outw(u_int port, u_short data); 754 u_long rcr0(void); 755 u_long rcr2(void); 756 u_long rcr3(void); 757 u_long rcr4(void); 758 u_int64_t rdmsr(u_int msr); 759 u_int64_t rdpmc(u_int pmc); 760 u_int64_t rdr0(void); 761 u_int64_t rdr1(void); 762 u_int64_t rdr2(void); 763 u_int64_t rdr3(void); 764 u_int64_t rdr4(void); 765 u_int64_t rdr5(void); 766 u_int64_t rdr6(void); 767 u_int64_t rdr7(void); 768 u_int64_t rdtsc(void); 769 u_int read_rflags(void); 770 u_int rfs(void); 771 u_int rgs(void); 772 void wbinvd(void); 773 void write_rflags(u_int rf); 774 void wrmsr(u_int msr, u_int64_t newval); 775 776 #endif /* __GNUC__ */ 777 778 void reset_dbregs(void); 779 780 #endif /* !_MACHINE_CPUFUNC_H_ */ 781