1 /*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1993 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 4. Neither the name of the University nor the names of its contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 /* 34 * Functions to provide access to special i386 instructions. 35 * This in included in sys/systm.h, and that file should be 36 * used in preference to this. 37 */ 38 39 #ifndef _MACHINE_CPUFUNC_H_ 40 #define _MACHINE_CPUFUNC_H_ 41 42 #ifndef _SYS_CDEFS_H_ 43 #error this file needs sys/cdefs.h as a prerequisite 44 #endif 45 46 struct region_descriptor; 47 48 #define readb(va) (*(volatile uint8_t *) (va)) 49 #define readw(va) (*(volatile uint16_t *) (va)) 50 #define readl(va) (*(volatile uint32_t *) (va)) 51 #define readq(va) (*(volatile uint64_t *) (va)) 52 53 #define writeb(va, d) (*(volatile uint8_t *) (va) = (d)) 54 #define writew(va, d) (*(volatile uint16_t *) (va) = (d)) 55 #define writel(va, d) (*(volatile uint32_t *) (va) = (d)) 56 #define writeq(va, d) (*(volatile uint64_t *) (va) = (d)) 57 58 #if defined(__GNUCLIKE_ASM) && defined(__CC_SUPPORTS___INLINE) 59 60 static __inline void 61 breakpoint(void) 62 { 63 __asm __volatile("int $3"); 64 } 65 66 static __inline u_int 67 bsfl(u_int mask) 68 { 69 u_int result; 70 71 __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask)); 72 return (result); 73 } 74 75 static __inline u_long 76 bsfq(u_long mask) 77 { 78 u_long result; 79 80 __asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask)); 81 return (result); 82 } 83 84 static __inline u_int 85 bsrl(u_int mask) 86 { 87 u_int result; 88 89 __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask)); 90 return (result); 91 } 92 93 static __inline u_long 94 bsrq(u_long mask) 95 { 96 u_long result; 97 98 __asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask)); 99 return (result); 100 } 101 102 static __inline void 103 clflush(u_long addr) 104 { 105 106 __asm __volatile("clflush %0" : : "m" (*(char *)addr)); 107 } 108 109 static __inline void 110 disable_intr(void) 111 { 112 __asm __volatile("cli" : : : "memory"); 113 } 114 115 static __inline void 116 do_cpuid(u_int ax, u_int *p) 117 { 118 __asm __volatile("cpuid" 119 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) 120 : "0" (ax)); 121 } 122 123 static __inline void 124 cpuid_count(u_int ax, u_int cx, u_int *p) 125 { 126 __asm __volatile("cpuid" 127 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) 128 : "0" (ax), "c" (cx)); 129 } 130 131 static __inline void 132 enable_intr(void) 133 { 134 __asm __volatile("sti"); 135 } 136 137 #ifdef _KERNEL 138 139 #define HAVE_INLINE_FFS 140 #define ffs(x) __builtin_ffs(x) 141 142 #define HAVE_INLINE_FFSL 143 144 static __inline int 145 ffsl(long mask) 146 { 147 return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1); 148 } 149 150 #define HAVE_INLINE_FLS 151 152 static __inline int 153 fls(int mask) 154 { 155 return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1); 156 } 157 158 #define HAVE_INLINE_FLSL 159 160 static __inline int 161 flsl(long mask) 162 { 163 return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1); 164 } 165 166 #endif /* _KERNEL */ 167 168 static __inline void 169 halt(void) 170 { 171 __asm __volatile("hlt"); 172 } 173 174 static __inline u_char 175 inb(u_int port) 176 { 177 u_char data; 178 179 __asm __volatile("inb %w1, %0" : "=a" (data) : "Nd" (port)); 180 return (data); 181 } 182 183 static __inline u_int 184 inl(u_int port) 185 { 186 u_int data; 187 188 __asm __volatile("inl %w1, %0" : "=a" (data) : "Nd" (port)); 189 return (data); 190 } 191 192 static __inline void 193 insb(u_int port, void *addr, size_t count) 194 { 195 __asm __volatile("cld; rep; insb" 196 : "+D" (addr), "+c" (count) 197 : "d" (port) 198 : "memory"); 199 } 200 201 static __inline void 202 insw(u_int port, void *addr, size_t count) 203 { 204 __asm __volatile("cld; rep; insw" 205 : "+D" (addr), "+c" (count) 206 : "d" (port) 207 : "memory"); 208 } 209 210 static __inline void 211 insl(u_int port, void *addr, size_t count) 212 { 213 __asm __volatile("cld; rep; insl" 214 : "+D" (addr), "+c" (count) 215 : "d" (port) 216 : "memory"); 217 } 218 219 static __inline void 220 invd(void) 221 { 222 __asm __volatile("invd"); 223 } 224 225 static __inline u_short 226 inw(u_int port) 227 { 228 u_short data; 229 230 __asm __volatile("inw %w1, %0" : "=a" (data) : "Nd" (port)); 231 return (data); 232 } 233 234 static __inline void 235 outb(u_int port, u_char data) 236 { 237 __asm __volatile("outb %0, %w1" : : "a" (data), "Nd" (port)); 238 } 239 240 static __inline void 241 outl(u_int port, u_int data) 242 { 243 __asm __volatile("outl %0, %w1" : : "a" (data), "Nd" (port)); 244 } 245 246 static __inline void 247 outsb(u_int port, const void *addr, size_t count) 248 { 249 __asm __volatile("cld; rep; outsb" 250 : "+S" (addr), "+c" (count) 251 : "d" (port)); 252 } 253 254 static __inline void 255 outsw(u_int port, const void *addr, size_t count) 256 { 257 __asm __volatile("cld; rep; outsw" 258 : "+S" (addr), "+c" (count) 259 : "d" (port)); 260 } 261 262 static __inline void 263 outsl(u_int port, const void *addr, size_t count) 264 { 265 __asm __volatile("cld; rep; outsl" 266 : "+S" (addr), "+c" (count) 267 : "d" (port)); 268 } 269 270 static __inline void 271 outw(u_int port, u_short data) 272 { 273 __asm __volatile("outw %0, %w1" : : "a" (data), "Nd" (port)); 274 } 275 276 static __inline void 277 mfence(void) 278 { 279 280 __asm __volatile("mfence" : : : "memory"); 281 } 282 283 static __inline void 284 ia32_pause(void) 285 { 286 __asm __volatile("pause"); 287 } 288 289 static __inline u_long 290 read_rflags(void) 291 { 292 u_long rf; 293 294 __asm __volatile("pushfq; popq %0" : "=r" (rf)); 295 return (rf); 296 } 297 298 static __inline uint64_t 299 rdmsr(u_int msr) 300 { 301 uint32_t low, high; 302 303 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr)); 304 return (low | ((uint64_t)high << 32)); 305 } 306 307 static __inline uint64_t 308 rdpmc(u_int pmc) 309 { 310 uint32_t low, high; 311 312 __asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc)); 313 return (low | ((uint64_t)high << 32)); 314 } 315 316 static __inline uint64_t 317 rdtsc(void) 318 { 319 uint32_t low, high; 320 321 __asm __volatile("rdtsc" : "=a" (low), "=d" (high)); 322 return (low | ((uint64_t)high << 32)); 323 } 324 325 static __inline uint32_t 326 rdtsc32(void) 327 { 328 uint32_t rv; 329 330 __asm __volatile("rdtsc" : "=a" (rv) : : "edx"); 331 return (rv); 332 } 333 334 static __inline void 335 wbinvd(void) 336 { 337 __asm __volatile("wbinvd"); 338 } 339 340 static __inline void 341 write_rflags(u_long rf) 342 { 343 __asm __volatile("pushq %0; popfq" : : "r" (rf)); 344 } 345 346 static __inline void 347 wrmsr(u_int msr, uint64_t newval) 348 { 349 uint32_t low, high; 350 351 low = newval; 352 high = newval >> 32; 353 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr)); 354 } 355 356 static __inline void 357 load_cr0(u_long data) 358 { 359 360 __asm __volatile("movq %0,%%cr0" : : "r" (data)); 361 } 362 363 static __inline u_long 364 rcr0(void) 365 { 366 u_long data; 367 368 __asm __volatile("movq %%cr0,%0" : "=r" (data)); 369 return (data); 370 } 371 372 static __inline u_long 373 rcr2(void) 374 { 375 u_long data; 376 377 __asm __volatile("movq %%cr2,%0" : "=r" (data)); 378 return (data); 379 } 380 381 static __inline void 382 load_cr3(u_long data) 383 { 384 385 __asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory"); 386 } 387 388 static __inline u_long 389 rcr3(void) 390 { 391 u_long data; 392 393 __asm __volatile("movq %%cr3,%0" : "=r" (data)); 394 return (data); 395 } 396 397 static __inline void 398 load_cr4(u_long data) 399 { 400 __asm __volatile("movq %0,%%cr4" : : "r" (data)); 401 } 402 403 static __inline u_long 404 rcr4(void) 405 { 406 u_long data; 407 408 __asm __volatile("movq %%cr4,%0" : "=r" (data)); 409 return (data); 410 } 411 412 /* 413 * Global TLB flush (except for thise for pages marked PG_G) 414 */ 415 static __inline void 416 invltlb(void) 417 { 418 419 load_cr3(rcr3()); 420 } 421 422 /* 423 * TLB flush for an individual page (even if it has PG_G). 424 * Only works on 486+ CPUs (i386 does not have PG_G). 425 */ 426 static __inline void 427 invlpg(u_long addr) 428 { 429 430 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory"); 431 } 432 433 static __inline u_short 434 rfs(void) 435 { 436 u_short sel; 437 __asm __volatile("movw %%fs,%0" : "=rm" (sel)); 438 return (sel); 439 } 440 441 static __inline u_short 442 rgs(void) 443 { 444 u_short sel; 445 __asm __volatile("movw %%gs,%0" : "=rm" (sel)); 446 return (sel); 447 } 448 449 static __inline u_short 450 rss(void) 451 { 452 u_short sel; 453 __asm __volatile("movw %%ss,%0" : "=rm" (sel)); 454 return (sel); 455 } 456 457 static __inline void 458 load_ds(u_short sel) 459 { 460 __asm __volatile("movw %0,%%ds" : : "rm" (sel)); 461 } 462 463 static __inline void 464 load_es(u_short sel) 465 { 466 __asm __volatile("movw %0,%%es" : : "rm" (sel)); 467 } 468 469 static __inline void 470 cpu_monitor(const void *addr, int extensions, int hints) 471 { 472 __asm __volatile("monitor;" 473 : :"a" (addr), "c" (extensions), "d"(hints)); 474 } 475 476 static __inline void 477 cpu_mwait(int extensions, int hints) 478 { 479 __asm __volatile("mwait;" : :"a" (hints), "c" (extensions)); 480 } 481 482 #ifdef _KERNEL 483 /* This is defined in <machine/specialreg.h> but is too painful to get to */ 484 #ifndef MSR_FSBASE 485 #define MSR_FSBASE 0xc0000100 486 #endif 487 static __inline void 488 load_fs(u_short sel) 489 { 490 /* Preserve the fsbase value across the selector load */ 491 __asm __volatile("rdmsr; movw %0,%%fs; wrmsr" 492 : : "rm" (sel), "c" (MSR_FSBASE) : "eax", "edx"); 493 } 494 495 #ifndef MSR_GSBASE 496 #define MSR_GSBASE 0xc0000101 497 #endif 498 static __inline void 499 load_gs(u_short sel) 500 { 501 /* 502 * Preserve the gsbase value across the selector load. 503 * Note that we have to disable interrupts because the gsbase 504 * being trashed happens to be the kernel gsbase at the time. 505 */ 506 __asm __volatile("pushfq; cli; rdmsr; movw %0,%%gs; wrmsr; popfq" 507 : : "rm" (sel), "c" (MSR_GSBASE) : "eax", "edx"); 508 } 509 #else 510 /* Usable by userland */ 511 static __inline void 512 load_fs(u_short sel) 513 { 514 __asm __volatile("movw %0,%%fs" : : "rm" (sel)); 515 } 516 517 static __inline void 518 load_gs(u_short sel) 519 { 520 __asm __volatile("movw %0,%%gs" : : "rm" (sel)); 521 } 522 #endif 523 524 static __inline void 525 lidt(struct region_descriptor *addr) 526 { 527 __asm __volatile("lidt (%0)" : : "r" (addr)); 528 } 529 530 static __inline void 531 lldt(u_short sel) 532 { 533 __asm __volatile("lldt %0" : : "r" (sel)); 534 } 535 536 static __inline void 537 ltr(u_short sel) 538 { 539 __asm __volatile("ltr %0" : : "r" (sel)); 540 } 541 542 static __inline uint64_t 543 rdr0(void) 544 { 545 uint64_t data; 546 __asm __volatile("movq %%dr0,%0" : "=r" (data)); 547 return (data); 548 } 549 550 static __inline void 551 load_dr0(uint64_t dr0) 552 { 553 __asm __volatile("movq %0,%%dr0" : : "r" (dr0)); 554 } 555 556 static __inline uint64_t 557 rdr1(void) 558 { 559 uint64_t data; 560 __asm __volatile("movq %%dr1,%0" : "=r" (data)); 561 return (data); 562 } 563 564 static __inline void 565 load_dr1(uint64_t dr1) 566 { 567 __asm __volatile("movq %0,%%dr1" : : "r" (dr1)); 568 } 569 570 static __inline uint64_t 571 rdr2(void) 572 { 573 uint64_t data; 574 __asm __volatile("movq %%dr2,%0" : "=r" (data)); 575 return (data); 576 } 577 578 static __inline void 579 load_dr2(uint64_t dr2) 580 { 581 __asm __volatile("movq %0,%%dr2" : : "r" (dr2)); 582 } 583 584 static __inline uint64_t 585 rdr3(void) 586 { 587 uint64_t data; 588 __asm __volatile("movq %%dr3,%0" : "=r" (data)); 589 return (data); 590 } 591 592 static __inline void 593 load_dr3(uint64_t dr3) 594 { 595 __asm __volatile("movq %0,%%dr3" : : "r" (dr3)); 596 } 597 598 static __inline uint64_t 599 rdr4(void) 600 { 601 uint64_t data; 602 __asm __volatile("movq %%dr4,%0" : "=r" (data)); 603 return (data); 604 } 605 606 static __inline void 607 load_dr4(uint64_t dr4) 608 { 609 __asm __volatile("movq %0,%%dr4" : : "r" (dr4)); 610 } 611 612 static __inline uint64_t 613 rdr5(void) 614 { 615 uint64_t data; 616 __asm __volatile("movq %%dr5,%0" : "=r" (data)); 617 return (data); 618 } 619 620 static __inline void 621 load_dr5(uint64_t dr5) 622 { 623 __asm __volatile("movq %0,%%dr5" : : "r" (dr5)); 624 } 625 626 static __inline uint64_t 627 rdr6(void) 628 { 629 uint64_t data; 630 __asm __volatile("movq %%dr6,%0" : "=r" (data)); 631 return (data); 632 } 633 634 static __inline void 635 load_dr6(uint64_t dr6) 636 { 637 __asm __volatile("movq %0,%%dr6" : : "r" (dr6)); 638 } 639 640 static __inline uint64_t 641 rdr7(void) 642 { 643 uint64_t data; 644 __asm __volatile("movq %%dr7,%0" : "=r" (data)); 645 return (data); 646 } 647 648 static __inline void 649 load_dr7(uint64_t dr7) 650 { 651 __asm __volatile("movq %0,%%dr7" : : "r" (dr7)); 652 } 653 654 static __inline register_t 655 intr_disable(void) 656 { 657 register_t rflags; 658 659 rflags = read_rflags(); 660 disable_intr(); 661 return (rflags); 662 } 663 664 static __inline void 665 intr_restore(register_t rflags) 666 { 667 write_rflags(rflags); 668 } 669 670 #else /* !(__GNUCLIKE_ASM && __CC_SUPPORTS___INLINE) */ 671 672 int breakpoint(void); 673 u_int bsfl(u_int mask); 674 u_int bsrl(u_int mask); 675 void disable_intr(void); 676 void do_cpuid(u_int ax, u_int *p); 677 void enable_intr(void); 678 void halt(void); 679 void ia32_pause(void); 680 u_char inb(u_int port); 681 u_int inl(u_int port); 682 void insb(u_int port, void *addr, size_t count); 683 void insl(u_int port, void *addr, size_t count); 684 void insw(u_int port, void *addr, size_t count); 685 register_t intr_disable(void); 686 void intr_restore(register_t rf); 687 void invd(void); 688 void invlpg(u_int addr); 689 void invltlb(void); 690 u_short inw(u_int port); 691 void lidt(struct region_descriptor *addr); 692 void lldt(u_short sel); 693 void load_cr0(u_long cr0); 694 void load_cr3(u_long cr3); 695 void load_cr4(u_long cr4); 696 void load_dr0(uint64_t dr0); 697 void load_dr1(uint64_t dr1); 698 void load_dr2(uint64_t dr2); 699 void load_dr3(uint64_t dr3); 700 void load_dr4(uint64_t dr4); 701 void load_dr5(uint64_t dr5); 702 void load_dr6(uint64_t dr6); 703 void load_dr7(uint64_t dr7); 704 void load_fs(u_short sel); 705 void load_gs(u_short sel); 706 void ltr(u_short sel); 707 void outb(u_int port, u_char data); 708 void outl(u_int port, u_int data); 709 void outsb(u_int port, const void *addr, size_t count); 710 void outsl(u_int port, const void *addr, size_t count); 711 void outsw(u_int port, const void *addr, size_t count); 712 void outw(u_int port, u_short data); 713 u_long rcr0(void); 714 u_long rcr2(void); 715 u_long rcr3(void); 716 u_long rcr4(void); 717 uint64_t rdmsr(u_int msr); 718 uint64_t rdpmc(u_int pmc); 719 uint64_t rdr0(void); 720 uint64_t rdr1(void); 721 uint64_t rdr2(void); 722 uint64_t rdr3(void); 723 uint64_t rdr4(void); 724 uint64_t rdr5(void); 725 uint64_t rdr6(void); 726 uint64_t rdr7(void); 727 uint64_t rdtsc(void); 728 u_int read_rflags(void); 729 u_int rfs(void); 730 u_int rgs(void); 731 void wbinvd(void); 732 void write_rflags(u_int rf); 733 void wrmsr(u_int msr, uint64_t newval); 734 735 #endif /* __GNUCLIKE_ASM && __CC_SUPPORTS___INLINE */ 736 737 void reset_dbregs(void); 738 739 #ifdef _KERNEL 740 int rdmsr_safe(u_int msr, uint64_t *val); 741 int wrmsr_safe(u_int msr, uint64_t newval); 742 #endif 743 744 #endif /* !_MACHINE_CPUFUNC_H_ */ 745