xref: /freebsd/sys/amd64/include/atomic.h (revision b339ef955c65fd672f7e3dd39f22c8f946d09f3e)
1 /*-
2  * Copyright (c) 1998 Doug Rabson
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 #ifndef _MACHINE_ATOMIC_H_
29 #define	_MACHINE_ATOMIC_H_
30 
31 #ifndef _SYS_CDEFS_H_
32 #error this file needs sys/cdefs.h as a prerequisite
33 #endif
34 
35 #define	mb()	__asm __volatile("mfence;" : : : "memory")
36 #define	wmb()	__asm __volatile("sfence;" : : : "memory")
37 #define	rmb()	__asm __volatile("lfence;" : : : "memory")
38 
39 /*
40  * Various simple operations on memory, each of which is atomic in the
41  * presence of interrupts and multiple processors.
42  *
43  * atomic_set_char(P, V)	(*(u_char *)(P) |= (V))
44  * atomic_clear_char(P, V)	(*(u_char *)(P) &= ~(V))
45  * atomic_add_char(P, V)	(*(u_char *)(P) += (V))
46  * atomic_subtract_char(P, V)	(*(u_char *)(P) -= (V))
47  *
48  * atomic_set_short(P, V)	(*(u_short *)(P) |= (V))
49  * atomic_clear_short(P, V)	(*(u_short *)(P) &= ~(V))
50  * atomic_add_short(P, V)	(*(u_short *)(P) += (V))
51  * atomic_subtract_short(P, V)	(*(u_short *)(P) -= (V))
52  *
53  * atomic_set_int(P, V)		(*(u_int *)(P) |= (V))
54  * atomic_clear_int(P, V)	(*(u_int *)(P) &= ~(V))
55  * atomic_add_int(P, V)		(*(u_int *)(P) += (V))
56  * atomic_subtract_int(P, V)	(*(u_int *)(P) -= (V))
57  * atomic_swap_int(P, V)	(return (*(u_int *)(P)); *(u_int *)(P) = (V);)
58  * atomic_readandclear_int(P)	(return (*(u_int *)(P)); *(u_int *)(P) = 0;)
59  *
60  * atomic_set_long(P, V)	(*(u_long *)(P) |= (V))
61  * atomic_clear_long(P, V)	(*(u_long *)(P) &= ~(V))
62  * atomic_add_long(P, V)	(*(u_long *)(P) += (V))
63  * atomic_subtract_long(P, V)	(*(u_long *)(P) -= (V))
64  * atomic_swap_long(P, V)	(return (*(u_long *)(P)); *(u_long *)(P) = (V);)
65  * atomic_readandclear_long(P)	(return (*(u_long *)(P)); *(u_long *)(P) = 0;)
66  */
67 
68 /*
69  * The above functions are expanded inline in the statically-linked
70  * kernel.  Lock prefixes are generated if an SMP kernel is being
71  * built.
72  *
73  * Kernel modules call real functions which are built into the kernel.
74  * This allows kernel modules to be portable between UP and SMP systems.
75  */
76 #if defined(KLD_MODULE) || !defined(__GNUCLIKE_ASM)
77 #define	ATOMIC_ASM(NAME, TYPE, OP, CONS, V)			\
78 void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v);	\
79 void atomic_##NAME##_barr_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
80 
81 int	atomic_cmpset_int(volatile u_int *dst, u_int expect, u_int src);
82 int	atomic_cmpset_long(volatile u_long *dst, u_long expect, u_long src);
83 u_int	atomic_fetchadd_int(volatile u_int *p, u_int v);
84 u_long	atomic_fetchadd_long(volatile u_long *p, u_long v);
85 int	atomic_testandset_int(volatile u_int *p, u_int v);
86 int	atomic_testandset_long(volatile u_long *p, u_int v);
87 
88 #define	ATOMIC_LOAD(TYPE)					\
89 u_##TYPE	atomic_load_acq_##TYPE(volatile u_##TYPE *p)
90 #define	ATOMIC_STORE(TYPE)					\
91 void		atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
92 
93 #else /* !KLD_MODULE && __GNUCLIKE_ASM */
94 
95 /*
96  * For userland, always use lock prefixes so that the binaries will run
97  * on both SMP and !SMP systems.
98  */
99 #if defined(SMP) || !defined(_KERNEL)
100 #define	MPLOCKED	"lock ; "
101 #else
102 #define	MPLOCKED
103 #endif
104 
105 /*
106  * The assembly is volatilized to avoid code chunk removal by the compiler.
107  * GCC aggressively reorders operations and memory clobbering is necessary
108  * in order to avoid that for memory barriers.
109  */
110 #define	ATOMIC_ASM(NAME, TYPE, OP, CONS, V)		\
111 static __inline void					\
112 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
113 {							\
114 	__asm __volatile(MPLOCKED OP			\
115 	: "+m" (*p)					\
116 	: CONS (V)					\
117 	: "cc");					\
118 }							\
119 							\
120 static __inline void					\
121 atomic_##NAME##_barr_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
122 {							\
123 	__asm __volatile(MPLOCKED OP			\
124 	: "+m" (*p)					\
125 	: CONS (V)					\
126 	: "memory", "cc");				\
127 }							\
128 struct __hack
129 
130 /*
131  * Atomic compare and set, used by the mutex functions
132  *
133  * if (*dst == expect) *dst = src (all 32 bit words)
134  *
135  * Returns 0 on failure, non-zero on success
136  */
137 
138 static __inline int
139 atomic_cmpset_int(volatile u_int *dst, u_int expect, u_int src)
140 {
141 	u_char res;
142 
143 	__asm __volatile(
144 	"	" MPLOCKED "		"
145 	"	cmpxchgl %3,%1 ;	"
146 	"       sete	%0 ;		"
147 	"# atomic_cmpset_int"
148 	: "=q" (res),			/* 0 */
149 	  "+m" (*dst),			/* 1 */
150 	  "+a" (expect)			/* 2 */
151 	: "r" (src)			/* 3 */
152 	: "memory", "cc");
153 	return (res);
154 }
155 
156 static __inline int
157 atomic_cmpset_long(volatile u_long *dst, u_long expect, u_long src)
158 {
159 	u_char res;
160 
161 	__asm __volatile(
162 	"	" MPLOCKED "		"
163 	"	cmpxchgq %3,%1 ;	"
164 	"       sete	%0 ;		"
165 	"# atomic_cmpset_long"
166 	: "=q" (res),			/* 0 */
167 	  "+m" (*dst),			/* 1 */
168 	  "+a" (expect)			/* 2 */
169 	: "r" (src)			/* 3 */
170 	: "memory", "cc");
171 	return (res);
172 }
173 
174 /*
175  * Atomically add the value of v to the integer pointed to by p and return
176  * the previous value of *p.
177  */
178 static __inline u_int
179 atomic_fetchadd_int(volatile u_int *p, u_int v)
180 {
181 
182 	__asm __volatile(
183 	"	" MPLOCKED "		"
184 	"	xaddl	%0,%1 ;		"
185 	"# atomic_fetchadd_int"
186 	: "+r" (v),			/* 0 */
187 	  "+m" (*p)			/* 1 */
188 	: : "cc");
189 	return (v);
190 }
191 
192 /*
193  * Atomically add the value of v to the long integer pointed to by p and return
194  * the previous value of *p.
195  */
196 static __inline u_long
197 atomic_fetchadd_long(volatile u_long *p, u_long v)
198 {
199 
200 	__asm __volatile(
201 	"	" MPLOCKED "		"
202 	"	xaddq	%0,%1 ;		"
203 	"# atomic_fetchadd_long"
204 	: "+r" (v),			/* 0 */
205 	  "+m" (*p)			/* 1 */
206 	: : "cc");
207 	return (v);
208 }
209 
210 static __inline int
211 atomic_testandset_int(volatile u_int *p, u_int v)
212 {
213 	u_char res;
214 
215 	__asm __volatile(
216 	"	" MPLOCKED "		"
217 	"	btsl	%2,%1 ;		"
218 	"	setc	%0 ;		"
219 	"# atomic_testandset_int"
220 	: "=q" (res),			/* 0 */
221 	  "+m" (*p)			/* 1 */
222 	: "Ir" (v & 0x1f)		/* 2 */
223 	: "cc");
224 	return (res);
225 }
226 
227 static __inline int
228 atomic_testandset_long(volatile u_long *p, u_int v)
229 {
230 	u_char res;
231 
232 	__asm __volatile(
233 	"	" MPLOCKED "		"
234 	"	btsq	%2,%1 ;		"
235 	"	setc	%0 ;		"
236 	"# atomic_testandset_long"
237 	: "=q" (res),			/* 0 */
238 	  "+m" (*p)			/* 1 */
239 	: "Jr" ((u_long)(v & 0x3f))	/* 2 */
240 	: "cc");
241 	return (res);
242 }
243 
244 /*
245  * We assume that a = b will do atomic loads and stores.  Due to the
246  * IA32 memory model, a simple store guarantees release semantics.
247  *
248  * However, a load may pass a store if they are performed on distinct
249  * addresses, so for atomic_load_acq we introduce a Store/Load barrier
250  * before the load in SMP kernels.  We use "lock addl $0,mem", as
251  * recommended by the AMD Software Optimization Guide, and not mfence.
252  * In the kernel, we use a private per-cpu cache line as the target
253  * for the locked addition, to avoid introducing false data
254  * dependencies.  In userspace, a word in the red zone on the stack
255  * (-8(%rsp)) is utilized.
256  *
257  * For UP kernels, however, the memory of the single processor is
258  * always consistent, so we only need to stop the compiler from
259  * reordering accesses in a way that violates the semantics of acquire
260  * and release.
261  */
262 
263 #if defined(_KERNEL)
264 
265 /*
266  * OFFSETOF_MONITORBUF == __pcpu_offset(pc_monitorbuf).
267  *
268  * The open-coded number is used instead of the symbolic expression to
269  * avoid a dependency on sys/pcpu.h in machine/atomic.h consumers.
270  * An assertion in amd64/vm_machdep.c ensures that the value is correct.
271  */
272 #define	OFFSETOF_MONITORBUF	0x180
273 
274 #if defined(SMP)
275 static __inline void
276 __storeload_barrier(void)
277 {
278 
279 	__asm __volatile("lock; addl $0,%%gs:%0"
280 	    : "+m" (*(u_int *)OFFSETOF_MONITORBUF) : : "memory", "cc");
281 }
282 #else /* _KERNEL && UP */
283 static __inline void
284 __storeload_barrier(void)
285 {
286 
287 	__compiler_membar();
288 }
289 #endif /* SMP */
290 #else /* !_KERNEL */
291 static __inline void
292 __storeload_barrier(void)
293 {
294 
295 	__asm __volatile("lock; addl $0,-8(%%rsp)" : : : "memory", "cc");
296 }
297 #endif /* _KERNEL*/
298 
299 /*
300  * C11-standard acq/rel semantics only apply when the variable in the
301  * call is the same for acq as it is for rel.  However, our previous
302  * (x86) implementations provided much stronger ordering than required
303  * (essentially what is called seq_cst order in C11).  This
304  * implementation provides the historical strong ordering since some
305  * callers depend on it.
306  */
307 
308 #define	ATOMIC_LOAD(TYPE)					\
309 static __inline u_##TYPE					\
310 atomic_load_acq_##TYPE(volatile u_##TYPE *p)			\
311 {								\
312 	u_##TYPE res;						\
313 								\
314 	__storeload_barrier();					\
315 	res = *p;						\
316 	__compiler_membar();					\
317 	return (res);						\
318 }								\
319 struct __hack
320 
321 #define	ATOMIC_STORE(TYPE)					\
322 static __inline void						\
323 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)	\
324 {								\
325 								\
326 	__compiler_membar();					\
327 	*p = v;							\
328 }								\
329 struct __hack
330 
331 #endif /* KLD_MODULE || !__GNUCLIKE_ASM */
332 
333 ATOMIC_ASM(set,	     char,  "orb %b1,%0",  "iq",  v);
334 ATOMIC_ASM(clear,    char,  "andb %b1,%0", "iq", ~v);
335 ATOMIC_ASM(add,	     char,  "addb %b1,%0", "iq",  v);
336 ATOMIC_ASM(subtract, char,  "subb %b1,%0", "iq",  v);
337 
338 ATOMIC_ASM(set,	     short, "orw %w1,%0",  "ir",  v);
339 ATOMIC_ASM(clear,    short, "andw %w1,%0", "ir", ~v);
340 ATOMIC_ASM(add,	     short, "addw %w1,%0", "ir",  v);
341 ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir",  v);
342 
343 ATOMIC_ASM(set,	     int,   "orl %1,%0",   "ir",  v);
344 ATOMIC_ASM(clear,    int,   "andl %1,%0",  "ir", ~v);
345 ATOMIC_ASM(add,	     int,   "addl %1,%0",  "ir",  v);
346 ATOMIC_ASM(subtract, int,   "subl %1,%0",  "ir",  v);
347 
348 ATOMIC_ASM(set,	     long,  "orq %1,%0",   "ir",  v);
349 ATOMIC_ASM(clear,    long,  "andq %1,%0",  "ir", ~v);
350 ATOMIC_ASM(add,	     long,  "addq %1,%0",  "ir",  v);
351 ATOMIC_ASM(subtract, long,  "subq %1,%0",  "ir",  v);
352 
353 #define	ATOMIC_LOADSTORE(TYPE)					\
354 	ATOMIC_LOAD(TYPE);					\
355 	ATOMIC_STORE(TYPE)
356 
357 ATOMIC_LOADSTORE(char);
358 ATOMIC_LOADSTORE(short);
359 ATOMIC_LOADSTORE(int);
360 ATOMIC_LOADSTORE(long);
361 
362 #undef ATOMIC_ASM
363 #undef ATOMIC_LOAD
364 #undef ATOMIC_STORE
365 #undef ATOMIC_LOADSTORE
366 #ifndef WANT_FUNCTIONS
367 
368 /* Read the current value and store a new value in the destination. */
369 #ifdef __GNUCLIKE_ASM
370 
371 static __inline u_int
372 atomic_swap_int(volatile u_int *p, u_int v)
373 {
374 
375 	__asm __volatile(
376 	"	xchgl	%1,%0 ;		"
377 	"# atomic_swap_int"
378 	: "+r" (v),			/* 0 */
379 	  "+m" (*p));			/* 1 */
380 	return (v);
381 }
382 
383 static __inline u_long
384 atomic_swap_long(volatile u_long *p, u_long v)
385 {
386 
387 	__asm __volatile(
388 	"	xchgq	%1,%0 ;		"
389 	"# atomic_swap_long"
390 	: "+r" (v),			/* 0 */
391 	  "+m" (*p));			/* 1 */
392 	return (v);
393 }
394 
395 #else /* !__GNUCLIKE_ASM */
396 
397 u_int	atomic_swap_int(volatile u_int *p, u_int v);
398 u_long	atomic_swap_long(volatile u_long *p, u_long v);
399 
400 #endif /* __GNUCLIKE_ASM */
401 
402 #define	atomic_set_acq_char		atomic_set_barr_char
403 #define	atomic_set_rel_char		atomic_set_barr_char
404 #define	atomic_clear_acq_char		atomic_clear_barr_char
405 #define	atomic_clear_rel_char		atomic_clear_barr_char
406 #define	atomic_add_acq_char		atomic_add_barr_char
407 #define	atomic_add_rel_char		atomic_add_barr_char
408 #define	atomic_subtract_acq_char	atomic_subtract_barr_char
409 #define	atomic_subtract_rel_char	atomic_subtract_barr_char
410 
411 #define	atomic_set_acq_short		atomic_set_barr_short
412 #define	atomic_set_rel_short		atomic_set_barr_short
413 #define	atomic_clear_acq_short		atomic_clear_barr_short
414 #define	atomic_clear_rel_short		atomic_clear_barr_short
415 #define	atomic_add_acq_short		atomic_add_barr_short
416 #define	atomic_add_rel_short		atomic_add_barr_short
417 #define	atomic_subtract_acq_short	atomic_subtract_barr_short
418 #define	atomic_subtract_rel_short	atomic_subtract_barr_short
419 
420 #define	atomic_set_acq_int		atomic_set_barr_int
421 #define	atomic_set_rel_int		atomic_set_barr_int
422 #define	atomic_clear_acq_int		atomic_clear_barr_int
423 #define	atomic_clear_rel_int		atomic_clear_barr_int
424 #define	atomic_add_acq_int		atomic_add_barr_int
425 #define	atomic_add_rel_int		atomic_add_barr_int
426 #define	atomic_subtract_acq_int		atomic_subtract_barr_int
427 #define	atomic_subtract_rel_int		atomic_subtract_barr_int
428 #define	atomic_cmpset_acq_int		atomic_cmpset_int
429 #define	atomic_cmpset_rel_int		atomic_cmpset_int
430 
431 #define	atomic_set_acq_long		atomic_set_barr_long
432 #define	atomic_set_rel_long		atomic_set_barr_long
433 #define	atomic_clear_acq_long		atomic_clear_barr_long
434 #define	atomic_clear_rel_long		atomic_clear_barr_long
435 #define	atomic_add_acq_long		atomic_add_barr_long
436 #define	atomic_add_rel_long		atomic_add_barr_long
437 #define	atomic_subtract_acq_long	atomic_subtract_barr_long
438 #define	atomic_subtract_rel_long	atomic_subtract_barr_long
439 #define	atomic_cmpset_acq_long		atomic_cmpset_long
440 #define	atomic_cmpset_rel_long		atomic_cmpset_long
441 
442 #define	atomic_readandclear_int(p)	atomic_swap_int(p, 0)
443 #define	atomic_readandclear_long(p)	atomic_swap_long(p, 0)
444 
445 /* Operations on 8-bit bytes. */
446 #define	atomic_set_8		atomic_set_char
447 #define	atomic_set_acq_8	atomic_set_acq_char
448 #define	atomic_set_rel_8	atomic_set_rel_char
449 #define	atomic_clear_8		atomic_clear_char
450 #define	atomic_clear_acq_8	atomic_clear_acq_char
451 #define	atomic_clear_rel_8	atomic_clear_rel_char
452 #define	atomic_add_8		atomic_add_char
453 #define	atomic_add_acq_8	atomic_add_acq_char
454 #define	atomic_add_rel_8	atomic_add_rel_char
455 #define	atomic_subtract_8	atomic_subtract_char
456 #define	atomic_subtract_acq_8	atomic_subtract_acq_char
457 #define	atomic_subtract_rel_8	atomic_subtract_rel_char
458 #define	atomic_load_acq_8	atomic_load_acq_char
459 #define	atomic_store_rel_8	atomic_store_rel_char
460 
461 /* Operations on 16-bit words. */
462 #define	atomic_set_16		atomic_set_short
463 #define	atomic_set_acq_16	atomic_set_acq_short
464 #define	atomic_set_rel_16	atomic_set_rel_short
465 #define	atomic_clear_16		atomic_clear_short
466 #define	atomic_clear_acq_16	atomic_clear_acq_short
467 #define	atomic_clear_rel_16	atomic_clear_rel_short
468 #define	atomic_add_16		atomic_add_short
469 #define	atomic_add_acq_16	atomic_add_acq_short
470 #define	atomic_add_rel_16	atomic_add_rel_short
471 #define	atomic_subtract_16	atomic_subtract_short
472 #define	atomic_subtract_acq_16	atomic_subtract_acq_short
473 #define	atomic_subtract_rel_16	atomic_subtract_rel_short
474 #define	atomic_load_acq_16	atomic_load_acq_short
475 #define	atomic_store_rel_16	atomic_store_rel_short
476 
477 /* Operations on 32-bit double words. */
478 #define	atomic_set_32		atomic_set_int
479 #define	atomic_set_acq_32	atomic_set_acq_int
480 #define	atomic_set_rel_32	atomic_set_rel_int
481 #define	atomic_clear_32		atomic_clear_int
482 #define	atomic_clear_acq_32	atomic_clear_acq_int
483 #define	atomic_clear_rel_32	atomic_clear_rel_int
484 #define	atomic_add_32		atomic_add_int
485 #define	atomic_add_acq_32	atomic_add_acq_int
486 #define	atomic_add_rel_32	atomic_add_rel_int
487 #define	atomic_subtract_32	atomic_subtract_int
488 #define	atomic_subtract_acq_32	atomic_subtract_acq_int
489 #define	atomic_subtract_rel_32	atomic_subtract_rel_int
490 #define	atomic_load_acq_32	atomic_load_acq_int
491 #define	atomic_store_rel_32	atomic_store_rel_int
492 #define	atomic_cmpset_32	atomic_cmpset_int
493 #define	atomic_cmpset_acq_32	atomic_cmpset_acq_int
494 #define	atomic_cmpset_rel_32	atomic_cmpset_rel_int
495 #define	atomic_swap_32		atomic_swap_int
496 #define	atomic_readandclear_32	atomic_readandclear_int
497 #define	atomic_fetchadd_32	atomic_fetchadd_int
498 #define	atomic_testandset_32	atomic_testandset_int
499 
500 /* Operations on 64-bit quad words. */
501 #define	atomic_set_64		atomic_set_long
502 #define	atomic_set_acq_64	atomic_set_acq_long
503 #define	atomic_set_rel_64	atomic_set_rel_long
504 #define	atomic_clear_64		atomic_clear_long
505 #define	atomic_clear_acq_64	atomic_clear_acq_long
506 #define	atomic_clear_rel_64	atomic_clear_rel_long
507 #define	atomic_add_64		atomic_add_long
508 #define	atomic_add_acq_64	atomic_add_acq_long
509 #define	atomic_add_rel_64	atomic_add_rel_long
510 #define	atomic_subtract_64	atomic_subtract_long
511 #define	atomic_subtract_acq_64	atomic_subtract_acq_long
512 #define	atomic_subtract_rel_64	atomic_subtract_rel_long
513 #define	atomic_load_acq_64	atomic_load_acq_long
514 #define	atomic_store_rel_64	atomic_store_rel_long
515 #define	atomic_cmpset_64	atomic_cmpset_long
516 #define	atomic_cmpset_acq_64	atomic_cmpset_acq_long
517 #define	atomic_cmpset_rel_64	atomic_cmpset_rel_long
518 #define	atomic_swap_64		atomic_swap_long
519 #define	atomic_readandclear_64	atomic_readandclear_long
520 #define	atomic_testandset_64	atomic_testandset_long
521 
522 /* Operations on pointers. */
523 #define	atomic_set_ptr		atomic_set_long
524 #define	atomic_set_acq_ptr	atomic_set_acq_long
525 #define	atomic_set_rel_ptr	atomic_set_rel_long
526 #define	atomic_clear_ptr	atomic_clear_long
527 #define	atomic_clear_acq_ptr	atomic_clear_acq_long
528 #define	atomic_clear_rel_ptr	atomic_clear_rel_long
529 #define	atomic_add_ptr		atomic_add_long
530 #define	atomic_add_acq_ptr	atomic_add_acq_long
531 #define	atomic_add_rel_ptr	atomic_add_rel_long
532 #define	atomic_subtract_ptr	atomic_subtract_long
533 #define	atomic_subtract_acq_ptr	atomic_subtract_acq_long
534 #define	atomic_subtract_rel_ptr	atomic_subtract_rel_long
535 #define	atomic_load_acq_ptr	atomic_load_acq_long
536 #define	atomic_store_rel_ptr	atomic_store_rel_long
537 #define	atomic_cmpset_ptr	atomic_cmpset_long
538 #define	atomic_cmpset_acq_ptr	atomic_cmpset_acq_long
539 #define	atomic_cmpset_rel_ptr	atomic_cmpset_rel_long
540 #define	atomic_swap_ptr		atomic_swap_long
541 #define	atomic_readandclear_ptr	atomic_readandclear_long
542 
543 #endif /* !WANT_FUNCTIONS */
544 
545 #endif /* !_MACHINE_ATOMIC_H_ */
546