1 /*- 2 * Copyright (c) 1990 William Jolitz. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 35 * $Id: npx.c,v 1.17 1994/11/14 14:59:06 bde Exp $ 36 */ 37 38 #include "npx.h" 39 #if NNPX > 0 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/conf.h> 44 #include <sys/file.h> 45 #include <sys/proc.h> 46 #include <sys/devconf.h> 47 #include <sys/ioctl.h> 48 #include <sys/syslog.h> 49 #include <sys/signalvar.h> 50 51 #include <machine/cpu.h> 52 #include <machine/pcb.h> 53 #include <machine/trap.h> 54 #include <machine/clock.h> 55 #include <machine/specialreg.h> 56 57 #include <i386/isa/icu.h> 58 #include <i386/isa/isa_device.h> 59 #include <i386/isa/isa.h> 60 61 /* 62 * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. 63 */ 64 65 #ifdef __GNUC__ 66 67 #define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr))) 68 #define fnclex() __asm("fnclex") 69 #define fninit() __asm("fninit") 70 #define fnop() __asm("fnop") 71 #define fnsave(addr) __asm("fnsave %0" : "=m" (*(addr))) 72 #define fnstcw(addr) __asm("fnstcw %0" : "=m" (*(addr))) 73 #define fnstsw(addr) __asm("fnstsw %0" : "=m" (*(addr))) 74 #define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop") 75 #define frstor(addr) __asm("frstor %0" : : "m" (*(addr))) 76 #define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 77 : : "n" (CR0_TS) : "ax") 78 #define stop_emulating() __asm("clts") 79 80 #else /* not __GNUC__ */ 81 82 void fldcw __P((caddr_t addr)); 83 void fnclex __P((void)); 84 void fninit __P((void)); 85 void fnop __P((void)); 86 void fnsave __P((caddr_t addr)); 87 void fnstcw __P((caddr_t addr)); 88 void fnstsw __P((caddr_t addr)); 89 void fp_divide_by_0 __P((void)); 90 void frstor __P((caddr_t addr)); 91 void start_emulating __P((void)); 92 void stop_emulating __P((void)); 93 94 #endif /* __GNUC__ */ 95 96 typedef u_char bool_t; 97 98 static int npxattach __P((struct isa_device *dvp)); 99 static int npxprobe __P((struct isa_device *dvp)); 100 static int npxprobe1 __P((struct isa_device *dvp)); 101 102 struct isa_driver npxdriver = { 103 npxprobe, npxattach, "npx", 104 }; 105 106 int hw_float; /* XXX currently just alias for npx_exists */ 107 u_int npx0_imask = SWI_CLOCK_MASK; 108 struct proc *npxproc; 109 110 static bool_t npx_ex16; 111 static bool_t npx_exists; 112 static struct gate_descriptor npx_idt_probeintr; 113 static int npx_intrno; 114 static volatile u_int npx_intrs_while_probing; 115 static bool_t npx_irq13; 116 static volatile u_int npx_traps_while_probing; 117 118 /* 119 * Special interrupt handlers. Someday intr0-intr15 will be used to count 120 * interrupts. We'll still need a special exception 16 handler. The busy 121 * latch stuff in probeintr() can be moved to npxprobe(). 122 */ 123 inthand_t probeintr; 124 asm 125 (" 126 .text 127 _probeintr: 128 ss 129 incl _npx_intrs_while_probing 130 pushl %eax 131 movb $0x20,%al # EOI (asm in strings loses cpp features) 132 outb %al,$0xa0 # IO_ICU2 133 outb %al,$0x20 # IO_ICU1 134 movb $0,%al 135 outb %al,$0xf0 # clear BUSY# latch 136 popl %eax 137 iret 138 "); 139 140 inthand_t probetrap; 141 asm 142 (" 143 .text 144 _probetrap: 145 ss 146 incl _npx_traps_while_probing 147 fnclex 148 iret 149 "); 150 151 /* 152 * Probe routine. Initialize cr0 to give correct behaviour for [f]wait 153 * whether the device exists or not (XXX should be elsewhere). Set flags 154 * to tell npxattach() what to do. Modify device struct if npx doesn't 155 * need to use interrupts. Return 1 if device exists. 156 */ 157 static int 158 npxprobe(dvp) 159 struct isa_device *dvp; 160 { 161 int result; 162 u_long save_eflags; 163 u_char save_icu1_mask; 164 u_char save_icu2_mask; 165 struct gate_descriptor save_idt_npxintr; 166 struct gate_descriptor save_idt_npxtrap; 167 /* 168 * This routine is now just a wrapper for npxprobe1(), to install 169 * special npx interrupt and trap handlers, to enable npx interrupts 170 * and to disable other interrupts. Someday isa_configure() will 171 * install suitable handlers and run with interrupts enabled so we 172 * won't need to do so much here. 173 */ 174 npx_intrno = NRSVIDT + ffs(dvp->id_irq) - 1; 175 save_eflags = read_eflags(); 176 disable_intr(); 177 save_icu1_mask = inb(IO_ICU1 + 1); 178 save_icu2_mask = inb(IO_ICU2 + 1); 179 save_idt_npxintr = idt[npx_intrno]; 180 save_idt_npxtrap = idt[16]; 181 outb(IO_ICU1 + 1, ~(IRQ_SLAVE | dvp->id_irq)); 182 outb(IO_ICU2 + 1, ~(dvp->id_irq >> 8)); 183 setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL); 184 setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL); 185 npx_idt_probeintr = idt[npx_intrno]; 186 enable_intr(); 187 result = npxprobe1(dvp); 188 disable_intr(); 189 outb(IO_ICU1 + 1, save_icu1_mask); 190 outb(IO_ICU2 + 1, save_icu2_mask); 191 idt[npx_intrno] = save_idt_npxintr; 192 idt[16] = save_idt_npxtrap; 193 write_eflags(save_eflags); 194 return (result); 195 } 196 197 static int 198 npxprobe1(dvp) 199 struct isa_device *dvp; 200 { 201 u_short control; 202 u_short status; 203 204 /* 205 * Partially reset the coprocessor, if any. Some BIOS's don't reset 206 * it after a warm boot. 207 */ 208 outb(0xf1, 0); /* full reset on some systems, NOP on others */ 209 outb(0xf0, 0); /* clear BUSY# latch */ 210 /* 211 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 212 * instructions. We must set the CR0_MP bit and use the CR0_TS 213 * bit to control the trap, because setting the CR0_EM bit does 214 * not cause WAIT instructions to trap. It's important to trap 215 * WAIT instructions - otherwise the "wait" variants of no-wait 216 * control instructions would degenerate to the "no-wait" variants 217 * after FP context switches but work correctly otherwise. It's 218 * particularly important to trap WAITs when there is no NPX - 219 * otherwise the "wait" variants would always degenerate. 220 * 221 * Try setting CR0_NE to get correct error reporting on 486DX's. 222 * Setting it should fail or do nothing on lesser processors. 223 */ 224 load_cr0(rcr0() | CR0_MP | CR0_NE); 225 /* 226 * But don't trap while we're probing. 227 */ 228 stop_emulating(); 229 /* 230 * Finish resetting the coprocessor, if any. If there is an error 231 * pending, then we may get a bogus IRQ13, but probeintr() will handle 232 * it OK. Bogus halts have never been observed, but we enabled 233 * IRQ13 and cleared the BUSY# latch early to handle them anyway. 234 */ 235 fninit(); 236 fnop(); /* wait for fninit (fwait might hang) */ 237 DELAY(1000); /* wait for any IRQ13 */ 238 #ifdef DIAGNOSTIC 239 if (npx_intrs_while_probing != 0) 240 printf("fninit caused %u bogus npx interrupt(s)\n", 241 npx_intrs_while_probing); 242 if (npx_traps_while_probing != 0) 243 printf("fninit caused %u bogus npx trap(s)\n", 244 npx_traps_while_probing); 245 #endif 246 /* 247 * Check for a status of mostly zero. 248 */ 249 status = 0x5a5a; 250 fnstsw(&status); 251 if ((status & 0xb8ff) == 0) { 252 /* 253 * Good, now check for a proper control word. 254 */ 255 control = 0x5a5a; 256 fnstcw(&control); 257 if ((control & 0x1f3f) == 0x033f) { 258 hw_float = npx_exists = 1; 259 /* 260 * We have an npx, now divide by 0 to see if exception 261 * 16 works. 262 */ 263 control &= ~(1 << 2); /* enable divide by 0 trap */ 264 fldcw(&control); 265 npx_traps_while_probing = npx_intrs_while_probing = 0; 266 fp_divide_by_0(); 267 if (npx_traps_while_probing != 0) { 268 /* 269 * Good, exception 16 works. 270 */ 271 npx_ex16 = 1; 272 dvp->id_irq = 0; /* zap the interrupt */ 273 /* 274 * special return value to flag that we do not 275 * actually use any I/O registers 276 */ 277 return (-1); 278 } 279 if (npx_intrs_while_probing != 0) { 280 /* 281 * Bad, we are stuck with IRQ13. 282 */ 283 npx_irq13 = 1; 284 /* 285 * npxattach would be too late to set npx0_imask. 286 */ 287 npx0_imask |= dvp->id_irq; 288 return (IO_NPXSIZE); 289 } 290 /* 291 * Worse, even IRQ13 is broken. Use emulator. 292 */ 293 } 294 } 295 /* 296 * Probe failed, but we want to get to npxattach to initialize the 297 * emulator and say that it has been installed. XXX handle devices 298 * that aren't really devices better. 299 */ 300 dvp->id_irq = 0; 301 /* 302 * special return value to flag that we do not 303 * actually use any I/O registers 304 */ 305 return (-1); 306 } 307 308 static struct kern_devconf kdc_npx[NNPX] = { { 309 0, 0, 0, /* filled in by dev_attach */ 310 "npx", 0, { MDDT_ISA, 0 }, 311 isa_generic_externalize, 0, 0, ISA_EXTERNALLEN, 312 &kdc_isa0, /* parent */ 313 0, /* parentdata */ 314 DC_BUSY, 315 "Floating-point unit" 316 } }; 317 318 static inline void 319 npx_registerdev(struct isa_device *id) 320 { 321 int unit; 322 323 unit = id->id_unit; 324 if (unit != 0) 325 kdc_npx[unit] = kdc_npx[0]; 326 kdc_npx[unit].kdc_unit = unit; 327 kdc_npx[unit].kdc_isa = id; 328 dev_attach(&kdc_npx[unit]); 329 } 330 331 /* 332 * Attach routine - announce which it is, and wire into system 333 */ 334 int 335 npxattach(dvp) 336 struct isa_device *dvp; 337 { 338 printf("npx%d: ", dvp->id_unit); 339 if (npx_ex16) 340 printf("INT 16 interface\n"); 341 else if (npx_irq13) 342 printf("IRQ 13 interface\n"); 343 #if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE) 344 else if (npx_exists) { 345 printf("error reporting broken; using 387 emulator\n"); 346 npx_exists = 0; 347 } else 348 printf("387 emulator\n"); 349 #else 350 else 351 printf("no 387 emulator in kernel!\n"); 352 #endif 353 npxinit(__INITIAL_NPXCW__); 354 if (npx_exists) 355 npx_registerdev(dvp); 356 return (1); /* XXX unused */ 357 } 358 359 /* 360 * Initialize floating point unit. 361 */ 362 void 363 npxinit(control) 364 u_short control; 365 { 366 struct save87 dummy; 367 368 if (!npx_exists) 369 return; 370 /* 371 * fninit has the same h/w bugs as fnsave. Use the detoxified 372 * fnsave to throw away any junk in the fpu. npxsave() initializes 373 * the fpu and sets npxproc = NULL as important side effects. 374 */ 375 npxsave(&dummy); 376 stop_emulating(); 377 fldcw(&control); 378 if (curpcb != NULL) 379 fnsave(&curpcb->pcb_savefpu); 380 start_emulating(); 381 } 382 383 /* 384 * Free coprocessor (if we have it). 385 */ 386 void 387 npxexit(p) 388 struct proc *p; 389 { 390 391 if (p == npxproc) 392 npxsave(&curpcb->pcb_savefpu); 393 if (npx_exists) { 394 u_int masked_exceptions; 395 396 masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw 397 & curpcb->pcb_savefpu.sv_env.en_sw & 0x7f; 398 /* 399 * Overflow, divde by 0, and invalid operand would have 400 * caused a trap in 1.1.5. 401 */ 402 if (masked_exceptions & 0x0d) 403 log(LOG_ERR, 404 "pid %d (%s) exited with masked floating point exceptions 0x%02x\n", 405 p->p_pid, p->p_comm, masked_exceptions); 406 } 407 } 408 409 /* 410 * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE. 411 * 412 * Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now 413 * depend on longjmp() restoring a usable state. Restoring the state 414 * or examining it might fail if we didn't clear exceptions. 415 * 416 * XXX there is no standard way to tell SIGFPE handlers about the error 417 * state. The old interface: 418 * 419 * void handler(int sig, int code, struct sigcontext *scp); 420 * 421 * is broken because it is non-ANSI and because the FP state is not in 422 * struct sigcontext. 423 * 424 * XXX the FP state is not preserved across signal handlers. So signal 425 * handlers cannot afford to do FP unless they preserve the state or 426 * longjmp() out. Both preserving the state and longjmp()ing may be 427 * destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable 428 * solution for signals other than SIGFPE. 429 */ 430 void 431 npxintr(frame) 432 struct intrframe frame; 433 { 434 int code; 435 436 if (npxproc == NULL || !npx_exists) { 437 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 438 npxproc, curproc, npx_exists); 439 panic("npxintr from nowhere"); 440 } 441 if (npxproc != curproc) { 442 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 443 npxproc, curproc, npx_exists); 444 panic("npxintr from non-current process"); 445 } 446 447 fnstsw(&curpcb->pcb_savefpu.sv_ex_sw); 448 fnclex(); 449 outb(0xf0, 0); 450 451 /* 452 * Pass exception to process. 453 */ 454 if (ISPL(frame.if_cs) == SEL_UPL) { 455 /* 456 * Interrupt is essentially a trap, so we can afford to call 457 * the SIGFPE handler (if any) as soon as the interrupt 458 * returns. 459 * 460 * XXX little or nothing is gained from this, and plenty is 461 * lost - the interrupt frame has to contain the trap frame 462 * (this is otherwise only necessary for the rescheduling trap 463 * in doreti, and the frame for that could easily be set up 464 * just before it is used). 465 */ 466 curproc->p_md.md_regs = (int *)&frame.if_es; 467 #ifdef notyet 468 /* 469 * Encode the appropriate code for detailed information on 470 * this exception. 471 */ 472 code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw); 473 #else 474 code = 0; /* XXX */ 475 #endif 476 trapsignal(curproc, SIGFPE, code); 477 } else { 478 /* 479 * Nested interrupt. These losers occur when: 480 * o an IRQ13 is bogusly generated at a bogus time, e.g.: 481 * o immediately after an fnsave or frstor of an 482 * error state. 483 * o a couple of 386 instructions after 484 * "fstpl _memvar" causes a stack overflow. 485 * These are especially nasty when combined with a 486 * trace trap. 487 * o an IRQ13 occurs at the same time as another higher- 488 * priority interrupt. 489 * 490 * Treat them like a true async interrupt. 491 */ 492 psignal(curproc, SIGFPE); 493 } 494 } 495 496 /* 497 * Implement device not available (DNA) exception 498 * 499 * It would be better to switch FP context here (if curproc != npxproc) 500 * and not necessarily for every context switch, but it is too hard to 501 * access foreign pcb's. 502 */ 503 int 504 npxdna() 505 { 506 if (!npx_exists) 507 return (0); 508 if (npxproc != NULL) { 509 printf("npxdna: npxproc = %p, curproc = %p\n", 510 npxproc, curproc); 511 panic("npxdna"); 512 } 513 stop_emulating(); 514 /* 515 * Record new context early in case frstor causes an IRQ13. 516 */ 517 npxproc = curproc; 518 curpcb->pcb_savefpu.sv_ex_sw = 0; 519 /* 520 * The following frstor may cause an IRQ13 when the state being 521 * restored has a pending error. The error will appear to have been 522 * triggered by the current (npx) user instruction even when that 523 * instruction is a no-wait instruction that should not trigger an 524 * error (e.g., fnclex). On at least one 486 system all of the 525 * no-wait instructions are broken the same as frstor, so our 526 * treatment does not amplify the breakage. On at least one 527 * 386/Cyrix 387 system, fnclex works correctly while frstor and 528 * fnsave are broken, so our treatment breaks fnclex if it is the 529 * first FPU instruction after a context switch. 530 */ 531 frstor(&curpcb->pcb_savefpu); 532 533 return (1); 534 } 535 536 /* 537 * Wrapper for fnsave instruction to handle h/w bugs. If there is an error 538 * pending, then fnsave generates a bogus IRQ13 on some systems. Force 539 * any IRQ13 to be handled immediately, and then ignore it. This routine is 540 * often called at splhigh so it must not use many system services. In 541 * particular, it's much easier to install a special handler than to 542 * guarantee that it's safe to use npxintr() and its supporting code. 543 */ 544 void 545 npxsave(addr) 546 struct save87 *addr; 547 { 548 u_char icu1_mask; 549 u_char icu2_mask; 550 u_char old_icu1_mask; 551 u_char old_icu2_mask; 552 struct gate_descriptor save_idt_npxintr; 553 554 disable_intr(); 555 old_icu1_mask = inb(IO_ICU1 + 1); 556 old_icu2_mask = inb(IO_ICU2 + 1); 557 save_idt_npxintr = idt[npx_intrno]; 558 outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask)); 559 outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8)); 560 idt[npx_intrno] = npx_idt_probeintr; 561 enable_intr(); 562 stop_emulating(); 563 fnsave(addr); 564 fnop(); 565 outb(0xf0, 0); 566 start_emulating(); 567 npxproc = NULL; 568 disable_intr(); 569 icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */ 570 icu2_mask = inb(IO_ICU2 + 1); 571 outb(IO_ICU1 + 1, 572 (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask)); 573 outb(IO_ICU2 + 1, 574 (icu2_mask & ~(npx0_imask >> 8)) 575 | (old_icu2_mask & (npx0_imask >> 8))); 576 idt[npx_intrno] = save_idt_npxintr; 577 enable_intr(); /* back to usual state */ 578 } 579 580 #endif /* NNPX > 0 */ 581