1 /*- 2 * Copyright (c) 1990 William Jolitz. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 4. Neither the name of the University nor the names of its contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/lock.h> 41 #include <sys/malloc.h> 42 #include <sys/module.h> 43 #include <sys/mutex.h> 44 #include <sys/mutex.h> 45 #include <sys/proc.h> 46 #include <sys/sysctl.h> 47 #include <machine/bus.h> 48 #include <sys/rman.h> 49 #include <sys/signalvar.h> 50 51 #include <machine/cputypes.h> 52 #include <machine/frame.h> 53 #include <machine/intr_machdep.h> 54 #include <machine/md_var.h> 55 #include <machine/pcb.h> 56 #include <machine/psl.h> 57 #include <machine/resource.h> 58 #include <machine/specialreg.h> 59 #include <machine/segments.h> 60 #include <machine/ucontext.h> 61 62 /* 63 * Floating point support. 64 */ 65 66 #if defined(__GNUCLIKE_ASM) && !defined(lint) 67 68 #define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr))) 69 #define fnclex() __asm("fnclex") 70 #define fninit() __asm("fninit") 71 #define fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) 72 #define fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) 73 #define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr))) 74 #define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr))) 75 #define ldmxcsr(r) __asm __volatile("ldmxcsr %0" : : "m" (r)) 76 #define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 77 : : "n" (CR0_TS) : "ax") 78 #define stop_emulating() __asm("clts") 79 80 #else /* !(__GNUCLIKE_ASM && !lint) */ 81 82 void fldcw(caddr_t addr); 83 void fnclex(void); 84 void fninit(void); 85 void fnstcw(caddr_t addr); 86 void fnstsw(caddr_t addr); 87 void fxsave(caddr_t addr); 88 void fxrstor(caddr_t addr); 89 void start_emulating(void); 90 void stop_emulating(void); 91 92 #endif /* __GNUCLIKE_ASM && !lint */ 93 94 #define GET_FPU_CW(thread) ((thread)->td_pcb->pcb_save->sv_env.en_cw) 95 #define GET_FPU_SW(thread) ((thread)->td_pcb->pcb_save->sv_env.en_sw) 96 97 typedef u_char bool_t; 98 99 static void fpu_clean_state(void); 100 101 SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD, 102 NULL, 1, "Floating point instructions executed in hardware"); 103 104 static struct savefpu fpu_initialstate; 105 106 /* 107 * Initialize the floating point unit. On the boot CPU we generate a 108 * clean state that is used to initialize the floating point unit when 109 * it is first used by a process. 110 */ 111 void 112 fpuinit(void) 113 { 114 register_t savecrit; 115 u_int mxcsr; 116 u_short control; 117 118 /* 119 * It is too early for critical_enter() to work on AP. 120 */ 121 savecrit = intr_disable(); 122 stop_emulating(); 123 fninit(); 124 control = __INITIAL_FPUCW__; 125 fldcw(&control); 126 mxcsr = __INITIAL_MXCSR__; 127 ldmxcsr(mxcsr); 128 if (PCPU_GET(cpuid) == 0) { 129 fxsave(&fpu_initialstate); 130 if (fpu_initialstate.sv_env.en_mxcsr_mask) 131 cpu_mxcsr_mask = fpu_initialstate.sv_env.en_mxcsr_mask; 132 else 133 cpu_mxcsr_mask = 0xFFBF; 134 bzero(fpu_initialstate.sv_fp, sizeof(fpu_initialstate.sv_fp)); 135 bzero(fpu_initialstate.sv_xmm, sizeof(fpu_initialstate.sv_xmm)); 136 } 137 start_emulating(); 138 intr_restore(savecrit); 139 } 140 141 /* 142 * Free coprocessor (if we have it). 143 */ 144 void 145 fpuexit(struct thread *td) 146 { 147 148 critical_enter(); 149 if (curthread == PCPU_GET(fpcurthread)) { 150 stop_emulating(); 151 fxsave(PCPU_GET(curpcb)->pcb_save); 152 start_emulating(); 153 PCPU_SET(fpcurthread, 0); 154 } 155 critical_exit(); 156 } 157 158 int 159 fpuformat() 160 { 161 162 return (_MC_FPFMT_XMM); 163 } 164 165 /* 166 * The following mechanism is used to ensure that the FPE_... value 167 * that is passed as a trapcode to the signal handler of the user 168 * process does not have more than one bit set. 169 * 170 * Multiple bits may be set if the user process modifies the control 171 * word while a status word bit is already set. While this is a sign 172 * of bad coding, we have no choise than to narrow them down to one 173 * bit, since we must not send a trapcode that is not exactly one of 174 * the FPE_ macros. 175 * 176 * The mechanism has a static table with 127 entries. Each combination 177 * of the 7 FPU status word exception bits directly translates to a 178 * position in this table, where a single FPE_... value is stored. 179 * This FPE_... value stored there is considered the "most important" 180 * of the exception bits and will be sent as the signal code. The 181 * precedence of the bits is based upon Intel Document "Numerical 182 * Applications", Chapter "Special Computational Situations". 183 * 184 * The macro to choose one of these values does these steps: 1) Throw 185 * away status word bits that cannot be masked. 2) Throw away the bits 186 * currently masked in the control word, assuming the user isn't 187 * interested in them anymore. 3) Reinsert status word bit 7 (stack 188 * fault) if it is set, which cannot be masked but must be presered. 189 * 4) Use the remaining bits to point into the trapcode table. 190 * 191 * The 6 maskable bits in order of their preference, as stated in the 192 * above referenced Intel manual: 193 * 1 Invalid operation (FP_X_INV) 194 * 1a Stack underflow 195 * 1b Stack overflow 196 * 1c Operand of unsupported format 197 * 1d SNaN operand. 198 * 2 QNaN operand (not an exception, irrelavant here) 199 * 3 Any other invalid-operation not mentioned above or zero divide 200 * (FP_X_INV, FP_X_DZ) 201 * 4 Denormal operand (FP_X_DNML) 202 * 5 Numeric over/underflow (FP_X_OFL, FP_X_UFL) 203 * 6 Inexact result (FP_X_IMP) 204 */ 205 static char fpetable[128] = { 206 0, 207 FPE_FLTINV, /* 1 - INV */ 208 FPE_FLTUND, /* 2 - DNML */ 209 FPE_FLTINV, /* 3 - INV | DNML */ 210 FPE_FLTDIV, /* 4 - DZ */ 211 FPE_FLTINV, /* 5 - INV | DZ */ 212 FPE_FLTDIV, /* 6 - DNML | DZ */ 213 FPE_FLTINV, /* 7 - INV | DNML | DZ */ 214 FPE_FLTOVF, /* 8 - OFL */ 215 FPE_FLTINV, /* 9 - INV | OFL */ 216 FPE_FLTUND, /* A - DNML | OFL */ 217 FPE_FLTINV, /* B - INV | DNML | OFL */ 218 FPE_FLTDIV, /* C - DZ | OFL */ 219 FPE_FLTINV, /* D - INV | DZ | OFL */ 220 FPE_FLTDIV, /* E - DNML | DZ | OFL */ 221 FPE_FLTINV, /* F - INV | DNML | DZ | OFL */ 222 FPE_FLTUND, /* 10 - UFL */ 223 FPE_FLTINV, /* 11 - INV | UFL */ 224 FPE_FLTUND, /* 12 - DNML | UFL */ 225 FPE_FLTINV, /* 13 - INV | DNML | UFL */ 226 FPE_FLTDIV, /* 14 - DZ | UFL */ 227 FPE_FLTINV, /* 15 - INV | DZ | UFL */ 228 FPE_FLTDIV, /* 16 - DNML | DZ | UFL */ 229 FPE_FLTINV, /* 17 - INV | DNML | DZ | UFL */ 230 FPE_FLTOVF, /* 18 - OFL | UFL */ 231 FPE_FLTINV, /* 19 - INV | OFL | UFL */ 232 FPE_FLTUND, /* 1A - DNML | OFL | UFL */ 233 FPE_FLTINV, /* 1B - INV | DNML | OFL | UFL */ 234 FPE_FLTDIV, /* 1C - DZ | OFL | UFL */ 235 FPE_FLTINV, /* 1D - INV | DZ | OFL | UFL */ 236 FPE_FLTDIV, /* 1E - DNML | DZ | OFL | UFL */ 237 FPE_FLTINV, /* 1F - INV | DNML | DZ | OFL | UFL */ 238 FPE_FLTRES, /* 20 - IMP */ 239 FPE_FLTINV, /* 21 - INV | IMP */ 240 FPE_FLTUND, /* 22 - DNML | IMP */ 241 FPE_FLTINV, /* 23 - INV | DNML | IMP */ 242 FPE_FLTDIV, /* 24 - DZ | IMP */ 243 FPE_FLTINV, /* 25 - INV | DZ | IMP */ 244 FPE_FLTDIV, /* 26 - DNML | DZ | IMP */ 245 FPE_FLTINV, /* 27 - INV | DNML | DZ | IMP */ 246 FPE_FLTOVF, /* 28 - OFL | IMP */ 247 FPE_FLTINV, /* 29 - INV | OFL | IMP */ 248 FPE_FLTUND, /* 2A - DNML | OFL | IMP */ 249 FPE_FLTINV, /* 2B - INV | DNML | OFL | IMP */ 250 FPE_FLTDIV, /* 2C - DZ | OFL | IMP */ 251 FPE_FLTINV, /* 2D - INV | DZ | OFL | IMP */ 252 FPE_FLTDIV, /* 2E - DNML | DZ | OFL | IMP */ 253 FPE_FLTINV, /* 2F - INV | DNML | DZ | OFL | IMP */ 254 FPE_FLTUND, /* 30 - UFL | IMP */ 255 FPE_FLTINV, /* 31 - INV | UFL | IMP */ 256 FPE_FLTUND, /* 32 - DNML | UFL | IMP */ 257 FPE_FLTINV, /* 33 - INV | DNML | UFL | IMP */ 258 FPE_FLTDIV, /* 34 - DZ | UFL | IMP */ 259 FPE_FLTINV, /* 35 - INV | DZ | UFL | IMP */ 260 FPE_FLTDIV, /* 36 - DNML | DZ | UFL | IMP */ 261 FPE_FLTINV, /* 37 - INV | DNML | DZ | UFL | IMP */ 262 FPE_FLTOVF, /* 38 - OFL | UFL | IMP */ 263 FPE_FLTINV, /* 39 - INV | OFL | UFL | IMP */ 264 FPE_FLTUND, /* 3A - DNML | OFL | UFL | IMP */ 265 FPE_FLTINV, /* 3B - INV | DNML | OFL | UFL | IMP */ 266 FPE_FLTDIV, /* 3C - DZ | OFL | UFL | IMP */ 267 FPE_FLTINV, /* 3D - INV | DZ | OFL | UFL | IMP */ 268 FPE_FLTDIV, /* 3E - DNML | DZ | OFL | UFL | IMP */ 269 FPE_FLTINV, /* 3F - INV | DNML | DZ | OFL | UFL | IMP */ 270 FPE_FLTSUB, /* 40 - STK */ 271 FPE_FLTSUB, /* 41 - INV | STK */ 272 FPE_FLTUND, /* 42 - DNML | STK */ 273 FPE_FLTSUB, /* 43 - INV | DNML | STK */ 274 FPE_FLTDIV, /* 44 - DZ | STK */ 275 FPE_FLTSUB, /* 45 - INV | DZ | STK */ 276 FPE_FLTDIV, /* 46 - DNML | DZ | STK */ 277 FPE_FLTSUB, /* 47 - INV | DNML | DZ | STK */ 278 FPE_FLTOVF, /* 48 - OFL | STK */ 279 FPE_FLTSUB, /* 49 - INV | OFL | STK */ 280 FPE_FLTUND, /* 4A - DNML | OFL | STK */ 281 FPE_FLTSUB, /* 4B - INV | DNML | OFL | STK */ 282 FPE_FLTDIV, /* 4C - DZ | OFL | STK */ 283 FPE_FLTSUB, /* 4D - INV | DZ | OFL | STK */ 284 FPE_FLTDIV, /* 4E - DNML | DZ | OFL | STK */ 285 FPE_FLTSUB, /* 4F - INV | DNML | DZ | OFL | STK */ 286 FPE_FLTUND, /* 50 - UFL | STK */ 287 FPE_FLTSUB, /* 51 - INV | UFL | STK */ 288 FPE_FLTUND, /* 52 - DNML | UFL | STK */ 289 FPE_FLTSUB, /* 53 - INV | DNML | UFL | STK */ 290 FPE_FLTDIV, /* 54 - DZ | UFL | STK */ 291 FPE_FLTSUB, /* 55 - INV | DZ | UFL | STK */ 292 FPE_FLTDIV, /* 56 - DNML | DZ | UFL | STK */ 293 FPE_FLTSUB, /* 57 - INV | DNML | DZ | UFL | STK */ 294 FPE_FLTOVF, /* 58 - OFL | UFL | STK */ 295 FPE_FLTSUB, /* 59 - INV | OFL | UFL | STK */ 296 FPE_FLTUND, /* 5A - DNML | OFL | UFL | STK */ 297 FPE_FLTSUB, /* 5B - INV | DNML | OFL | UFL | STK */ 298 FPE_FLTDIV, /* 5C - DZ | OFL | UFL | STK */ 299 FPE_FLTSUB, /* 5D - INV | DZ | OFL | UFL | STK */ 300 FPE_FLTDIV, /* 5E - DNML | DZ | OFL | UFL | STK */ 301 FPE_FLTSUB, /* 5F - INV | DNML | DZ | OFL | UFL | STK */ 302 FPE_FLTRES, /* 60 - IMP | STK */ 303 FPE_FLTSUB, /* 61 - INV | IMP | STK */ 304 FPE_FLTUND, /* 62 - DNML | IMP | STK */ 305 FPE_FLTSUB, /* 63 - INV | DNML | IMP | STK */ 306 FPE_FLTDIV, /* 64 - DZ | IMP | STK */ 307 FPE_FLTSUB, /* 65 - INV | DZ | IMP | STK */ 308 FPE_FLTDIV, /* 66 - DNML | DZ | IMP | STK */ 309 FPE_FLTSUB, /* 67 - INV | DNML | DZ | IMP | STK */ 310 FPE_FLTOVF, /* 68 - OFL | IMP | STK */ 311 FPE_FLTSUB, /* 69 - INV | OFL | IMP | STK */ 312 FPE_FLTUND, /* 6A - DNML | OFL | IMP | STK */ 313 FPE_FLTSUB, /* 6B - INV | DNML | OFL | IMP | STK */ 314 FPE_FLTDIV, /* 6C - DZ | OFL | IMP | STK */ 315 FPE_FLTSUB, /* 6D - INV | DZ | OFL | IMP | STK */ 316 FPE_FLTDIV, /* 6E - DNML | DZ | OFL | IMP | STK */ 317 FPE_FLTSUB, /* 6F - INV | DNML | DZ | OFL | IMP | STK */ 318 FPE_FLTUND, /* 70 - UFL | IMP | STK */ 319 FPE_FLTSUB, /* 71 - INV | UFL | IMP | STK */ 320 FPE_FLTUND, /* 72 - DNML | UFL | IMP | STK */ 321 FPE_FLTSUB, /* 73 - INV | DNML | UFL | IMP | STK */ 322 FPE_FLTDIV, /* 74 - DZ | UFL | IMP | STK */ 323 FPE_FLTSUB, /* 75 - INV | DZ | UFL | IMP | STK */ 324 FPE_FLTDIV, /* 76 - DNML | DZ | UFL | IMP | STK */ 325 FPE_FLTSUB, /* 77 - INV | DNML | DZ | UFL | IMP | STK */ 326 FPE_FLTOVF, /* 78 - OFL | UFL | IMP | STK */ 327 FPE_FLTSUB, /* 79 - INV | OFL | UFL | IMP | STK */ 328 FPE_FLTUND, /* 7A - DNML | OFL | UFL | IMP | STK */ 329 FPE_FLTSUB, /* 7B - INV | DNML | OFL | UFL | IMP | STK */ 330 FPE_FLTDIV, /* 7C - DZ | OFL | UFL | IMP | STK */ 331 FPE_FLTSUB, /* 7D - INV | DZ | OFL | UFL | IMP | STK */ 332 FPE_FLTDIV, /* 7E - DNML | DZ | OFL | UFL | IMP | STK */ 333 FPE_FLTSUB, /* 7F - INV | DNML | DZ | OFL | UFL | IMP | STK */ 334 }; 335 336 /* 337 * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE. 338 * 339 * Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now 340 * depend on longjmp() restoring a usable state. Restoring the state 341 * or examining it might fail if we didn't clear exceptions. 342 * 343 * The error code chosen will be one of the FPE_... macros. It will be 344 * sent as the second argument to old BSD-style signal handlers and as 345 * "siginfo_t->si_code" (second argument) to SA_SIGINFO signal handlers. 346 * 347 * XXX the FP state is not preserved across signal handlers. So signal 348 * handlers cannot afford to do FP unless they preserve the state or 349 * longjmp() out. Both preserving the state and longjmp()ing may be 350 * destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable 351 * solution for signals other than SIGFPE. 352 */ 353 int 354 fputrap() 355 { 356 u_short control, status; 357 358 critical_enter(); 359 360 /* 361 * Interrupt handling (for another interrupt) may have pushed the 362 * state to memory. Fetch the relevant parts of the state from 363 * wherever they are. 364 */ 365 if (PCPU_GET(fpcurthread) != curthread) { 366 control = GET_FPU_CW(curthread); 367 status = GET_FPU_SW(curthread); 368 } else { 369 fnstcw(&control); 370 fnstsw(&status); 371 } 372 373 if (PCPU_GET(fpcurthread) == curthread) 374 fnclex(); 375 critical_exit(); 376 return (fpetable[status & ((~control & 0x3f) | 0x40)]); 377 } 378 379 /* 380 * Implement device not available (DNA) exception 381 * 382 * It would be better to switch FP context here (if curthread != fpcurthread) 383 * and not necessarily for every context switch, but it is too hard to 384 * access foreign pcb's. 385 */ 386 387 static int err_count = 0; 388 389 void 390 fpudna(void) 391 { 392 struct pcb *pcb; 393 394 critical_enter(); 395 if (PCPU_GET(fpcurthread) == curthread) { 396 printf("fpudna: fpcurthread == curthread %d times\n", 397 ++err_count); 398 stop_emulating(); 399 critical_exit(); 400 return; 401 } 402 if (PCPU_GET(fpcurthread) != NULL) { 403 printf("fpudna: fpcurthread = %p (%d), curthread = %p (%d)\n", 404 PCPU_GET(fpcurthread), 405 PCPU_GET(fpcurthread)->td_proc->p_pid, 406 curthread, curthread->td_proc->p_pid); 407 panic("fpudna"); 408 } 409 stop_emulating(); 410 /* 411 * Record new context early in case frstor causes a trap. 412 */ 413 PCPU_SET(fpcurthread, curthread); 414 pcb = PCPU_GET(curpcb); 415 416 fpu_clean_state(); 417 418 if ((pcb->pcb_flags & PCB_FPUINITDONE) == 0) { 419 /* 420 * This is the first time this thread has used the FPU or 421 * the PCB doesn't contain a clean FPU state. Explicitly 422 * load an initial state. 423 */ 424 fxrstor(&fpu_initialstate); 425 if (pcb->pcb_initial_fpucw != __INITIAL_FPUCW__) 426 fldcw(&pcb->pcb_initial_fpucw); 427 pcb->pcb_flags |= PCB_FPUINITDONE; 428 if (PCB_USER_FPU(pcb)) 429 pcb->pcb_flags |= PCB_USERFPUINITDONE; 430 } else 431 fxrstor(pcb->pcb_save); 432 critical_exit(); 433 } 434 435 void 436 fpudrop() 437 { 438 struct thread *td; 439 440 td = PCPU_GET(fpcurthread); 441 KASSERT(td == curthread, ("fpudrop: fpcurthread != curthread")); 442 CRITICAL_ASSERT(td); 443 PCPU_SET(fpcurthread, NULL); 444 td->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 445 start_emulating(); 446 } 447 448 /* 449 * Get the state of the FPU without dropping ownership (if possible). 450 * It returns the FPU ownership status. 451 */ 452 int 453 fpugetuserregs(struct thread *td, struct savefpu *addr) 454 { 455 struct pcb *pcb; 456 457 pcb = td->td_pcb; 458 if ((pcb->pcb_flags & PCB_USERFPUINITDONE) == 0) { 459 bcopy(&fpu_initialstate, addr, sizeof(fpu_initialstate)); 460 addr->sv_env.en_cw = pcb->pcb_initial_fpucw; 461 return (_MC_FPOWNED_NONE); 462 } 463 critical_enter(); 464 if (td == PCPU_GET(fpcurthread) && PCB_USER_FPU(pcb)) { 465 fxsave(addr); 466 critical_exit(); 467 return (_MC_FPOWNED_FPU); 468 } else { 469 critical_exit(); 470 bcopy(&pcb->pcb_user_save, addr, sizeof(*addr)); 471 return (_MC_FPOWNED_PCB); 472 } 473 } 474 475 int 476 fpugetregs(struct thread *td, struct savefpu *addr) 477 { 478 struct pcb *pcb; 479 480 pcb = td->td_pcb; 481 if ((pcb->pcb_flags & PCB_FPUINITDONE) == 0) { 482 bcopy(&fpu_initialstate, addr, sizeof(fpu_initialstate)); 483 addr->sv_env.en_cw = pcb->pcb_initial_fpucw; 484 return (_MC_FPOWNED_NONE); 485 } 486 critical_enter(); 487 if (td == PCPU_GET(fpcurthread)) { 488 fxsave(addr); 489 critical_exit(); 490 return (_MC_FPOWNED_FPU); 491 } else { 492 critical_exit(); 493 bcopy(pcb->pcb_save, addr, sizeof(*addr)); 494 return (_MC_FPOWNED_PCB); 495 } 496 } 497 498 /* 499 * Set the state of the FPU. 500 */ 501 void 502 fpusetuserregs(struct thread *td, struct savefpu *addr) 503 { 504 struct pcb *pcb; 505 506 pcb = td->td_pcb; 507 critical_enter(); 508 if (td == PCPU_GET(fpcurthread) && PCB_USER_FPU(pcb)) { 509 fxrstor(addr); 510 critical_exit(); 511 pcb->pcb_flags |= PCB_FPUINITDONE | PCB_USERFPUINITDONE; 512 } else { 513 critical_exit(); 514 bcopy(addr, &td->td_pcb->pcb_user_save, sizeof(*addr)); 515 if (PCB_USER_FPU(pcb)) 516 pcb->pcb_flags |= PCB_FPUINITDONE; 517 pcb->pcb_flags |= PCB_USERFPUINITDONE; 518 } 519 } 520 521 void 522 fpusetregs(struct thread *td, struct savefpu *addr) 523 { 524 struct pcb *pcb; 525 526 pcb = td->td_pcb; 527 critical_enter(); 528 if (td == PCPU_GET(fpcurthread)) { 529 fxrstor(addr); 530 critical_exit(); 531 } else { 532 critical_exit(); 533 bcopy(addr, td->td_pcb->pcb_save, sizeof(*addr)); 534 } 535 if (PCB_USER_FPU(pcb)) 536 pcb->pcb_flags |= PCB_USERFPUINITDONE; 537 pcb->pcb_flags |= PCB_FPUINITDONE; 538 } 539 540 /* 541 * On AuthenticAMD processors, the fxrstor instruction does not restore 542 * the x87's stored last instruction pointer, last data pointer, and last 543 * opcode values, except in the rare case in which the exception summary 544 * (ES) bit in the x87 status word is set to 1. 545 * 546 * In order to avoid leaking this information across processes, we clean 547 * these values by performing a dummy load before executing fxrstor(). 548 */ 549 static void 550 fpu_clean_state(void) 551 { 552 static float dummy_variable = 0.0; 553 u_short status; 554 555 /* 556 * Clear the ES bit in the x87 status word if it is currently 557 * set, in order to avoid causing a fault in the upcoming load. 558 */ 559 fnstsw(&status); 560 if (status & 0x80) 561 fnclex(); 562 563 /* 564 * Load the dummy variable into the x87 stack. This mangles 565 * the x87 stack, but we don't care since we're about to call 566 * fxrstor() anyway. 567 */ 568 __asm __volatile("ffree %%st(7); fld %0" : : "m" (dummy_variable)); 569 } 570 571 /* 572 * This really sucks. We want the acpi version only, but it requires 573 * the isa_if.h file in order to get the definitions. 574 */ 575 #include "opt_isa.h" 576 #ifdef DEV_ISA 577 #include <isa/isavar.h> 578 /* 579 * This sucks up the legacy ISA support assignments from PNPBIOS/ACPI. 580 */ 581 static struct isa_pnp_id fpupnp_ids[] = { 582 { 0x040cd041, "Legacy ISA coprocessor support" }, /* PNP0C04 */ 583 { 0 } 584 }; 585 586 static int 587 fpupnp_probe(device_t dev) 588 { 589 int result; 590 591 result = ISA_PNP_PROBE(device_get_parent(dev), dev, fpupnp_ids); 592 if (result <= 0) 593 device_quiet(dev); 594 return (result); 595 } 596 597 static int 598 fpupnp_attach(device_t dev) 599 { 600 601 return (0); 602 } 603 604 static device_method_t fpupnp_methods[] = { 605 /* Device interface */ 606 DEVMETHOD(device_probe, fpupnp_probe), 607 DEVMETHOD(device_attach, fpupnp_attach), 608 DEVMETHOD(device_detach, bus_generic_detach), 609 DEVMETHOD(device_shutdown, bus_generic_shutdown), 610 DEVMETHOD(device_suspend, bus_generic_suspend), 611 DEVMETHOD(device_resume, bus_generic_resume), 612 613 { 0, 0 } 614 }; 615 616 static driver_t fpupnp_driver = { 617 "fpupnp", 618 fpupnp_methods, 619 1, /* no softc */ 620 }; 621 622 static devclass_t fpupnp_devclass; 623 624 DRIVER_MODULE(fpupnp, acpi, fpupnp_driver, fpupnp_devclass, 0, 0); 625 #endif /* DEV_ISA */ 626 627 int 628 fpu_kern_enter(struct thread *td, struct fpu_kern_ctx *ctx, u_int flags) 629 { 630 struct pcb *pcb; 631 632 pcb = td->td_pcb; 633 KASSERT(!PCB_USER_FPU(pcb) || pcb->pcb_save == &pcb->pcb_user_save, 634 ("mangled pcb_save")); 635 ctx->flags = 0; 636 if ((pcb->pcb_flags & PCB_FPUINITDONE) != 0) 637 ctx->flags |= FPU_KERN_CTX_FPUINITDONE; 638 fpuexit(td); 639 ctx->prev = pcb->pcb_save; 640 pcb->pcb_save = &ctx->hwstate; 641 pcb->pcb_flags |= PCB_KERNFPU; 642 pcb->pcb_flags &= ~PCB_FPUINITDONE; 643 return (0); 644 } 645 646 int 647 fpu_kern_leave(struct thread *td, struct fpu_kern_ctx *ctx) 648 { 649 struct pcb *pcb; 650 651 pcb = td->td_pcb; 652 critical_enter(); 653 if (curthread == PCPU_GET(fpcurthread)) 654 fpudrop(); 655 critical_exit(); 656 pcb->pcb_save = ctx->prev; 657 if (pcb->pcb_save == &pcb->pcb_user_save) { 658 if ((pcb->pcb_flags & PCB_USERFPUINITDONE) != 0) 659 pcb->pcb_flags |= PCB_FPUINITDONE; 660 else 661 pcb->pcb_flags &= ~PCB_FPUINITDONE; 662 pcb->pcb_flags &= ~PCB_KERNFPU; 663 } else { 664 if ((ctx->flags & FPU_KERN_CTX_FPUINITDONE) != 0) 665 pcb->pcb_flags |= PCB_FPUINITDONE; 666 else 667 pcb->pcb_flags &= ~PCB_FPUINITDONE; 668 KASSERT(!PCB_USER_FPU(pcb), ("unpaired fpu_kern_leave")); 669 } 670 return (0); 671 } 672 673 int 674 fpu_kern_thread(u_int flags) 675 { 676 struct pcb *pcb; 677 678 pcb = PCPU_GET(curpcb); 679 KASSERT((curthread->td_pflags & TDP_KTHREAD) != 0, 680 ("Only kthread may use fpu_kern_thread")); 681 KASSERT(pcb->pcb_save == &pcb->pcb_user_save, ("mangled pcb_save")); 682 KASSERT(PCB_USER_FPU(pcb), ("recursive call")); 683 684 pcb->pcb_flags |= PCB_KERNFPU; 685 return (0); 686 } 687 688 int 689 is_fpu_kern_thread(u_int flags) 690 { 691 692 if ((curthread->td_pflags & TDP_KTHREAD) == 0) 693 return (0); 694 return ((PCPU_GET(curpcb)->pcb_flags & PCB_KERNFPU) != 0); 695 } 696