1 /*- 2 * Copyright (c) 1990 William Jolitz. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 35 * $Id: npx.c,v 1.72 1999/05/11 16:29:18 luoqi Exp $ 36 */ 37 38 #include "npx.h" 39 #if NNPX > 0 40 41 #include "opt_debug_npx.h" 42 #include "opt_math_emulate.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/bus.h> 47 #include <sys/kernel.h> 48 #include <sys/malloc.h> 49 #include <sys/module.h> 50 #include <sys/sysctl.h> 51 #include <sys/proc.h> 52 #include <machine/bus.h> 53 #include <sys/rman.h> 54 #ifdef NPX_DEBUG 55 #include <sys/syslog.h> 56 #endif 57 #include <sys/signalvar.h> 58 59 #ifndef SMP 60 #include <machine/asmacros.h> 61 #endif 62 #include <machine/cputypes.h> 63 #include <machine/frame.h> 64 #include <machine/ipl.h> 65 #include <machine/md_var.h> 66 #include <machine/pcb.h> 67 #include <machine/psl.h> 68 #ifndef SMP 69 #include <machine/clock.h> 70 #endif 71 #include <machine/resource.h> 72 #include <machine/specialreg.h> 73 #include <machine/segments.h> 74 75 #ifndef SMP 76 #include <i386/isa/icu.h> 77 #include <i386/isa/intr_machdep.h> 78 #include <i386/isa/isa.h> 79 #endif 80 81 /* 82 * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. 83 */ 84 85 /* Configuration flags. */ 86 #define NPX_DISABLE_I586_OPTIMIZED_BCOPY (1 << 0) 87 #define NPX_DISABLE_I586_OPTIMIZED_BZERO (1 << 1) 88 #define NPX_DISABLE_I586_OPTIMIZED_COPYIO (1 << 2) 89 90 #ifdef __GNUC__ 91 92 #define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr))) 93 #define fnclex() __asm("fnclex") 94 #define fninit() __asm("fninit") 95 #define fnop() __asm("fnop") 96 #define fnsave(addr) __asm __volatile("fnsave %0" : "=m" (*(addr))) 97 #define fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) 98 #define fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) 99 #define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop") 100 #define frstor(addr) __asm("frstor %0" : : "m" (*(addr))) 101 #define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 102 : : "n" (CR0_TS) : "ax") 103 #define stop_emulating() __asm("clts") 104 105 #else /* not __GNUC__ */ 106 107 void fldcw __P((caddr_t addr)); 108 void fnclex __P((void)); 109 void fninit __P((void)); 110 void fnop __P((void)); 111 void fnsave __P((caddr_t addr)); 112 void fnstcw __P((caddr_t addr)); 113 void fnstsw __P((caddr_t addr)); 114 void fp_divide_by_0 __P((void)); 115 void frstor __P((caddr_t addr)); 116 void start_emulating __P((void)); 117 void stop_emulating __P((void)); 118 119 #endif /* __GNUC__ */ 120 121 typedef u_char bool_t; 122 123 static int npx_attach __P((device_t dev)); 124 void npx_intr __P((void *)); 125 static int npx_probe __P((device_t dev)); 126 static int npx_probe1 __P((device_t dev)); 127 #ifdef I586_CPU 128 static long timezero __P((const char *funcname, 129 void (*func)(void *buf, size_t len))); 130 #endif /* I586_CPU */ 131 132 int hw_float; /* XXX currently just alias for npx_exists */ 133 134 SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint, 135 CTLFLAG_RD, &hw_float, 0, 136 "Floatingpoint instructions executed in hardware"); 137 138 #ifndef SMP 139 static u_int npx0_imask = SWI_CLOCK_MASK; 140 static struct gate_descriptor npx_idt_probeintr; 141 static int npx_intrno; 142 static volatile u_int npx_intrs_while_probing; 143 static volatile u_int npx_traps_while_probing; 144 #endif 145 146 static bool_t npx_ex16; 147 static bool_t npx_exists; 148 static bool_t npx_irq13; 149 static int npx_irq; /* irq number */ 150 151 #ifndef SMP 152 /* 153 * Special interrupt handlers. Someday intr0-intr15 will be used to count 154 * interrupts. We'll still need a special exception 16 handler. The busy 155 * latch stuff in probeintr() can be moved to npxprobe(). 156 */ 157 inthand_t probeintr; 158 __asm(" \n\ 159 .text \n\ 160 .p2align 2,0x90 \n\ 161 .type " __XSTRING(CNAME(probeintr)) ",@function \n\ 162 " __XSTRING(CNAME(probeintr)) ": \n\ 163 ss \n\ 164 incl " __XSTRING(CNAME(npx_intrs_while_probing)) " \n\ 165 pushl %eax \n\ 166 movb $0x20,%al # EOI (asm in strings loses cpp features) \n\ 167 outb %al,$0xa0 # IO_ICU2 \n\ 168 outb %al,$0x20 # IO_ICU1 \n\ 169 movb $0,%al \n\ 170 outb %al,$0xf0 # clear BUSY# latch \n\ 171 popl %eax \n\ 172 iret \n\ 173 "); 174 175 inthand_t probetrap; 176 __asm(" \n\ 177 .text \n\ 178 .p2align 2,0x90 \n\ 179 .type " __XSTRING(CNAME(probetrap)) ",@function \n\ 180 " __XSTRING(CNAME(probetrap)) ": \n\ 181 ss \n\ 182 incl " __XSTRING(CNAME(npx_traps_while_probing)) " \n\ 183 fnclex \n\ 184 iret \n\ 185 "); 186 #endif /* SMP */ 187 188 /* 189 * Probe routine. Initialize cr0 to give correct behaviour for [f]wait 190 * whether the device exists or not (XXX should be elsewhere). Set flags 191 * to tell npxattach() what to do. Modify device struct if npx doesn't 192 * need to use interrupts. Return 1 if device exists. 193 */ 194 static int 195 npx_probe(dev) 196 device_t dev; 197 { 198 #ifdef SMP 199 200 if (resource_int_value("npx", 0, "irq", &npx_irq) != 0) 201 npx_irq = 13; 202 return npx_probe1(dev); 203 204 #else /* SMP */ 205 206 int result; 207 u_long save_eflags; 208 u_char save_icu1_mask; 209 u_char save_icu2_mask; 210 struct gate_descriptor save_idt_npxintr; 211 struct gate_descriptor save_idt_npxtrap; 212 /* 213 * This routine is now just a wrapper for npxprobe1(), to install 214 * special npx interrupt and trap handlers, to enable npx interrupts 215 * and to disable other interrupts. Someday isa_configure() will 216 * install suitable handlers and run with interrupts enabled so we 217 * won't need to do so much here. 218 */ 219 if (resource_int_value("npx", 0, "irq", &npx_irq) != 0) 220 npx_irq = 13; 221 npx_intrno = NRSVIDT + npx_irq; 222 save_eflags = read_eflags(); 223 disable_intr(); 224 save_icu1_mask = inb(IO_ICU1 + 1); 225 save_icu2_mask = inb(IO_ICU2 + 1); 226 save_idt_npxintr = idt[npx_intrno]; 227 save_idt_npxtrap = idt[16]; 228 outb(IO_ICU1 + 1, ~IRQ_SLAVE); 229 outb(IO_ICU2 + 1, ~(1 << (npx_irq - 8))); 230 setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 231 setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 232 npx_idt_probeintr = idt[npx_intrno]; 233 enable_intr(); 234 result = npx_probe1(dev); 235 disable_intr(); 236 outb(IO_ICU1 + 1, save_icu1_mask); 237 outb(IO_ICU2 + 1, save_icu2_mask); 238 idt[npx_intrno] = save_idt_npxintr; 239 idt[16] = save_idt_npxtrap; 240 write_eflags(save_eflags); 241 return (result); 242 243 #endif /* SMP */ 244 } 245 246 static int 247 npx_probe1(dev) 248 device_t dev; 249 { 250 #ifndef SMP 251 u_short control; 252 u_short status; 253 #endif 254 255 /* 256 * Partially reset the coprocessor, if any. Some BIOS's don't reset 257 * it after a warm boot. 258 */ 259 outb(0xf1, 0); /* full reset on some systems, NOP on others */ 260 outb(0xf0, 0); /* clear BUSY# latch */ 261 /* 262 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 263 * instructions. We must set the CR0_MP bit and use the CR0_TS 264 * bit to control the trap, because setting the CR0_EM bit does 265 * not cause WAIT instructions to trap. It's important to trap 266 * WAIT instructions - otherwise the "wait" variants of no-wait 267 * control instructions would degenerate to the "no-wait" variants 268 * after FP context switches but work correctly otherwise. It's 269 * particularly important to trap WAITs when there is no NPX - 270 * otherwise the "wait" variants would always degenerate. 271 * 272 * Try setting CR0_NE to get correct error reporting on 486DX's. 273 * Setting it should fail or do nothing on lesser processors. 274 */ 275 load_cr0(rcr0() | CR0_MP | CR0_NE); 276 /* 277 * But don't trap while we're probing. 278 */ 279 stop_emulating(); 280 /* 281 * Finish resetting the coprocessor, if any. If there is an error 282 * pending, then we may get a bogus IRQ13, but probeintr() will handle 283 * it OK. Bogus halts have never been observed, but we enabled 284 * IRQ13 and cleared the BUSY# latch early to handle them anyway. 285 */ 286 fninit(); 287 288 #ifdef SMP 289 /* 290 * Exception 16 MUST work for SMP. 291 */ 292 npx_irq13 = 0; 293 npx_ex16 = hw_float = npx_exists = 1; 294 device_set_desc(dev, "math processor"); 295 return (0); 296 297 #else /* !SMP */ 298 device_set_desc(dev, "math processor"); 299 300 /* 301 * Don't use fwait here because it might hang. 302 * Don't use fnop here because it usually hangs if there is no FPU. 303 */ 304 DELAY(1000); /* wait for any IRQ13 */ 305 #ifdef DIAGNOSTIC 306 if (npx_intrs_while_probing != 0) 307 printf("fninit caused %u bogus npx interrupt(s)\n", 308 npx_intrs_while_probing); 309 if (npx_traps_while_probing != 0) 310 printf("fninit caused %u bogus npx trap(s)\n", 311 npx_traps_while_probing); 312 #endif 313 /* 314 * Check for a status of mostly zero. 315 */ 316 status = 0x5a5a; 317 fnstsw(&status); 318 if ((status & 0xb8ff) == 0) { 319 /* 320 * Good, now check for a proper control word. 321 */ 322 control = 0x5a5a; 323 fnstcw(&control); 324 if ((control & 0x1f3f) == 0x033f) { 325 hw_float = npx_exists = 1; 326 /* 327 * We have an npx, now divide by 0 to see if exception 328 * 16 works. 329 */ 330 control &= ~(1 << 2); /* enable divide by 0 trap */ 331 fldcw(&control); 332 npx_traps_while_probing = npx_intrs_while_probing = 0; 333 fp_divide_by_0(); 334 if (npx_traps_while_probing != 0) { 335 /* 336 * Good, exception 16 works. 337 */ 338 npx_ex16 = 1; 339 return (0); 340 } 341 if (npx_intrs_while_probing != 0) { 342 int rid; 343 struct resource *r; 344 void *intr; 345 /* 346 * Bad, we are stuck with IRQ13. 347 */ 348 npx_irq13 = 1; 349 /* 350 * npxattach would be too late to set npx0_imask 351 */ 352 npx0_imask |= (1 << npx_irq); 353 354 /* 355 * We allocate these resources permanently, 356 * so there is no need to keep track of them. 357 */ 358 rid = 0; 359 r = bus_alloc_resource(dev, SYS_RES_IOPORT, 360 &rid, IO_NPX, IO_NPX, 361 IO_NPXSIZE, RF_ACTIVE); 362 if (r == 0) 363 panic("npx: can't get ports"); 364 rid = 0; 365 r = bus_alloc_resource(dev, SYS_RES_IRQ, 366 &rid, npx_irq, npx_irq, 367 1, RF_ACTIVE); 368 if (r == 0) 369 panic("npx: can't get IRQ"); 370 BUS_SETUP_INTR(device_get_parent(dev), 371 dev, r, INTR_TYPE_MISC, 372 npx_intr, 0, &intr); 373 if (intr == 0) 374 panic("npx: can't create intr"); 375 376 return (0); 377 } 378 /* 379 * Worse, even IRQ13 is broken. Use emulator. 380 */ 381 } 382 } 383 /* 384 * Probe failed, but we want to get to npxattach to initialize the 385 * emulator and say that it has been installed. XXX handle devices 386 * that aren't really devices better. 387 */ 388 return (0); 389 #endif /* SMP */ 390 } 391 392 /* 393 * Attach routine - announce which it is, and wire into system 394 */ 395 int 396 npx_attach(dev) 397 device_t dev; 398 { 399 #ifdef I586_CPU 400 int flags; 401 #endif 402 403 device_print_prettyname(dev); 404 if (npx_irq13) { 405 printf("using IRQ 13 interface\n"); 406 } else { 407 if (npx_ex16) 408 printf("INT 16 interface\n"); 409 #if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE) 410 else if (npx_exists) { 411 printf("error reporting broken; using 387 emulator\n"); 412 hw_float = npx_exists = 0; 413 } else 414 printf("387 emulator\n"); 415 #else 416 else 417 printf("no 387 emulator in kernel!\n"); 418 #endif 419 } 420 npxinit(__INITIAL_NPXCW__); 421 422 #ifdef I586_CPU 423 if (resource_int_value("npx", 0, "flags", &flags) != 0) 424 flags = 0; 425 426 if (cpu_class == CPUCLASS_586 && npx_ex16 && 427 timezero("i586_bzero()", i586_bzero) < 428 timezero("bzero()", bzero) * 4 / 5) { 429 if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY)) { 430 bcopy_vector = i586_bcopy; 431 ovbcopy_vector = i586_bcopy; 432 } 433 if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BZERO)) 434 bzero = i586_bzero; 435 if (!(flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) { 436 copyin_vector = i586_copyin; 437 copyout_vector = i586_copyout; 438 } 439 } 440 #endif 441 442 return (0); /* XXX unused */ 443 } 444 445 /* 446 * Initialize floating point unit. 447 */ 448 void 449 npxinit(control) 450 u_short control; 451 { 452 struct save87 dummy; 453 454 if (!npx_exists) 455 return; 456 /* 457 * fninit has the same h/w bugs as fnsave. Use the detoxified 458 * fnsave to throw away any junk in the fpu. npxsave() initializes 459 * the fpu and sets npxproc = NULL as important side effects. 460 */ 461 npxsave(&dummy); 462 stop_emulating(); 463 fldcw(&control); 464 if (curpcb != NULL) 465 fnsave(&curpcb->pcb_savefpu); 466 start_emulating(); 467 } 468 469 /* 470 * Free coprocessor (if we have it). 471 */ 472 void 473 npxexit(p) 474 struct proc *p; 475 { 476 477 if (p == npxproc) 478 npxsave(&curpcb->pcb_savefpu); 479 #ifdef NPX_DEBUG 480 if (npx_exists) { 481 u_int masked_exceptions; 482 483 masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw 484 & curpcb->pcb_savefpu.sv_env.en_sw & 0x7f; 485 /* 486 * Log exceptions that would have trapped with the old 487 * control word (overflow, divide by 0, and invalid operand). 488 */ 489 if (masked_exceptions & 0x0d) 490 log(LOG_ERR, 491 "pid %d (%s) exited with masked floating point exceptions 0x%02x\n", 492 p->p_pid, p->p_comm, masked_exceptions); 493 } 494 #endif 495 } 496 497 /* 498 * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE. 499 * 500 * Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now 501 * depend on longjmp() restoring a usable state. Restoring the state 502 * or examining it might fail if we didn't clear exceptions. 503 * 504 * XXX there is no standard way to tell SIGFPE handlers about the error 505 * state. The old interface: 506 * 507 * void handler(int sig, int code, struct sigcontext *scp); 508 * 509 * is broken because it is non-ANSI and because the FP state is not in 510 * struct sigcontext. 511 * 512 * XXX the FP state is not preserved across signal handlers. So signal 513 * handlers cannot afford to do FP unless they preserve the state or 514 * longjmp() out. Both preserving the state and longjmp()ing may be 515 * destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable 516 * solution for signals other than SIGFPE. 517 */ 518 void 519 npx_intr(dummy) 520 void *dummy; 521 { 522 int code; 523 struct intrframe *frame; 524 525 if (npxproc == NULL || !npx_exists) { 526 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 527 npxproc, curproc, npx_exists); 528 panic("npxintr from nowhere"); 529 } 530 if (npxproc != curproc) { 531 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 532 npxproc, curproc, npx_exists); 533 panic("npxintr from non-current process"); 534 } 535 536 outb(0xf0, 0); 537 fnstsw(&curpcb->pcb_savefpu.sv_ex_sw); 538 fnclex(); 539 540 /* 541 * Pass exception to process. 542 */ 543 frame = (struct intrframe *)&dummy; /* XXX */ 544 if ((ISPL(frame->if_cs) == SEL_UPL) || (frame->if_eflags & PSL_VM)) { 545 /* 546 * Interrupt is essentially a trap, so we can afford to call 547 * the SIGFPE handler (if any) as soon as the interrupt 548 * returns. 549 * 550 * XXX little or nothing is gained from this, and plenty is 551 * lost - the interrupt frame has to contain the trap frame 552 * (this is otherwise only necessary for the rescheduling trap 553 * in doreti, and the frame for that could easily be set up 554 * just before it is used). 555 */ 556 curproc->p_md.md_regs = INTR_TO_TRAPFRAME(frame); 557 #ifdef notyet 558 /* 559 * Encode the appropriate code for detailed information on 560 * this exception. 561 */ 562 code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw); 563 #else 564 code = 0; /* XXX */ 565 #endif 566 trapsignal(curproc, SIGFPE, code); 567 } else { 568 /* 569 * Nested interrupt. These losers occur when: 570 * o an IRQ13 is bogusly generated at a bogus time, e.g.: 571 * o immediately after an fnsave or frstor of an 572 * error state. 573 * o a couple of 386 instructions after 574 * "fstpl _memvar" causes a stack overflow. 575 * These are especially nasty when combined with a 576 * trace trap. 577 * o an IRQ13 occurs at the same time as another higher- 578 * priority interrupt. 579 * 580 * Treat them like a true async interrupt. 581 */ 582 psignal(curproc, SIGFPE); 583 } 584 } 585 586 /* 587 * Implement device not available (DNA) exception 588 * 589 * It would be better to switch FP context here (if curproc != npxproc) 590 * and not necessarily for every context switch, but it is too hard to 591 * access foreign pcb's. 592 */ 593 int 594 npxdna() 595 { 596 if (!npx_exists) 597 return (0); 598 if (npxproc != NULL) { 599 printf("npxdna: npxproc = %p, curproc = %p\n", 600 npxproc, curproc); 601 panic("npxdna"); 602 } 603 stop_emulating(); 604 /* 605 * Record new context early in case frstor causes an IRQ13. 606 */ 607 npxproc = curproc; 608 curpcb->pcb_savefpu.sv_ex_sw = 0; 609 /* 610 * The following frstor may cause an IRQ13 when the state being 611 * restored has a pending error. The error will appear to have been 612 * triggered by the current (npx) user instruction even when that 613 * instruction is a no-wait instruction that should not trigger an 614 * error (e.g., fnclex). On at least one 486 system all of the 615 * no-wait instructions are broken the same as frstor, so our 616 * treatment does not amplify the breakage. On at least one 617 * 386/Cyrix 387 system, fnclex works correctly while frstor and 618 * fnsave are broken, so our treatment breaks fnclex if it is the 619 * first FPU instruction after a context switch. 620 */ 621 frstor(&curpcb->pcb_savefpu); 622 623 return (1); 624 } 625 626 /* 627 * Wrapper for fnsave instruction to handle h/w bugs. If there is an error 628 * pending, then fnsave generates a bogus IRQ13 on some systems. Force 629 * any IRQ13 to be handled immediately, and then ignore it. This routine is 630 * often called at splhigh so it must not use many system services. In 631 * particular, it's much easier to install a special handler than to 632 * guarantee that it's safe to use npxintr() and its supporting code. 633 */ 634 void 635 npxsave(addr) 636 struct save87 *addr; 637 { 638 #ifdef SMP 639 640 stop_emulating(); 641 fnsave(addr); 642 /* fnop(); */ 643 start_emulating(); 644 npxproc = NULL; 645 646 #else /* SMP */ 647 648 u_char icu1_mask; 649 u_char icu2_mask; 650 u_char old_icu1_mask; 651 u_char old_icu2_mask; 652 struct gate_descriptor save_idt_npxintr; 653 654 disable_intr(); 655 old_icu1_mask = inb(IO_ICU1 + 1); 656 old_icu2_mask = inb(IO_ICU2 + 1); 657 save_idt_npxintr = idt[npx_intrno]; 658 outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask)); 659 outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8)); 660 idt[npx_intrno] = npx_idt_probeintr; 661 enable_intr(); 662 stop_emulating(); 663 fnsave(addr); 664 fnop(); 665 start_emulating(); 666 npxproc = NULL; 667 disable_intr(); 668 icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */ 669 icu2_mask = inb(IO_ICU2 + 1); 670 outb(IO_ICU1 + 1, 671 (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask)); 672 outb(IO_ICU2 + 1, 673 (icu2_mask & ~(npx0_imask >> 8)) 674 | (old_icu2_mask & (npx0_imask >> 8))); 675 idt[npx_intrno] = save_idt_npxintr; 676 enable_intr(); /* back to usual state */ 677 678 #endif /* SMP */ 679 } 680 681 #ifdef I586_CPU 682 static long 683 timezero(funcname, func) 684 const char *funcname; 685 void (*func) __P((void *buf, size_t len)); 686 687 { 688 void *buf; 689 #define BUFSIZE 1000000 690 long usec; 691 struct timeval finish, start; 692 693 buf = malloc(BUFSIZE, M_TEMP, M_NOWAIT); 694 if (buf == NULL) 695 return (BUFSIZE); 696 microtime(&start); 697 (*func)(buf, BUFSIZE); 698 microtime(&finish); 699 usec = 1000000 * (finish.tv_sec - start.tv_sec) + 700 finish.tv_usec - start.tv_usec; 701 if (usec <= 0) 702 usec = 1; 703 if (bootverbose) 704 printf("%s bandwidth = %ld bytes/sec\n", 705 funcname, (long)(BUFSIZE * (int64_t)1000000 / usec)); 706 free(buf, M_TEMP); 707 return (usec); 708 } 709 #endif /* I586_CPU */ 710 711 static device_method_t npx_methods[] = { 712 /* Device interface */ 713 DEVMETHOD(device_probe, npx_probe), 714 DEVMETHOD(device_attach, npx_attach), 715 DEVMETHOD(device_detach, bus_generic_detach), 716 DEVMETHOD(device_shutdown, bus_generic_shutdown), 717 DEVMETHOD(device_suspend, bus_generic_suspend), 718 DEVMETHOD(device_resume, bus_generic_resume), 719 720 { 0, 0 } 721 }; 722 723 static driver_t npx_driver = { 724 "npx", 725 npx_methods, 726 1, /* no softc */ 727 }; 728 729 static devclass_t npx_devclass; 730 731 /* 732 * We prefer to attach to the root nexus so that the usual case (exception 16) 733 * doesn't describe the processor as being `on isa'. 734 */ 735 DRIVER_MODULE(npx, nexus, npx_driver, npx_devclass, 0, 0); 736 737 #endif /* NNPX > 0 */ 738