1 /*- 2 * Copyright (c) 1990 William Jolitz. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 35 * $Id: npx.c,v 1.34 1996/11/30 14:08:44 bde Exp $ 36 */ 37 38 #include "npx.h" 39 #if NNPX > 0 40 41 #include "opt_cpu.h" 42 #include "opt_math_emulate.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/sysctl.h> 48 #include <sys/conf.h> 49 #include <sys/file.h> 50 #include <sys/proc.h> 51 #include <sys/ioctl.h> 52 #include <sys/syslog.h> 53 #include <sys/signalvar.h> 54 55 #include <machine/cpu.h> 56 #include <machine/pcb.h> 57 #include <machine/md_var.h> 58 #include <machine/trap.h> 59 #include <machine/clock.h> 60 #include <machine/specialreg.h> 61 62 #include <i386/isa/icu.h> 63 #include <i386/isa/isa_device.h> 64 #include <i386/isa/isa.h> 65 66 /* 67 * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. 68 */ 69 70 /* Configuration flags. */ 71 #define NPX_DISABLE_I586_OPTIMIZED_BCOPY (1 << 0) 72 #define NPX_DISABLE_I586_OPTIMIZED_BZERO (1 << 1) 73 #define NPX_DISABLE_I586_OPTIMIZED_COPYIO (1 << 2) 74 75 /* XXX - should be in header file. */ 76 extern void (*bcopy_vector) __P((const void *from, void *to, size_t len)); 77 extern void (*ovbcopy_vector) __P((const void *from, void *to, size_t len)); 78 extern int (*copyin_vector) __P((const void *udaddr, void *kaddr, size_t len)); 79 extern int (*copyout_vector) __P((const void *kaddr, void *udaddr, size_t len)); 80 81 void i586_bcopy __P((const void *from, void *to, size_t len)); 82 void i586_bzero __P((void *buf, size_t len)); 83 int i586_copyin __P((const void *udaddr, void *kaddr, size_t len)); 84 int i586_copyout __P((const void *kaddr, void *udaddr, size_t len)); 85 86 #ifdef __GNUC__ 87 88 #define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr))) 89 #define fnclex() __asm("fnclex") 90 #define fninit() __asm("fninit") 91 #define fnop() __asm("fnop") 92 #define fnsave(addr) __asm("fnsave %0" : "=m" (*(addr))) 93 #define fnstcw(addr) __asm("fnstcw %0" : "=m" (*(addr))) 94 #define fnstsw(addr) __asm("fnstsw %0" : "=m" (*(addr))) 95 #define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop") 96 #define frstor(addr) __asm("frstor %0" : : "m" (*(addr))) 97 #define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 98 : : "n" (CR0_TS) : "ax") 99 #define stop_emulating() __asm("clts") 100 101 #else /* not __GNUC__ */ 102 103 void fldcw __P((caddr_t addr)); 104 void fnclex __P((void)); 105 void fninit __P((void)); 106 void fnop __P((void)); 107 void fnsave __P((caddr_t addr)); 108 void fnstcw __P((caddr_t addr)); 109 void fnstsw __P((caddr_t addr)); 110 void fp_divide_by_0 __P((void)); 111 void frstor __P((caddr_t addr)); 112 void start_emulating __P((void)); 113 void stop_emulating __P((void)); 114 115 #endif /* __GNUC__ */ 116 117 typedef u_char bool_t; 118 119 static int npxattach __P((struct isa_device *dvp)); 120 static int npxprobe __P((struct isa_device *dvp)); 121 static int npxprobe1 __P((struct isa_device *dvp)); 122 123 struct isa_driver npxdriver = { 124 npxprobe, npxattach, "npx", 125 }; 126 127 int hw_float; /* XXX currently just alias for npx_exists */ 128 129 SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint, 130 CTLFLAG_RD, &hw_float, 0, 131 "Floatingpoint instructions executed in hardware"); 132 133 static u_int npx0_imask = SWI_CLOCK_MASK; 134 struct proc *npxproc; 135 136 static bool_t npx_ex16; 137 static bool_t npx_exists; 138 static struct gate_descriptor npx_idt_probeintr; 139 static int npx_intrno; 140 static volatile u_int npx_intrs_while_probing; 141 static bool_t npx_irq13; 142 static volatile u_int npx_traps_while_probing; 143 144 /* 145 * Special interrupt handlers. Someday intr0-intr15 will be used to count 146 * interrupts. We'll still need a special exception 16 handler. The busy 147 * latch stuff in probeintr() can be moved to npxprobe(). 148 */ 149 inthand_t probeintr; 150 asm 151 (" 152 .text 153 _probeintr: 154 ss 155 incl _npx_intrs_while_probing 156 pushl %eax 157 movb $0x20,%al # EOI (asm in strings loses cpp features) 158 outb %al,$0xa0 # IO_ICU2 159 outb %al,$0x20 # IO_ICU1 160 movb $0,%al 161 outb %al,$0xf0 # clear BUSY# latch 162 popl %eax 163 iret 164 "); 165 166 inthand_t probetrap; 167 asm 168 (" 169 .text 170 _probetrap: 171 ss 172 incl _npx_traps_while_probing 173 fnclex 174 iret 175 "); 176 177 /* 178 * Probe routine. Initialize cr0 to give correct behaviour for [f]wait 179 * whether the device exists or not (XXX should be elsewhere). Set flags 180 * to tell npxattach() what to do. Modify device struct if npx doesn't 181 * need to use interrupts. Return 1 if device exists. 182 */ 183 static int 184 npxprobe(dvp) 185 struct isa_device *dvp; 186 { 187 int result; 188 u_long save_eflags; 189 u_char save_icu1_mask; 190 u_char save_icu2_mask; 191 struct gate_descriptor save_idt_npxintr; 192 struct gate_descriptor save_idt_npxtrap; 193 /* 194 * This routine is now just a wrapper for npxprobe1(), to install 195 * special npx interrupt and trap handlers, to enable npx interrupts 196 * and to disable other interrupts. Someday isa_configure() will 197 * install suitable handlers and run with interrupts enabled so we 198 * won't need to do so much here. 199 */ 200 npx_intrno = NRSVIDT + ffs(dvp->id_irq) - 1; 201 save_eflags = read_eflags(); 202 disable_intr(); 203 save_icu1_mask = inb(IO_ICU1 + 1); 204 save_icu2_mask = inb(IO_ICU2 + 1); 205 save_idt_npxintr = idt[npx_intrno]; 206 save_idt_npxtrap = idt[16]; 207 outb(IO_ICU1 + 1, ~(IRQ_SLAVE | dvp->id_irq)); 208 outb(IO_ICU2 + 1, ~(dvp->id_irq >> 8)); 209 setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 210 setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 211 npx_idt_probeintr = idt[npx_intrno]; 212 enable_intr(); 213 result = npxprobe1(dvp); 214 disable_intr(); 215 outb(IO_ICU1 + 1, save_icu1_mask); 216 outb(IO_ICU2 + 1, save_icu2_mask); 217 idt[npx_intrno] = save_idt_npxintr; 218 idt[16] = save_idt_npxtrap; 219 write_eflags(save_eflags); 220 return (result); 221 } 222 223 static int 224 npxprobe1(dvp) 225 struct isa_device *dvp; 226 { 227 u_short control; 228 u_short status; 229 230 /* 231 * Partially reset the coprocessor, if any. Some BIOS's don't reset 232 * it after a warm boot. 233 */ 234 outb(0xf1, 0); /* full reset on some systems, NOP on others */ 235 outb(0xf0, 0); /* clear BUSY# latch */ 236 /* 237 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 238 * instructions. We must set the CR0_MP bit and use the CR0_TS 239 * bit to control the trap, because setting the CR0_EM bit does 240 * not cause WAIT instructions to trap. It's important to trap 241 * WAIT instructions - otherwise the "wait" variants of no-wait 242 * control instructions would degenerate to the "no-wait" variants 243 * after FP context switches but work correctly otherwise. It's 244 * particularly important to trap WAITs when there is no NPX - 245 * otherwise the "wait" variants would always degenerate. 246 * 247 * Try setting CR0_NE to get correct error reporting on 486DX's. 248 * Setting it should fail or do nothing on lesser processors. 249 */ 250 load_cr0(rcr0() | CR0_MP | CR0_NE); 251 /* 252 * But don't trap while we're probing. 253 */ 254 stop_emulating(); 255 /* 256 * Finish resetting the coprocessor, if any. If there is an error 257 * pending, then we may get a bogus IRQ13, but probeintr() will handle 258 * it OK. Bogus halts have never been observed, but we enabled 259 * IRQ13 and cleared the BUSY# latch early to handle them anyway. 260 */ 261 fninit(); 262 /* 263 * Don't use fwait here because it might hang. 264 * Don't use fnop here because it usually hangs if there is no FPU. 265 */ 266 DELAY(1000); /* wait for any IRQ13 */ 267 #ifdef DIAGNOSTIC 268 if (npx_intrs_while_probing != 0) 269 printf("fninit caused %u bogus npx interrupt(s)\n", 270 npx_intrs_while_probing); 271 if (npx_traps_while_probing != 0) 272 printf("fninit caused %u bogus npx trap(s)\n", 273 npx_traps_while_probing); 274 #endif 275 /* 276 * Check for a status of mostly zero. 277 */ 278 status = 0x5a5a; 279 fnstsw(&status); 280 if ((status & 0xb8ff) == 0) { 281 /* 282 * Good, now check for a proper control word. 283 */ 284 control = 0x5a5a; 285 fnstcw(&control); 286 if ((control & 0x1f3f) == 0x033f) { 287 hw_float = npx_exists = 1; 288 /* 289 * We have an npx, now divide by 0 to see if exception 290 * 16 works. 291 */ 292 control &= ~(1 << 2); /* enable divide by 0 trap */ 293 fldcw(&control); 294 npx_traps_while_probing = npx_intrs_while_probing = 0; 295 fp_divide_by_0(); 296 if (npx_traps_while_probing != 0) { 297 /* 298 * Good, exception 16 works. 299 */ 300 npx_ex16 = 1; 301 dvp->id_irq = 0; /* zap the interrupt */ 302 /* 303 * special return value to flag that we do not 304 * actually use any I/O registers 305 */ 306 return (-1); 307 } 308 if (npx_intrs_while_probing != 0) { 309 /* 310 * Bad, we are stuck with IRQ13. 311 */ 312 npx_irq13 = 1; 313 /* 314 * npxattach would be too late to set npx0_imask. 315 */ 316 npx0_imask |= dvp->id_irq; 317 return (IO_NPXSIZE); 318 } 319 /* 320 * Worse, even IRQ13 is broken. Use emulator. 321 */ 322 } 323 } 324 /* 325 * Probe failed, but we want to get to npxattach to initialize the 326 * emulator and say that it has been installed. XXX handle devices 327 * that aren't really devices better. 328 */ 329 dvp->id_irq = 0; 330 /* 331 * special return value to flag that we do not 332 * actually use any I/O registers 333 */ 334 return (-1); 335 } 336 337 /* 338 * Attach routine - announce which it is, and wire into system 339 */ 340 int 341 npxattach(dvp) 342 struct isa_device *dvp; 343 { 344 /* The caller has printed "irq 13" for the npx_irq13 case. */ 345 if (!npx_irq13) { 346 printf("npx%d: ", dvp->id_unit); 347 if (npx_ex16) 348 printf("INT 16 interface\n"); 349 #if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE) 350 else if (npx_exists) { 351 printf("error reporting broken; using 387 emulator\n"); 352 hw_float = npx_exists = 0; 353 } else 354 printf("387 emulator\n"); 355 #else 356 else 357 printf("no 387 emulator in kernel!\n"); 358 #endif 359 } 360 npxinit(__INITIAL_NPXCW__); 361 362 #ifdef I586_CPU 363 if (cpu_class == CPUCLASS_586 && npx_ex16) { 364 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY)) { 365 bcopy_vector = i586_bcopy; 366 ovbcopy_vector = i586_bcopy; 367 } 368 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BZERO)) 369 bzero = i586_bzero; 370 #ifdef notyet 371 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) { 372 copyin_vector = i586_copyin; 373 copyout_vector = i586_copyout; 374 } 375 #endif 376 } 377 #endif 378 379 return (1); /* XXX unused */ 380 } 381 382 /* 383 * Initialize floating point unit. 384 */ 385 void 386 npxinit(control) 387 u_short control; 388 { 389 struct save87 dummy; 390 391 if (!npx_exists) 392 return; 393 /* 394 * fninit has the same h/w bugs as fnsave. Use the detoxified 395 * fnsave to throw away any junk in the fpu. npxsave() initializes 396 * the fpu and sets npxproc = NULL as important side effects. 397 */ 398 npxsave(&dummy); 399 stop_emulating(); 400 fldcw(&control); 401 if (curpcb != NULL) 402 fnsave(&curpcb->pcb_savefpu); 403 start_emulating(); 404 } 405 406 /* 407 * Free coprocessor (if we have it). 408 */ 409 void 410 npxexit(p) 411 struct proc *p; 412 { 413 414 if (p == npxproc) 415 npxsave(&curpcb->pcb_savefpu); 416 if (npx_exists) { 417 u_int masked_exceptions; 418 419 masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw 420 & curpcb->pcb_savefpu.sv_env.en_sw & 0x7f; 421 /* 422 * Overflow, divde by 0, and invalid operand would have 423 * caused a trap in 1.1.5. 424 */ 425 if (masked_exceptions & 0x0d) 426 log(LOG_ERR, 427 "pid %d (%s) exited with masked floating point exceptions 0x%02x\n", 428 p->p_pid, p->p_comm, masked_exceptions); 429 } 430 } 431 432 /* 433 * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE. 434 * 435 * Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now 436 * depend on longjmp() restoring a usable state. Restoring the state 437 * or examining it might fail if we didn't clear exceptions. 438 * 439 * XXX there is no standard way to tell SIGFPE handlers about the error 440 * state. The old interface: 441 * 442 * void handler(int sig, int code, struct sigcontext *scp); 443 * 444 * is broken because it is non-ANSI and because the FP state is not in 445 * struct sigcontext. 446 * 447 * XXX the FP state is not preserved across signal handlers. So signal 448 * handlers cannot afford to do FP unless they preserve the state or 449 * longjmp() out. Both preserving the state and longjmp()ing may be 450 * destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable 451 * solution for signals other than SIGFPE. 452 */ 453 void 454 npxintr(unit) 455 int unit; 456 { 457 int code; 458 struct intrframe *frame; 459 460 if (npxproc == NULL || !npx_exists) { 461 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 462 npxproc, curproc, npx_exists); 463 panic("npxintr from nowhere"); 464 } 465 if (npxproc != curproc) { 466 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 467 npxproc, curproc, npx_exists); 468 panic("npxintr from non-current process"); 469 } 470 471 outb(0xf0, 0); 472 fnstsw(&curpcb->pcb_savefpu.sv_ex_sw); 473 fnclex(); 474 fnop(); 475 476 /* 477 * Pass exception to process. 478 */ 479 frame = (struct intrframe *)&unit; /* XXX */ 480 if (ISPL(frame->if_cs) == SEL_UPL) { 481 /* 482 * Interrupt is essentially a trap, so we can afford to call 483 * the SIGFPE handler (if any) as soon as the interrupt 484 * returns. 485 * 486 * XXX little or nothing is gained from this, and plenty is 487 * lost - the interrupt frame has to contain the trap frame 488 * (this is otherwise only necessary for the rescheduling trap 489 * in doreti, and the frame for that could easily be set up 490 * just before it is used). 491 */ 492 curproc->p_md.md_regs = &frame->if_es; 493 #ifdef notyet 494 /* 495 * Encode the appropriate code for detailed information on 496 * this exception. 497 */ 498 code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw); 499 #else 500 code = 0; /* XXX */ 501 #endif 502 trapsignal(curproc, SIGFPE, code); 503 } else { 504 /* 505 * Nested interrupt. These losers occur when: 506 * o an IRQ13 is bogusly generated at a bogus time, e.g.: 507 * o immediately after an fnsave or frstor of an 508 * error state. 509 * o a couple of 386 instructions after 510 * "fstpl _memvar" causes a stack overflow. 511 * These are especially nasty when combined with a 512 * trace trap. 513 * o an IRQ13 occurs at the same time as another higher- 514 * priority interrupt. 515 * 516 * Treat them like a true async interrupt. 517 */ 518 psignal(curproc, SIGFPE); 519 } 520 } 521 522 /* 523 * Implement device not available (DNA) exception 524 * 525 * It would be better to switch FP context here (if curproc != npxproc) 526 * and not necessarily for every context switch, but it is too hard to 527 * access foreign pcb's. 528 */ 529 int 530 npxdna() 531 { 532 if (!npx_exists) 533 return (0); 534 if (npxproc != NULL) { 535 printf("npxdna: npxproc = %p, curproc = %p\n", 536 npxproc, curproc); 537 panic("npxdna"); 538 } 539 stop_emulating(); 540 /* 541 * Record new context early in case frstor causes an IRQ13. 542 */ 543 npxproc = curproc; 544 curpcb->pcb_savefpu.sv_ex_sw = 0; 545 /* 546 * The following frstor may cause an IRQ13 when the state being 547 * restored has a pending error. The error will appear to have been 548 * triggered by the current (npx) user instruction even when that 549 * instruction is a no-wait instruction that should not trigger an 550 * error (e.g., fnclex). On at least one 486 system all of the 551 * no-wait instructions are broken the same as frstor, so our 552 * treatment does not amplify the breakage. On at least one 553 * 386/Cyrix 387 system, fnclex works correctly while frstor and 554 * fnsave are broken, so our treatment breaks fnclex if it is the 555 * first FPU instruction after a context switch. 556 */ 557 frstor(&curpcb->pcb_savefpu); 558 559 return (1); 560 } 561 562 /* 563 * Wrapper for fnsave instruction to handle h/w bugs. If there is an error 564 * pending, then fnsave generates a bogus IRQ13 on some systems. Force 565 * any IRQ13 to be handled immediately, and then ignore it. This routine is 566 * often called at splhigh so it must not use many system services. In 567 * particular, it's much easier to install a special handler than to 568 * guarantee that it's safe to use npxintr() and its supporting code. 569 */ 570 void 571 npxsave(addr) 572 struct save87 *addr; 573 { 574 u_char icu1_mask; 575 u_char icu2_mask; 576 u_char old_icu1_mask; 577 u_char old_icu2_mask; 578 struct gate_descriptor save_idt_npxintr; 579 580 disable_intr(); 581 old_icu1_mask = inb(IO_ICU1 + 1); 582 old_icu2_mask = inb(IO_ICU2 + 1); 583 save_idt_npxintr = idt[npx_intrno]; 584 outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask)); 585 outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8)); 586 idt[npx_intrno] = npx_idt_probeintr; 587 enable_intr(); 588 stop_emulating(); 589 fnsave(addr); 590 fnop(); 591 start_emulating(); 592 npxproc = NULL; 593 disable_intr(); 594 icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */ 595 icu2_mask = inb(IO_ICU2 + 1); 596 outb(IO_ICU1 + 1, 597 (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask)); 598 outb(IO_ICU2 + 1, 599 (icu2_mask & ~(npx0_imask >> 8)) 600 | (old_icu2_mask & (npx0_imask >> 8))); 601 idt[npx_intrno] = save_idt_npxintr; 602 enable_intr(); /* back to usual state */ 603 } 604 605 #endif /* NNPX > 0 */ 606