1 /*- 2 * Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org> 3 * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki@jp.freebsd.org> 4 * Copyright (c) 2003 Peter Wemm 5 * Copyright (c) 2008-2012 Jung-uk Kim <jkim@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/bus.h> 35 #include <sys/eventhandler.h> 36 #include <sys/kernel.h> 37 #include <sys/malloc.h> 38 #include <sys/memrange.h> 39 #include <sys/smp.h> 40 41 #include <vm/vm.h> 42 #include <vm/pmap.h> 43 44 #include <machine/clock.h> 45 #include <machine/intr_machdep.h> 46 #include <x86/mca.h> 47 #include <machine/pcb.h> 48 #include <machine/pmap.h> 49 #include <machine/specialreg.h> 50 #include <machine/md_var.h> 51 52 #ifdef SMP 53 #include <x86/apicreg.h> 54 #include <machine/smp.h> 55 #include <machine/vmparam.h> 56 #endif 57 58 #include <contrib/dev/acpica/include/acpi.h> 59 60 #include <dev/acpica/acpivar.h> 61 62 #include "acpi_wakecode.h" 63 #include "acpi_wakedata.h" 64 65 /* Make sure the code is less than a page and leave room for the stack. */ 66 CTASSERT(sizeof(wakecode) < PAGE_SIZE - 1024); 67 68 extern int acpi_resume_beep; 69 extern int acpi_reset_video; 70 71 #ifdef SMP 72 extern struct pcb **susppcbs; 73 extern void **suspfpusave; 74 static cpuset_t suspcpus; 75 #else 76 static struct pcb **susppcbs; 77 static void **suspfpusave; 78 #endif 79 80 int acpi_restorecpu(uint64_t, vm_offset_t); 81 82 static void *acpi_alloc_wakeup_handler(void); 83 static void acpi_stop_beep(void *); 84 85 #ifdef SMP 86 static int acpi_wakeup_ap(struct acpi_softc *, int); 87 static void acpi_wakeup_cpus(struct acpi_softc *); 88 #endif 89 90 #define WAKECODE_VADDR(sc) ((sc)->acpi_wakeaddr + (3 * PAGE_SIZE)) 91 #define WAKECODE_PADDR(sc) ((sc)->acpi_wakephys + (3 * PAGE_SIZE)) 92 #define WAKECODE_FIXUP(offset, type, val) do { \ 93 type *addr; \ 94 addr = (type *)(WAKECODE_VADDR(sc) + offset); \ 95 *addr = val; \ 96 } while (0) 97 98 static void 99 acpi_stop_beep(void *arg) 100 { 101 102 if (acpi_resume_beep != 0) 103 timer_spkr_release(); 104 } 105 106 #ifdef SMP 107 static int 108 acpi_wakeup_ap(struct acpi_softc *sc, int cpu) 109 { 110 int vector = (WAKECODE_PADDR(sc) >> 12) & 0xff; 111 int apic_id = cpu_apic_ids[cpu]; 112 int ms; 113 114 WAKECODE_FIXUP(wakeup_pcb, struct pcb *, susppcbs[cpu]); 115 WAKECODE_FIXUP(wakeup_fpusave, void *, suspfpusave[cpu]); 116 WAKECODE_FIXUP(wakeup_gdt, uint16_t, susppcbs[cpu]->pcb_gdt.rd_limit); 117 WAKECODE_FIXUP(wakeup_gdt + 2, uint64_t, 118 susppcbs[cpu]->pcb_gdt.rd_base); 119 WAKECODE_FIXUP(wakeup_cpu, int, cpu); 120 121 /* do an INIT IPI: assert RESET */ 122 lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | 123 APIC_LEVEL_ASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, apic_id); 124 125 /* wait for pending status end */ 126 lapic_ipi_wait(-1); 127 128 /* do an INIT IPI: deassert RESET */ 129 lapic_ipi_raw(APIC_DEST_ALLESELF | APIC_TRIGMOD_LEVEL | 130 APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, 0); 131 132 /* wait for pending status end */ 133 DELAY(10000); /* wait ~10mS */ 134 lapic_ipi_wait(-1); 135 136 /* 137 * next we do a STARTUP IPI: the previous INIT IPI might still be 138 * latched, (P5 bug) this 1st STARTUP would then terminate 139 * immediately, and the previously started INIT IPI would continue. OR 140 * the previous INIT IPI has already run. and this STARTUP IPI will 141 * run. OR the previous INIT IPI was ignored. and this STARTUP IPI 142 * will run. 143 */ 144 145 /* do a STARTUP IPI */ 146 lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | 147 APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP | 148 vector, apic_id); 149 lapic_ipi_wait(-1); 150 DELAY(200); /* wait ~200uS */ 151 152 /* 153 * finally we do a 2nd STARTUP IPI: this 2nd STARTUP IPI should run IF 154 * the previous STARTUP IPI was cancelled by a latched INIT IPI. OR 155 * this STARTUP IPI will be ignored, as only ONE STARTUP IPI is 156 * recognized after hardware RESET or INIT IPI. 157 */ 158 159 lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | 160 APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP | 161 vector, apic_id); 162 lapic_ipi_wait(-1); 163 DELAY(200); /* wait ~200uS */ 164 165 /* Wait up to 5 seconds for it to start. */ 166 for (ms = 0; ms < 5000; ms++) { 167 if (*(int *)(WAKECODE_VADDR(sc) + wakeup_cpu) == 0) 168 return (1); /* return SUCCESS */ 169 DELAY(1000); 170 } 171 return (0); /* return FAILURE */ 172 } 173 174 #define WARMBOOT_TARGET 0 175 #define WARMBOOT_OFF (KERNBASE + 0x0467) 176 #define WARMBOOT_SEG (KERNBASE + 0x0469) 177 178 #define CMOS_REG (0x70) 179 #define CMOS_DATA (0x71) 180 #define BIOS_RESET (0x0f) 181 #define BIOS_WARM (0x0a) 182 183 static void 184 acpi_wakeup_cpus(struct acpi_softc *sc) 185 { 186 uint32_t mpbioswarmvec; 187 int cpu; 188 u_char mpbiosreason; 189 190 /* save the current value of the warm-start vector */ 191 mpbioswarmvec = *((uint32_t *)WARMBOOT_OFF); 192 outb(CMOS_REG, BIOS_RESET); 193 mpbiosreason = inb(CMOS_DATA); 194 195 /* setup a vector to our boot code */ 196 *((volatile u_short *)WARMBOOT_OFF) = WARMBOOT_TARGET; 197 *((volatile u_short *)WARMBOOT_SEG) = WAKECODE_PADDR(sc) >> 4; 198 outb(CMOS_REG, BIOS_RESET); 199 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */ 200 201 /* Wake up each AP. */ 202 for (cpu = 1; cpu < mp_ncpus; cpu++) { 203 if (!CPU_ISSET(cpu, &suspcpus)) 204 continue; 205 if (acpi_wakeup_ap(sc, cpu) == 0) { 206 /* restore the warmstart vector */ 207 *(uint32_t *)WARMBOOT_OFF = mpbioswarmvec; 208 panic("acpi_wakeup: failed to resume AP #%d (PHY #%d)", 209 cpu, cpu_apic_ids[cpu]); 210 } 211 } 212 213 /* restore the warmstart vector */ 214 *(uint32_t *)WARMBOOT_OFF = mpbioswarmvec; 215 216 outb(CMOS_REG, BIOS_RESET); 217 outb(CMOS_DATA, mpbiosreason); 218 } 219 #endif 220 221 int 222 acpi_sleep_machdep(struct acpi_softc *sc, int state) 223 { 224 ACPI_STATUS status; 225 226 if (sc->acpi_wakeaddr == 0ul) 227 return (-1); /* couldn't alloc wake memory */ 228 229 #ifdef SMP 230 suspcpus = all_cpus; 231 CPU_CLR(PCPU_GET(cpuid), &suspcpus); 232 #endif 233 234 if (acpi_resume_beep != 0) 235 timer_spkr_acquire(); 236 237 AcpiSetFirmwareWakingVector(WAKECODE_PADDR(sc)); 238 239 intr_suspend(); 240 241 if (savectx(susppcbs[0])) { 242 ctx_fpusave(suspfpusave[0]); 243 #ifdef SMP 244 if (!CPU_EMPTY(&suspcpus) && suspend_cpus(suspcpus) == 0) { 245 device_printf(sc->acpi_dev, "Failed to suspend APs\n"); 246 return (0); /* couldn't sleep */ 247 } 248 #endif 249 250 WAKECODE_FIXUP(resume_beep, uint8_t, (acpi_resume_beep != 0)); 251 WAKECODE_FIXUP(reset_video, uint8_t, (acpi_reset_video != 0)); 252 253 WAKECODE_FIXUP(wakeup_pcb, struct pcb *, susppcbs[0]); 254 WAKECODE_FIXUP(wakeup_fpusave, void *, suspfpusave[0]); 255 WAKECODE_FIXUP(wakeup_gdt, uint16_t, 256 susppcbs[0]->pcb_gdt.rd_limit); 257 WAKECODE_FIXUP(wakeup_gdt + 2, uint64_t, 258 susppcbs[0]->pcb_gdt.rd_base); 259 WAKECODE_FIXUP(wakeup_cpu, int, 0); 260 261 /* Call ACPICA to enter the desired sleep state */ 262 if (state == ACPI_STATE_S4 && sc->acpi_s4bios) 263 status = AcpiEnterSleepStateS4bios(); 264 else 265 status = AcpiEnterSleepState(state, acpi_sleep_flags); 266 if (ACPI_FAILURE(status)) { 267 device_printf(sc->acpi_dev, 268 "AcpiEnterSleepState failed - %s\n", 269 AcpiFormatException(status)); 270 return (0); /* couldn't sleep */ 271 } 272 273 for (;;) 274 ia32_pause(); 275 } 276 277 return (1); /* wakeup successfully */ 278 } 279 280 int 281 acpi_wakeup_machdep(struct acpi_softc *sc, int state, int sleep_result, 282 int intr_enabled) 283 { 284 285 if (sleep_result == -1) 286 return (sleep_result); 287 288 if (!intr_enabled) { 289 /* Wakeup MD procedures in interrupt disabled context */ 290 if (sleep_result == 1) { 291 pmap_init_pat(); 292 load_cr3(susppcbs[0]->pcb_cr3); 293 initializecpu(); 294 PCPU_SET(switchtime, 0); 295 PCPU_SET(switchticks, ticks); 296 #ifdef SMP 297 if (!CPU_EMPTY(&suspcpus)) 298 acpi_wakeup_cpus(sc); 299 #endif 300 } 301 302 #ifdef SMP 303 if (!CPU_EMPTY(&suspcpus)) 304 restart_cpus(suspcpus); 305 #endif 306 mca_resume(); 307 intr_resume(); 308 309 AcpiSetFirmwareWakingVector(0); 310 } else { 311 /* Wakeup MD procedures in interrupt enabled context */ 312 if (sleep_result == 1 && mem_range_softc.mr_op != NULL && 313 mem_range_softc.mr_op->reinit != NULL) 314 mem_range_softc.mr_op->reinit(&mem_range_softc); 315 } 316 317 return (sleep_result); 318 } 319 320 static void * 321 acpi_alloc_wakeup_handler(void) 322 { 323 void *wakeaddr; 324 int i; 325 326 /* 327 * Specify the region for our wakeup code. We want it in the low 1 MB 328 * region, excluding real mode IVT (0-0x3ff), BDA (0x400-0x4ff), EBDA 329 * (less than 128KB, below 0xa0000, must be excluded by SMAP and DSDT), 330 * and ROM area (0xa0000 and above). The temporary page tables must be 331 * page-aligned. 332 */ 333 wakeaddr = contigmalloc(4 * PAGE_SIZE, M_DEVBUF, M_WAITOK, 0x500, 334 0xa0000, PAGE_SIZE, 0ul); 335 if (wakeaddr == NULL) { 336 printf("%s: can't alloc wake memory\n", __func__); 337 return (NULL); 338 } 339 if (EVENTHANDLER_REGISTER(power_resume, acpi_stop_beep, NULL, 340 EVENTHANDLER_PRI_LAST) == NULL) { 341 printf("%s: can't register event handler\n", __func__); 342 contigfree(wakeaddr, 4 * PAGE_SIZE, M_DEVBUF); 343 return (NULL); 344 } 345 susppcbs = malloc(mp_ncpus * sizeof(*susppcbs), M_DEVBUF, M_WAITOK); 346 suspfpusave = malloc(mp_ncpus * sizeof(void *), M_DEVBUF, M_WAITOK); 347 for (i = 0; i < mp_ncpus; i++) { 348 susppcbs[i] = malloc(sizeof(**susppcbs), M_DEVBUF, M_WAITOK); 349 suspfpusave[i] = alloc_fpusave(M_WAITOK); 350 } 351 352 return (wakeaddr); 353 } 354 355 void 356 acpi_install_wakeup_handler(struct acpi_softc *sc) 357 { 358 static void *wakeaddr = NULL; 359 uint64_t *pt4, *pt3, *pt2; 360 int i; 361 362 if (wakeaddr != NULL) 363 return; 364 365 wakeaddr = acpi_alloc_wakeup_handler(); 366 if (wakeaddr == NULL) 367 return; 368 369 sc->acpi_wakeaddr = (vm_offset_t)wakeaddr; 370 sc->acpi_wakephys = vtophys(wakeaddr); 371 372 bcopy(wakecode, (void *)WAKECODE_VADDR(sc), sizeof(wakecode)); 373 374 /* Patch GDT base address, ljmp targets and page table base address. */ 375 WAKECODE_FIXUP((bootgdtdesc + 2), uint32_t, 376 WAKECODE_PADDR(sc) + bootgdt); 377 WAKECODE_FIXUP((wakeup_sw32 + 2), uint32_t, 378 WAKECODE_PADDR(sc) + wakeup_32); 379 WAKECODE_FIXUP((wakeup_sw64 + 1), uint32_t, 380 WAKECODE_PADDR(sc) + wakeup_64); 381 WAKECODE_FIXUP(wakeup_pagetables, uint32_t, sc->acpi_wakephys); 382 383 /* Save pointers to some global data. */ 384 WAKECODE_FIXUP(wakeup_retaddr, void *, acpi_restorecpu); 385 WAKECODE_FIXUP(wakeup_kpml4, uint64_t, KPML4phys); 386 WAKECODE_FIXUP(wakeup_ctx, vm_offset_t, 387 WAKECODE_VADDR(sc) + wakeup_ctx); 388 WAKECODE_FIXUP(wakeup_efer, uint64_t, rdmsr(MSR_EFER)); 389 WAKECODE_FIXUP(wakeup_star, uint64_t, rdmsr(MSR_STAR)); 390 WAKECODE_FIXUP(wakeup_lstar, uint64_t, rdmsr(MSR_LSTAR)); 391 WAKECODE_FIXUP(wakeup_cstar, uint64_t, rdmsr(MSR_CSTAR)); 392 WAKECODE_FIXUP(wakeup_sfmask, uint64_t, rdmsr(MSR_SF_MASK)); 393 WAKECODE_FIXUP(wakeup_xsmask, uint64_t, xsave_mask); 394 395 /* Build temporary page tables below realmode code. */ 396 pt4 = wakeaddr; 397 pt3 = pt4 + (PAGE_SIZE) / sizeof(uint64_t); 398 pt2 = pt3 + (PAGE_SIZE) / sizeof(uint64_t); 399 400 /* Create the initial 1GB replicated page tables */ 401 for (i = 0; i < 512; i++) { 402 /* 403 * Each slot of the level 4 pages points 404 * to the same level 3 page 405 */ 406 pt4[i] = (uint64_t)(sc->acpi_wakephys + PAGE_SIZE); 407 pt4[i] |= PG_V | PG_RW | PG_U; 408 409 /* 410 * Each slot of the level 3 pages points 411 * to the same level 2 page 412 */ 413 pt3[i] = (uint64_t)(sc->acpi_wakephys + (2 * PAGE_SIZE)); 414 pt3[i] |= PG_V | PG_RW | PG_U; 415 416 /* The level 2 page slots are mapped with 2MB pages for 1GB. */ 417 pt2[i] = i * (2 * 1024 * 1024); 418 pt2[i] |= PG_V | PG_RW | PG_PS | PG_U; 419 } 420 421 if (bootverbose) 422 device_printf(sc->acpi_dev, "wakeup code va %p pa %p\n", 423 (void *)sc->acpi_wakeaddr, (void *)sc->acpi_wakephys); 424 } 425