1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org> 5 * Copyright (c) 2001-2012 Mitsuru IWASAKI <iwasaki@jp.freebsd.org> 6 * Copyright (c) 2003 Peter Wemm 7 * Copyright (c) 2008-2012 Jung-uk Kim <jkim@FreeBSD.org> 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/eventhandler.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/memrange.h> 38 #include <sys/smp.h> 39 #include <sys/systm.h> 40 #include <sys/cons.h> 41 42 #include <vm/vm.h> 43 #include <vm/pmap.h> 44 #include <vm/vm_page.h> 45 46 #include <machine/clock.h> 47 #include <machine/cpu.h> 48 #include <machine/intr_machdep.h> 49 #include <machine/md_var.h> 50 #include <x86/mca.h> 51 #include <machine/pcb.h> 52 #include <machine/specialreg.h> 53 #include <x86/ucode.h> 54 55 #include <x86/apicreg.h> 56 #include <x86/apicvar.h> 57 #include <machine/smp.h> 58 #include <machine/vmparam.h> 59 60 #include <contrib/dev/acpica/include/acpi.h> 61 62 #include <dev/acpica/acpivar.h> 63 64 #include "acpi_wakecode.h" 65 #include "acpi_wakedata.h" 66 67 /* Make sure the code is less than a page and leave room for the stack. */ 68 CTASSERT(sizeof(wakecode) < PAGE_SIZE - 1024); 69 70 extern int acpi_resume_beep; 71 extern int acpi_reset_video; 72 extern int acpi_susp_bounce; 73 74 extern struct susppcb **susppcbs; 75 static cpuset_t suspcpus; 76 77 static void acpi_stop_beep(void *); 78 79 static int acpi_wakeup_ap(struct acpi_softc *, int); 80 static void acpi_wakeup_cpus(struct acpi_softc *); 81 82 #define ACPI_WAKEPT_PAGES 7 83 84 #define WAKECODE_FIXUP(offset, type, val) do { \ 85 type *addr; \ 86 addr = (type *)(sc->acpi_wakeaddr + (offset)); \ 87 *addr = val; \ 88 } while (0) 89 90 static void 91 acpi_stop_beep(void *arg) 92 { 93 94 if (acpi_resume_beep != 0) 95 timer_spkr_release(); 96 } 97 98 static int 99 acpi_wakeup_ap(struct acpi_softc *sc, int cpu) 100 { 101 struct pcb *pcb; 102 int vector = (sc->acpi_wakephys >> 12) & 0xff; 103 int apic_id = cpu_apic_ids[cpu]; 104 int ms; 105 106 pcb = &susppcbs[cpu]->sp_pcb; 107 WAKECODE_FIXUP(wakeup_pcb, struct pcb *, pcb); 108 WAKECODE_FIXUP(wakeup_gdt, uint16_t, pcb->pcb_gdt.rd_limit); 109 WAKECODE_FIXUP(wakeup_gdt + 2, uint64_t, pcb->pcb_gdt.rd_base); 110 111 ipi_startup(apic_id, vector); 112 113 /* Wait up to 5 seconds for it to resume. */ 114 for (ms = 0; ms < 5000; ms++) { 115 if (!CPU_ISSET(cpu, &suspended_cpus)) 116 return (1); /* return SUCCESS */ 117 DELAY(1000); 118 } 119 return (0); /* return FAILURE */ 120 } 121 122 #define WARMBOOT_TARGET 0 123 #define WARMBOOT_OFF (KERNBASE + 0x0467) 124 #define WARMBOOT_SEG (KERNBASE + 0x0469) 125 126 #define CMOS_REG (0x70) 127 #define CMOS_DATA (0x71) 128 #define BIOS_RESET (0x0f) 129 #define BIOS_WARM (0x0a) 130 131 static void 132 acpi_wakeup_cpus(struct acpi_softc *sc) 133 { 134 uint32_t mpbioswarmvec; 135 int cpu; 136 u_char mpbiosreason; 137 138 if (!efi_boot) { 139 /* save the current value of the warm-start vector */ 140 mpbioswarmvec = *((uint32_t *)WARMBOOT_OFF); 141 outb(CMOS_REG, BIOS_RESET); 142 mpbiosreason = inb(CMOS_DATA); 143 144 /* setup a vector to our boot code */ 145 *((volatile u_short *)WARMBOOT_OFF) = WARMBOOT_TARGET; 146 *((volatile u_short *)WARMBOOT_SEG) = sc->acpi_wakephys >> 4; 147 outb(CMOS_REG, BIOS_RESET); 148 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */ 149 } 150 151 /* Wake up each AP. */ 152 for (cpu = 1; cpu < mp_ncpus; cpu++) { 153 if (!CPU_ISSET(cpu, &suspcpus)) 154 continue; 155 if (acpi_wakeup_ap(sc, cpu) == 0) { 156 /* restore the warmstart vector */ 157 *(uint32_t *)WARMBOOT_OFF = mpbioswarmvec; 158 panic("acpi_wakeup: failed to resume AP #%d (PHY #%d)", 159 cpu, cpu_apic_ids[cpu]); 160 } 161 } 162 163 if (!efi_boot) { 164 /* restore the warmstart vector */ 165 *(uint32_t *)WARMBOOT_OFF = mpbioswarmvec; 166 167 outb(CMOS_REG, BIOS_RESET); 168 outb(CMOS_DATA, mpbiosreason); 169 } 170 } 171 172 int 173 acpi_sleep_machdep(struct acpi_softc *sc, int state) 174 { 175 ACPI_STATUS status; 176 struct pcb *pcb; 177 struct pcpu *pc; 178 int i; 179 180 if (sc->acpi_wakeaddr == 0ul) 181 return (-1); /* couldn't alloc wake memory */ 182 183 suspcpus = all_cpus; 184 CPU_CLR(PCPU_GET(cpuid), &suspcpus); 185 186 if (acpi_resume_beep != 0) 187 timer_spkr_acquire(); 188 189 AcpiSetFirmwareWakingVector(sc->acpi_wakephys, 0); 190 191 intr_suspend(); 192 193 if (vmm_suspend_p != NULL) 194 vmm_suspend_p(); 195 196 pcb = &susppcbs[0]->sp_pcb; 197 if (savectx(pcb)) { 198 fpususpend(susppcbs[0]->sp_fpususpend); 199 if (!CPU_EMPTY(&suspcpus) && suspend_cpus(suspcpus) == 0) { 200 device_printf(sc->acpi_dev, "Failed to suspend APs\n"); 201 return (0); /* couldn't sleep */ 202 } 203 hw_ibrs_ibpb_active = 0; 204 hw_ssb_active = 0; 205 cpu_stdext_feature3 = 0; 206 CPU_FOREACH(i) { 207 pc = pcpu_find(i); 208 pc->pc_ibpb_set = 0; 209 } 210 211 WAKECODE_FIXUP(resume_beep, uint8_t, (acpi_resume_beep != 0)); 212 WAKECODE_FIXUP(reset_video, uint8_t, (acpi_reset_video != 0)); 213 214 WAKECODE_FIXUP(wakeup_efer, uint64_t, rdmsr(MSR_EFER) & 215 ~(EFER_LMA)); 216 WAKECODE_FIXUP(wakeup_pcb, struct pcb *, pcb); 217 WAKECODE_FIXUP(wakeup_gdt, uint16_t, pcb->pcb_gdt.rd_limit); 218 WAKECODE_FIXUP(wakeup_gdt + 2, uint64_t, pcb->pcb_gdt.rd_base); 219 220 /* Call ACPICA to enter the desired sleep state */ 221 if (state == ACPI_STATE_S4 && sc->acpi_s4bios) 222 status = AcpiEnterSleepStateS4bios(); 223 else 224 status = AcpiEnterSleepState(state); 225 if (ACPI_FAILURE(status)) { 226 device_printf(sc->acpi_dev, 227 "AcpiEnterSleepState failed - %s\n", 228 AcpiFormatException(status)); 229 return (0); /* couldn't sleep */ 230 } 231 232 if (acpi_susp_bounce) 233 resumectx(pcb); 234 235 for (;;) 236 ia32_pause(); 237 } else { 238 /* 239 * Re-initialize console hardware as soon as possible. 240 * No console output (e.g. printf) is allowed before 241 * this point. 242 */ 243 cnresume(); 244 fpuresume(susppcbs[0]->sp_fpususpend); 245 } 246 247 return (1); /* wakeup successfully */ 248 } 249 250 int 251 acpi_wakeup_machdep(struct acpi_softc *sc, int state, int sleep_result, 252 int intr_enabled) 253 { 254 255 if (sleep_result == -1) 256 return (sleep_result); 257 258 if (!intr_enabled) { 259 /* Wakeup MD procedures in interrupt disabled context */ 260 if (sleep_result == 1) { 261 ucode_reload(); 262 pmap_init_pat(); 263 initializecpu(); 264 PCPU_SET(switchtime, 0); 265 PCPU_SET(switchticks, ticks); 266 lapic_xapic_mode(); 267 if (!CPU_EMPTY(&suspcpus)) 268 acpi_wakeup_cpus(sc); 269 } 270 271 if (!CPU_EMPTY(&suspcpus)) 272 resume_cpus(suspcpus); 273 274 /* 275 * Re-read cpu_stdext_feature3, which was zeroed-out 276 * in acpi_sleep_machdep(), after the microcode was 277 * reloaded. Then recalculate the active mitigation 278 * knobs that depend on the microcode and 279 * cpu_stdext_feature3. Do it after LAPICs are woken, 280 * so that IPIs work. 281 */ 282 identify_cpu_ext_features(); 283 284 mca_resume(); 285 if (vmm_resume_p != NULL) 286 vmm_resume_p(); 287 intr_resume(/*suspend_cancelled*/false); 288 289 hw_ibrs_recalculate(true); 290 amd64_syscall_ret_flush_l1d_recalc(); 291 hw_ssb_recalculate(true); 292 x86_rngds_mitg_recalculate(true); 293 zenbleed_check_and_apply(true); 294 295 AcpiSetFirmwareWakingVector(0, 0); 296 } else { 297 /* Wakeup MD procedures in interrupt enabled context */ 298 if (sleep_result == 1 && mem_range_softc.mr_op != NULL && 299 mem_range_softc.mr_op->reinit != NULL) 300 mem_range_softc.mr_op->reinit(&mem_range_softc); 301 } 302 303 return (sleep_result); 304 } 305 306 static void 307 acpi_alloc_wakeup_handler(void **wakeaddr, 308 void *wakept_pages[ACPI_WAKEPT_PAGES]) 309 { 310 vm_page_t wakept_m[ACPI_WAKEPT_PAGES]; 311 int i; 312 313 *wakeaddr = NULL; 314 memset(wakept_pages, 0, ACPI_WAKEPT_PAGES * sizeof(*wakept_pages)); 315 memset(wakept_m, 0, ACPI_WAKEPT_PAGES * sizeof(*wakept_m)); 316 317 /* 318 * Specify the region for our wakeup code. We want it in the 319 * low 1 MB region, excluding real mode IVT (0-0x3ff), BDA 320 * (0x400-0x4ff), EBDA (less than 128KB, below 0xa0000, must 321 * be excluded by SMAP and DSDT), and ROM area (0xa0000 and 322 * above). 323 */ 324 *wakeaddr = contigmalloc(PAGE_SIZE, M_DEVBUF, 325 M_NOWAIT, 0x500, 0xa0000, PAGE_SIZE, 0ul); 326 if (*wakeaddr == NULL) { 327 printf("%s: can't alloc wake memory\n", __func__); 328 goto freepages; 329 } 330 331 for (i = 0; i < ACPI_WAKEPT_PAGES - (la57 ? 0 : 1); i++) { 332 wakept_m[i] = pmap_page_alloc_below_4g(true); 333 wakept_pages[i] = (void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS( 334 wakept_m[i])); 335 } 336 if (EVENTHANDLER_REGISTER(power_resume, acpi_stop_beep, NULL, 337 EVENTHANDLER_PRI_LAST) == NULL) { 338 printf("%s: can't register event handler\n", __func__); 339 goto freepages; 340 } 341 susppcbs = malloc(mp_ncpus * sizeof(*susppcbs), M_DEVBUF, M_WAITOK); 342 for (i = 0; i < mp_ncpus; i++) { 343 susppcbs[i] = malloc(sizeof(**susppcbs), M_DEVBUF, M_WAITOK); 344 susppcbs[i]->sp_fpususpend = alloc_fpusave(M_WAITOK); 345 } 346 return; 347 348 freepages: 349 free(*wakeaddr, M_DEVBUF); 350 for (i = 0; i < ACPI_WAKEPT_PAGES; i++) { 351 if (wakept_m[i] != NULL) 352 vm_page_free(wakept_m[i]); 353 } 354 *wakeaddr = NULL; 355 } 356 357 void 358 acpi_install_wakeup_handler(struct acpi_softc *sc) 359 { 360 static void *wakeaddr; 361 void *wakept_pages[ACPI_WAKEPT_PAGES]; 362 uint64_t *pt5, *pt4, *pt3, *pt2_0, *pt2_1, *pt2_2, *pt2_3; 363 vm_paddr_t pt5pa, pt4pa, pt3pa, pt2_0pa, pt2_1pa, pt2_2pa, pt2_3pa; 364 int i; 365 366 if (wakeaddr != NULL) 367 return; 368 acpi_alloc_wakeup_handler(&wakeaddr, wakept_pages); 369 if (wakeaddr == NULL) 370 return; 371 372 sc->acpi_wakeaddr = (vm_offset_t)wakeaddr; 373 sc->acpi_wakephys = vtophys(wakeaddr); 374 375 if (la57) { 376 pt5 = wakept_pages[6]; 377 pt5pa = vtophys(pt5); 378 } 379 pt4 = wakept_pages[0]; 380 pt3 = wakept_pages[1]; 381 pt2_0 = wakept_pages[2]; 382 pt2_1 = wakept_pages[3]; 383 pt2_2 = wakept_pages[4]; 384 pt2_3 = wakept_pages[5]; 385 pt4pa = vtophys(pt4); 386 pt3pa = vtophys(pt3); 387 pt2_0pa = vtophys(pt2_0); 388 pt2_1pa = vtophys(pt2_1); 389 pt2_2pa = vtophys(pt2_2); 390 pt2_3pa = vtophys(pt2_3); 391 392 bcopy(wakecode, (void *)sc->acpi_wakeaddr, sizeof(wakecode)); 393 394 /* Patch GDT base address, ljmp targets. */ 395 WAKECODE_FIXUP((bootgdtdesc + 2), uint32_t, 396 sc->acpi_wakephys + bootgdt); 397 WAKECODE_FIXUP((wakeup_sw32 + 2), uint32_t, 398 sc->acpi_wakephys + wakeup_32); 399 WAKECODE_FIXUP((wakeup_sw64 + 1), uint32_t, 400 sc->acpi_wakephys + wakeup_64); 401 WAKECODE_FIXUP(wakeup_pagetables, uint32_t, la57 ? (pt5pa | 0x1) : 402 pt4pa); 403 404 /* Save pointers to some global data. */ 405 WAKECODE_FIXUP(wakeup_ret, void *, resumectx); 406 /* Create 1:1 mapping for the low 4G */ 407 if (la57) { 408 bcopy(kernel_pmap->pm_pmltop, pt5, PAGE_SIZE); 409 pt5[0] = (uint64_t)pt4pa; 410 pt5[0] |= PG_V | PG_RW | PG_U; 411 } else { 412 bcopy(kernel_pmap->pm_pmltop, pt4, PAGE_SIZE); 413 } 414 415 pt4[0] = (uint64_t)pt3pa; 416 pt4[0] |= PG_V | PG_RW | PG_U; 417 418 pt3[0] = (uint64_t)pt2_0pa; 419 pt3[0] |= PG_V | PG_RW | PG_U; 420 pt3[1] = (uint64_t)pt2_1pa; 421 pt3[1] |= PG_V | PG_RW | PG_U; 422 pt3[2] = (uint64_t)pt2_2pa; 423 pt3[2] |= PG_V | PG_RW | PG_U; 424 pt3[3] = (uint64_t)pt2_3pa; 425 pt3[3] |= PG_V | PG_RW | PG_U; 426 427 for (i = 0; i < NPDEPG; i++) { 428 pt2_0[i] = (pd_entry_t)i * NBPDR; 429 pt2_0[i] |= PG_V | PG_RW | PG_PS | PG_U; 430 } 431 for (i = 0; i < NPDEPG; i++) { 432 pt2_1[i] = (pd_entry_t)NBPDP + i * NBPDR; 433 pt2_1[i] |= PG_V | PG_RW | PG_PS | PG_U; 434 } 435 for (i = 0; i < NPDEPG; i++) { 436 pt2_2[i] = (pd_entry_t)2 * NBPDP + i * NBPDR; 437 pt2_2[i] |= PG_V | PG_RW | PG_PS | PG_U; 438 } 439 for (i = 0; i < NPDEPG; i++) { 440 pt2_3[i] = (pd_entry_t)3 * NBPDP + i * NBPDR; 441 pt2_3[i] |= PG_V | PG_RW | PG_PS | PG_U; 442 } 443 444 if (bootverbose) 445 device_printf(sc->acpi_dev, "wakeup code va %#jx pa %#jx\n", 446 (uintmax_t)sc->acpi_wakeaddr, (uintmax_t)sc->acpi_wakephys); 447 } 448