1/*- 2 * Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org> 3 * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki@jp.freebsd.org> 4 * Copyright (c) 2003 Peter Wemm 5 * Copyright (c) 2008-2009 Jung-uk Kim <jkim@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32#define LOCORE 33 34#include <machine/asmacros.h> 35#include <machine/specialreg.h> 36 37#include "assym.s" 38 39/* 40 * Resume entry point for real mode. 41 * 42 * If XFirmwareWakingVector is zero and FirmwareWakingVector is non-zero 43 * in FACS, the BIOS enters here in real mode after POST with CS set to 44 * (FirmwareWakingVector >> 4) and IP set to (FirmwareWakingVector & 0xf). 45 * Depending on the previous sleep state, we may need to initialize more 46 * of the system (i.e., S3 suspend-to-RAM vs. S4 suspend-to-disk). 47 * 48 * Note: If XFirmwareWakingVector is non-zero, it should disable address 49 * translation/paging and interrupts, load all segment registers with 50 * a flat 4 GB address space, and set EFLAGS.IF to zero. Currently 51 * this mode is not supported by this code. 52 */ 53 54 .data /* So we can modify it */ 55 56 ALIGN_TEXT 57 .code16 58wakeup_start: 59 /* 60 * Set up segment registers for real mode, a small stack for 61 * any calls we make, and clear any flags. 62 */ 63 cli /* make sure no interrupts */ 64 mov %cs, %ax /* copy %cs to %ds. Remember these */ 65 mov %ax, %ds /* are offsets rather than selectors */ 66 mov %ax, %ss 67 movw $PAGE_SIZE, %sp 68 xorw %ax, %ax 69 pushw %ax 70 popfw 71 72 /* To debug resume hangs, beep the speaker if the user requested. */ 73 testb $~0, resume_beep - wakeup_start 74 jz 1f 75 movb $0, resume_beep - wakeup_start 76 movb $0xc0, %al 77 outb %al, $0x42 78 movb $0x04, %al 79 outb %al, $0x42 80 inb $0x61, %al 81 orb $0x3, %al 82 outb %al, $0x61 831: 84 85 /* Re-initialize video BIOS if the reset_video tunable is set. */ 86 testb $~0, reset_video - wakeup_start 87 jz 1f 88 movb $0, reset_video - wakeup_start 89 lcall $0xc000, $3 90 91 /* When we reach here, int 0x10 should be ready. Hide cursor. */ 92 movb $0x01, %ah 93 movb $0x20, %ch 94 int $0x10 95 96 /* Re-start in case the previous BIOS call clobbers them. */ 97 jmp wakeup_start 981: 99 100 /* 101 * Find relocation base and patch the gdt descript and ljmp targets 102 */ 103 xorl %ebx, %ebx 104 mov %cs, %bx 105 sall $4, %ebx /* %ebx is now our relocation base */ 106 107 /* 108 * Load the descriptor table pointer. We'll need it when running 109 * in 16-bit protected mode. 110 */ 111 lgdtl bootgdtdesc - wakeup_start 112 113 /* Enable protected mode */ 114 movl $CR0_PE, %eax 115 mov %eax, %cr0 116 117 /* 118 * Now execute a far jump to turn on protected mode. This 119 * causes the segment registers to turn into selectors and causes 120 * %cs to be loaded from the gdt. 121 * 122 * The following instruction is: 123 * ljmpl $bootcode32 - bootgdt, $wakeup_32 - wakeup_start 124 * but gas cannot assemble that. And besides, we patch the targets 125 * in early startup and its a little clearer what we are patching. 126 */ 127wakeup_sw32: 128 .byte 0x66 /* size override to 32 bits */ 129 .byte 0xea /* opcode for far jump */ 130 .long wakeup_32 - wakeup_start /* offset in segment */ 131 .word bootcode32 - bootgdt /* index in gdt for 32 bit code */ 132 133 /* 134 * At this point, we are running in 32 bit legacy protected mode. 135 */ 136 ALIGN_TEXT 137 .code32 138wakeup_32: 139 140 mov $bootdata32 - bootgdt, %eax 141 mov %ax, %ds 142 143 /* Turn on the PAE and PSE bits for when paging is enabled */ 144 mov %cr4, %eax 145 orl $(CR4_PAE | CR4_PSE), %eax 146 mov %eax, %cr4 147 148 /* 149 * Enable EFER.LME so that we get long mode when all the prereqs are 150 * in place. In this case, it turns on when CR0_PG is finally enabled. 151 * Pick up a few other EFER bits that we'll use need we're here. 152 */ 153 movl $MSR_EFER, %ecx 154 rdmsr 155 orl $EFER_LME | EFER_SCE, %eax 156 wrmsr 157 158 /* 159 * Point to the embedded page tables for startup. Note that this 160 * only gets accessed after we're actually in 64 bit mode, however 161 * we can only set the bottom 32 bits of %cr3 in this state. This 162 * means we are required to use a temporary page table that is below 163 * the 4GB limit. %ebx is still our relocation base. We could just 164 * subtract 3 * PAGE_SIZE, but that would be too easy. 165 */ 166 leal wakeup_pagetables - wakeup_start(%ebx), %eax 167 movl (%eax), %eax 168 mov %eax, %cr3 169 170 /* 171 * Finally, switch to long bit mode by enabling paging. We have 172 * to be very careful here because all the segmentation disappears 173 * out from underneath us. The spec says we can depend on the 174 * subsequent pipelined branch to execute, but *only if* everthing 175 * is still identity mapped. If any mappings change, the pipeline 176 * will flush. 177 */ 178 mov %cr0, %eax 179 orl $CR0_PG, %eax 180 mov %eax, %cr0 181 182 /* 183 * At this point paging is enabled, and we are in "compatability" mode. 184 * We do another far jump to reload %cs with the 64 bit selector. 185 * %cr3 points to a 4-level page table page. 186 * We cannot yet jump all the way to the kernel because we can only 187 * specify a 32 bit linear address. So, yet another trampoline. 188 * 189 * The following instruction is: 190 * ljmp $bootcode64 - bootgdt, $wakeup_64 - wakeup_start 191 * but gas cannot assemble that. And besides, we patch the targets 192 * in early startup and its a little clearer what we are patching. 193 */ 194wakeup_sw64: 195 .byte 0xea /* opcode for far jump */ 196 .long wakeup_64 - wakeup_start /* offset in segment */ 197 .word bootcode64 - bootgdt /* index in gdt for 64 bit code */ 198 199 /* 200 * Yeehar! We're running in 64-bit mode! We can mostly ignore our 201 * segment registers, and get on with it. 202 * Note that we are running at the correct virtual address, but with 203 * a 1:1 1GB mirrored mapping over entire address space. We had better 204 * switch to a real %cr3 promptly so that we can get to the direct map 205 * space. Remember that jmp is relative and that we've been relocated, 206 * so use an indirect jump. 207 */ 208 ALIGN_TEXT 209 .code64 210wakeup_64: 211 mov $bootdata64 - bootgdt, %eax 212 mov %ax, %ds 213 214 /* Restore arguments and return. */ 215 movq wakeup_ctx - wakeup_start(%rbx), %rdi 216 movq wakeup_kpml4 - wakeup_start(%rbx), %rsi 217 movq wakeup_retaddr - wakeup_start(%rbx), %rax 218 jmp *%rax 219 220 .data 221 222resume_beep: 223 .byte 0 224reset_video: 225 .byte 0 226 227 ALIGN_DATA 228bootgdt: 229 .long 0x00000000 230 .long 0x00000000 231 .long 0x00000000 232 .long 0x00000000 233 .long 0x00000000 234 .long 0x00000000 235 .long 0x00000000 236 .long 0x00000000 237 238bootcode64: 239 .long 0x0000ffff 240 .long 0x00af9b00 241 242bootdata64: 243 .long 0x0000ffff 244 .long 0x00af9300 245 246bootcode32: 247 .long 0x0000ffff 248 .long 0x00cf9b00 249 250bootdata32: 251 .long 0x0000ffff 252 .long 0x00cf9300 253bootgdtend: 254 255wakeup_pagetables: 256 .long 0 257 258bootgdtdesc: 259 .word bootgdtend - bootgdt /* Length */ 260 .long bootgdt - wakeup_start /* Offset plus %ds << 4 */ 261 262 ALIGN_DATA 263wakeup_retaddr: 264 .quad 0 265wakeup_kpml4: 266 .quad 0 267 268wakeup_ctx: 269 .quad 0 270wakeup_xpcb: 271 .quad 0 272wakeup_gdt: 273 .word 0 274 .quad 0 275 276 ALIGN_DATA 277wakeup_efer: 278 .quad 0 279wakeup_pat: 280 .quad 0 281wakeup_star: 282 .quad 0 283wakeup_lstar: 284 .quad 0 285wakeup_cstar: 286 .quad 0 287wakeup_sfmask: 288 .quad 0 289wakeup_cpu: 290 .long 0 291dummy: 292