1/*- 2 * Copyright (c) 2003 Peter Wemm <peter@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * Quick and dirty trampoline to get into 64 bit (long) mode and running 29 * with paging enabled so that we enter the kernel at its linked address. 30 */ 31#define MSR_EFER 0xc0000080 32#define EFER_LME 0x00000100 33#define CR4_PAE 0x00000020 34#define CR4_PSE 0x00000010 35#define CR0_PG 0x80000000 36 37/* GRRR. Deal with BTX that links us for a non-zero location */ 38#define VPBASE 0xa000 39#define VTOP(x) ((x) + VPBASE) 40 41 .data 42 43 .p2align 12,0x40 44 45 .globl PT4 46PT4: 47 .space 0x1000 48 .globl PT3 49PT3: 50 .space 0x1000 51 .globl PT2 52PT2: 53 .space 0x1000 54 55gdtdesc: 56 .word gdtend - gdt 57 .long VTOP(gdt) # low 58 .long 0 # high 59 60gdt: 61 .long 0 # null descriptor 62 .long 0 63 .long 0x00000000 # %cs 64 .long 0x00209800 65 .long 0x00000000 # %ds 66 .long 0x00008000 67gdtend: 68 69 .text 70 .code32 71 72 .globl amd64_tramp 73amd64_tramp: 74 /* Be sure that interrupts are disabled */ 75 cli 76 77 /* Turn on EFER.LME */ 78 movl $MSR_EFER, %ecx 79 rdmsr 80 orl $EFER_LME, %eax 81 wrmsr 82 83 /* Turn on PAE */ 84 movl %cr4, %eax 85 orl $CR4_PAE, %eax 86 movl %eax, %cr4 87 88 /* Set %cr3 for PT4 */ 89 movl $VTOP(PT4), %eax 90 movl %eax, %cr3 91 92 /* Turn on paging (implicitly sets EFER.LMA) */ 93 movl %cr0, %eax 94 orl $CR0_PG, %eax 95 movl %eax, %cr0 96 97 /* Now we're in compatibility mode. set %cs for long mode */ 98 movl $VTOP(gdtdesc), %eax 99 movl VTOP(entry_hi), %esi 100 movl VTOP(entry_lo), %edi 101 lgdt (%eax) 102 ljmp $0x8, $VTOP(longmode) 103 104 .code64 105longmode: 106 /* We're still running V=P, jump to entry point */ 107 movl %esi, %eax 108 salq $32, %rax 109 orq %rdi, %rax 110 pushq %rax 111 ret 112