xref: /freebsd/stand/i386/libi386/amd64_tramp.S (revision b3e7694832e81d7a904a10f525f8797b753bf0d3)
1*ca987d46SWarner Losh/*-
2*ca987d46SWarner Losh * Copyright (c) 2003  Peter Wemm <peter@FreeBSD.org>
3*ca987d46SWarner Losh * All rights reserved.
4*ca987d46SWarner Losh *
5*ca987d46SWarner Losh * Redistribution and use in source and binary forms, with or without
6*ca987d46SWarner Losh * modification, are permitted provided that the following conditions
7*ca987d46SWarner Losh * are met:
8*ca987d46SWarner Losh * 1. Redistributions of source code must retain the above copyright
9*ca987d46SWarner Losh *    notice, this list of conditions and the following disclaimer.
10*ca987d46SWarner Losh * 2. Redistributions in binary form must reproduce the above copyright
11*ca987d46SWarner Losh *    notice, this list of conditions and the following disclaimer in the
12*ca987d46SWarner Losh *    documentation and/or other materials provided with the distribution.
13*ca987d46SWarner Losh *
14*ca987d46SWarner Losh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15*ca987d46SWarner Losh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16*ca987d46SWarner Losh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17*ca987d46SWarner Losh * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18*ca987d46SWarner Losh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19*ca987d46SWarner Losh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20*ca987d46SWarner Losh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21*ca987d46SWarner Losh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22*ca987d46SWarner Losh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23*ca987d46SWarner Losh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24*ca987d46SWarner Losh * SUCH DAMAGE.
25*ca987d46SWarner Losh */
26*ca987d46SWarner Losh
27*ca987d46SWarner Losh/*
28*ca987d46SWarner Losh * Quick and dirty trampoline to get into 64 bit (long) mode and running
29*ca987d46SWarner Losh * with paging enabled so that we enter the kernel at its linked address.
30*ca987d46SWarner Losh */
31*ca987d46SWarner Losh#define MSR_EFER	0xc0000080
32*ca987d46SWarner Losh#define EFER_LME	0x00000100
33*ca987d46SWarner Losh#define CR4_PAE		0x00000020
34*ca987d46SWarner Losh#define CR4_PSE		0x00000010
35*ca987d46SWarner Losh#define CR0_PG		0x80000000
36*ca987d46SWarner Losh
37*ca987d46SWarner Losh/* GRRR. Deal with BTX that links us for a non-zero location */
38*ca987d46SWarner Losh#define VPBASE	0xa000
39*ca987d46SWarner Losh#define VTOP(x)	((x) + VPBASE)
40*ca987d46SWarner Losh
41*ca987d46SWarner Losh	.data
42*ca987d46SWarner Losh
43*ca987d46SWarner Losh	.p2align 12,0x40
44*ca987d46SWarner Losh
45*ca987d46SWarner Losh	.globl	PT4
46*ca987d46SWarner LoshPT4:
47*ca987d46SWarner Losh	.space	0x1000
48*ca987d46SWarner Losh	.globl	PT3
49*ca987d46SWarner LoshPT3:
50*ca987d46SWarner Losh	.space	0x1000
51*ca987d46SWarner Losh	.globl	PT2
52*ca987d46SWarner LoshPT2:
53*ca987d46SWarner Losh	.space	0x1000
54*ca987d46SWarner Losh
55*ca987d46SWarner Loshgdtdesc:
56*ca987d46SWarner Losh	.word	gdtend - gdt
57*ca987d46SWarner Losh	.long	VTOP(gdt)		# low
58*ca987d46SWarner Losh	.long	0			# high
59*ca987d46SWarner Losh
60*ca987d46SWarner Loshgdt:
61*ca987d46SWarner Losh	.long	0			# null descriptor
62*ca987d46SWarner Losh	.long	0
63*ca987d46SWarner Losh	.long	0x00000000		# %cs
64*ca987d46SWarner Losh	.long	0x00209800
65*ca987d46SWarner Losh	.long	0x00000000		# %ds
66*ca987d46SWarner Losh	.long	0x00008000
67*ca987d46SWarner Loshgdtend:
68*ca987d46SWarner Losh
69*ca987d46SWarner Losh	.text
70*ca987d46SWarner Losh	.code32
71*ca987d46SWarner Losh
72*ca987d46SWarner Losh	.globl	amd64_tramp
73*ca987d46SWarner Loshamd64_tramp:
74*ca987d46SWarner Losh	/* Be sure that interrupts are disabled */
75*ca987d46SWarner Losh	cli
76*ca987d46SWarner Losh
77*ca987d46SWarner Losh	/* Turn on EFER.LME */
78*ca987d46SWarner Losh	movl	$MSR_EFER, %ecx
79*ca987d46SWarner Losh	rdmsr
80*ca987d46SWarner Losh	orl	$EFER_LME, %eax
81*ca987d46SWarner Losh	wrmsr
82*ca987d46SWarner Losh
83*ca987d46SWarner Losh	/* Turn on PAE */
84*ca987d46SWarner Losh	movl	%cr4, %eax
85*ca987d46SWarner Losh	orl	$CR4_PAE, %eax
86*ca987d46SWarner Losh	movl	%eax, %cr4
87*ca987d46SWarner Losh
88*ca987d46SWarner Losh	/* Set %cr3 for PT4 */
89*ca987d46SWarner Losh	movl	$VTOP(PT4), %eax
90*ca987d46SWarner Losh	movl	%eax, %cr3
91*ca987d46SWarner Losh
92*ca987d46SWarner Losh	/* Turn on paging (implicitly sets EFER.LMA) */
93*ca987d46SWarner Losh	movl	%cr0, %eax
94*ca987d46SWarner Losh	orl	$CR0_PG, %eax
95*ca987d46SWarner Losh	movl	%eax, %cr0
96*ca987d46SWarner Losh
97*ca987d46SWarner Losh	/* Now we're in compatibility mode. set %cs for long mode */
98*ca987d46SWarner Losh	movl	$VTOP(gdtdesc), %eax
99*ca987d46SWarner Losh	movl	VTOP(entry_hi), %esi
100*ca987d46SWarner Losh	movl	VTOP(entry_lo), %edi
101*ca987d46SWarner Losh	lgdt	(%eax)
102*ca987d46SWarner Losh	ljmp	$0x8, $VTOP(longmode)
103*ca987d46SWarner Losh
104*ca987d46SWarner Losh	.code64
105*ca987d46SWarner Loshlongmode:
106*ca987d46SWarner Losh	/* We're still running V=P, jump to entry point */
107*ca987d46SWarner Losh	movl	%esi, %eax
108*ca987d46SWarner Losh	salq	$32, %rax
109*ca987d46SWarner Losh	orq	%rdi, %rax
110*ca987d46SWarner Losh	pushq	%rax
111*ca987d46SWarner Losh	ret
112