1# $FreeBSD$ 2 3# Set default CPU compile flags and baseline CPUTYPE for each arch. The 4# compile flags must support the minimum CPU type for each architecture but 5# may tune support for more advanced processors. 6 7.if !defined(CPUTYPE) || empty(CPUTYPE) 8_CPUCFLAGS = 9. if ${MACHINE_CPUARCH} == "aarch64" 10MACHINE_CPU = arm64 11. elif ${MACHINE_CPUARCH} == "amd64" 12MACHINE_CPU = amd64 sse2 sse mmx 13. elif ${MACHINE_CPUARCH} == "arm" 14MACHINE_CPU = arm 15. elif ${MACHINE_CPUARCH} == "i386" 16MACHINE_CPU = i486 17. elif ${MACHINE_CPUARCH} == "mips" 18MACHINE_CPU = mips 19. elif ${MACHINE_CPUARCH} == "powerpc" 20MACHINE_CPU = aim 21. elif ${MACHINE_CPUARCH} == "riscv" 22MACHINE_CPU = riscv 23. elif ${MACHINE_CPUARCH} == "sparc64" 24MACHINE_CPU = ultrasparc 25. endif 26.else 27 28# Handle aliases (not documented in make.conf to avoid user confusion 29# between e.g. i586 and pentium) 30 31. if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" 32. if ${CPUTYPE} == "barcelona" 33CPUTYPE = amdfam10 34. elif ${CPUTYPE} == "core-avx2" 35CPUTYPE = haswell 36. elif ${CPUTYPE} == "core-avx-i" 37CPUTYPE = ivybridge 38. elif ${CPUTYPE} == "corei7-avx" 39CPUTYPE = sandybridge 40. elif ${CPUTYPE} == "corei7" 41CPUTYPE = nehalem 42. elif ${CPUTYPE} == "slm" 43CPUTYPE = silvermont 44. elif ${CPUTYPE} == "atom" 45CPUTYPE = bonnell 46. elif ${CPUTYPE} == "core" 47CPUTYPE = prescott 48. endif 49. if ${MACHINE_CPUARCH} == "amd64" 50. if ${CPUTYPE} == "prescott" 51CPUTYPE = nocona 52. endif 53. else 54. if ${CPUTYPE} == "k7" 55CPUTYPE = athlon 56. elif ${CPUTYPE} == "p4" 57CPUTYPE = pentium4 58. elif ${CPUTYPE} == "p4m" 59CPUTYPE = pentium4m 60. elif ${CPUTYPE} == "p3" 61CPUTYPE = pentium3 62. elif ${CPUTYPE} == "p3m" 63CPUTYPE = pentium3m 64. elif ${CPUTYPE} == "p-m" 65CPUTYPE = pentium-m 66. elif ${CPUTYPE} == "p2" 67CPUTYPE = pentium2 68. elif ${CPUTYPE} == "i686" 69CPUTYPE = pentiumpro 70. elif ${CPUTYPE} == "i586/mmx" 71CPUTYPE = pentium-mmx 72. elif ${CPUTYPE} == "i586" 73CPUTYPE = pentium 74. endif 75. endif 76. elif ${MACHINE_ARCH} == "sparc64" 77. if ${CPUTYPE} == "us" 78CPUTYPE = ultrasparc 79. elif ${CPUTYPE} == "us3" 80CPUTYPE = ultrasparc3 81. endif 82. endif 83 84############################################################################### 85# Logic to set up correct gcc optimization flag. This must be included 86# after /etc/make.conf so it can react to the local value of CPUTYPE 87# defined therein. Consult: 88# http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html 89# http://gcc.gnu.org/onlinedocs/gcc/RS-6000-and-PowerPC-Options.html 90# http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html 91# http://gcc.gnu.org/onlinedocs/gcc/SPARC-Options.html 92# http://gcc.gnu.org/onlinedocs/gcc/i386-and-x86_002d64-Options.html 93 94. if ${MACHINE_CPUARCH} == "i386" 95. if ${CPUTYPE} == "crusoe" 96_CPUCFLAGS = -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0 97. elif ${CPUTYPE} == "k5" 98_CPUCFLAGS = -march=pentium 99. elif ${CPUTYPE} == "c7" 100_CPUCFLAGS = -march=c3-2 101. else 102_CPUCFLAGS = -march=${CPUTYPE} 103. endif 104. elif ${MACHINE_CPUARCH} == "amd64" 105_CPUCFLAGS = -march=${CPUTYPE} 106. elif ${MACHINE_CPUARCH} == "arm" 107. if ${CPUTYPE} == "xscale" 108#XXX: gcc doesn't seem to like -mcpu=xscale, and dies while rebuilding itself 109#_CPUCFLAGS = -mcpu=xscale 110_CPUCFLAGS = -march=armv5te -D__XSCALE__ 111. elif ${CPUTYPE:M*soft*} != "" 112_CPUCFLAGS = -mfloat-abi=softfp 113. elif ${CPUTYPE} == "armv6" 114# Not sure we still need ARM_ARCH_6=1 here. 115_CPUCFLAGS = -march=${CPUTYPE} -DARM_ARCH_6=1 116. elif ${CPUTYPE} == "cortexa" 117_CPUCFLAGS = -march=armv7 -DARM_ARCH_6=1 -mfpu=vfp 118. elif ${CPUTYPE:Marmv[4567]*} != "" 119# Handle all the armvX types that FreeBSD runs: 120# armv4, armv4t, armv5, armv5te, armv6, armv6t2, armv7, armv7-a, armv7ve 121# they require -march=. All the others require -mcpu=. 122_CPUCFLAGS = -march=${CPUTYPE} 123. else 124# Common values for FreeBSD 125# arm: (any arm v4 or v5 processor you are targetting) 126# arm920t, arm926ej-s, marvell-pj4, fa526, fa626, 127# fa606te, fa626te, fa726te 128# armv6: (any arm v7 or v8 processor you are targetting and the arm1176jzf-s) 129# arm1176jzf-s, generic-armv7-a, cortex-a5, cortex-a7, cortex-a8, 130# cortex-a9, cortex-a12, cortex-a15, cortex-a17, cortex-a53, cortex-a57, 131# cortex-a72, exynos-m1 132_CPUCFLAGS = -mcpu=${CPUTYPE} 133. endif 134. elif ${MACHINE_ARCH} == "powerpc" 135. if ${CPUTYPE} == "e500" 136_CPUCFLAGS = -Wa,-me500 -msoft-float 137. else 138_CPUCFLAGS = -mcpu=${CPUTYPE} -mno-powerpc64 139. endif 140. elif ${MACHINE_ARCH} == "powerpc64" 141_CPUCFLAGS = -mcpu=${CPUTYPE} 142. elif ${MACHINE_CPUARCH} == "mips" 143# mips[1234], mips32, mips64, and all later releases need to have mips 144# preserved (releases later than r2 require external toolchain) 145. if ${CPUTYPE:Mmips32*} != "" || ${CPUTYPE:Mmips64*} != "" || \ 146 ${CPUTYPE:Mmips[1234]} != "" 147_CPUCFLAGS = -march=${CPUTYPE} 148. else 149# Default -march to the CPUTYPE passed in, with mips stripped off so we 150# accept either mips4kc or 4kc, mostly for historical reasons 151# Typical values for cores: 152# 4kc, 24kc, 34kc, 74kc, 1004kc, octeon, octeon+, octeon2, octeon3, 153# sb1, xlp, xlr 154_CPUCFLAGS = -march=${CPUTYPE:S/^mips//} 155. endif 156. elif ${MACHINE_CPUARCH} == "riscv" 157_CPUCFLAGS = -msoft-float # -march="RV64I" # RISCVTODO 158. elif ${MACHINE_ARCH} == "sparc64" 159. if ${CPUTYPE} == "v9" 160_CPUCFLAGS = -mcpu=v9 161. elif ${CPUTYPE} == "ultrasparc" 162_CPUCFLAGS = -mcpu=ultrasparc 163. elif ${CPUTYPE} == "ultrasparc3" 164_CPUCFLAGS = -mcpu=ultrasparc3 165. endif 166. elif ${MACHINE_CPUARCH} == "aarch64" 167_CPUCFLAGS = -mcpu=${CPUTYPE} 168. endif 169 170# Set up the list of CPU features based on the CPU type. This is an 171# unordered list to make it easy for client makefiles to test for the 172# presence of a CPU feature. 173 174########## i386 175. if ${MACHINE_CPUARCH} == "i386" 176. if ${CPUTYPE} == "bdver4" 177MACHINE_CPU = xop avx2 avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 178. elif ${CPUTYPE} == "bdver3" || ${CPUTYPE} == "bdver2" || \ 179 ${CPUTYPE} == "bdver1" 180MACHINE_CPU = xop avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 181. elif ${CPUTYPE} == "btver2" 182MACHINE_CPU = avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 183. elif ${CPUTYPE} == "btver1" 184MACHINE_CPU = ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 185. elif ${CPUTYPE} == "amdfam10" 186MACHINE_CPU = athlon-xp athlon k7 3dnow sse4a sse3 sse2 sse mmx k6 k5 i586 187. elif ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3" 188MACHINE_CPU = athlon-xp athlon k7 3dnow sse3 sse2 sse mmx k6 k5 i586 189. elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \ 190 ${CPUTYPE} == "athlon-fx" 191MACHINE_CPU = athlon-xp athlon k7 3dnow sse2 sse mmx k6 k5 i586 192. elif ${CPUTYPE} == "athlon-mp" || ${CPUTYPE} == "athlon-xp" || \ 193 ${CPUTYPE} == "athlon-4" 194MACHINE_CPU = athlon-xp athlon k7 3dnow sse mmx k6 k5 i586 195. elif ${CPUTYPE} == "athlon" || ${CPUTYPE} == "athlon-tbird" 196MACHINE_CPU = athlon k7 3dnow mmx k6 k5 i586 197. elif ${CPUTYPE} == "k6-3" || ${CPUTYPE} == "k6-2" || ${CPUTYPE} == "geode" 198MACHINE_CPU = 3dnow mmx k6 k5 i586 199. elif ${CPUTYPE} == "k6" 200MACHINE_CPU = mmx k6 k5 i586 201. elif ${CPUTYPE} == "k5" 202MACHINE_CPU = k5 i586 203. elif ${CPUTYPE} == "skylake" || ${CPUTYPE} == "knl" 204MACHINE_CPU = avx512 avx2 avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 205. elif ${CPUTYPE} == "broadwell" || ${CPUTYPE} == "haswell" 206MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 207. elif ${CPUTYPE} == "ivybridge" || ${CPUTYPE} == "sandybridge" 208MACHINE_CPU = avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 209. elif ${CPUTYPE} == "westmere" || ${CPUTYPE} == "nehalem" || \ 210 ${CPUTYPE} == "silvermont" 211MACHINE_CPU = sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 212. elif ${CPUTYPE} == "penryn" 213MACHINE_CPU = sse41 ssse3 sse3 sse2 sse i686 mmx i586 214. elif ${CPUTYPE} == "core2" || ${CPUTYPE} == "bonnell" 215MACHINE_CPU = ssse3 sse3 sse2 sse i686 mmx i586 216. elif ${CPUTYPE} == "yonah" || ${CPUTYPE} == "prescott" 217MACHINE_CPU = sse3 sse2 sse i686 mmx i586 218. elif ${CPUTYPE} == "pentium4" || ${CPUTYPE} == "pentium4m" || \ 219 ${CPUTYPE} == "pentium-m" 220MACHINE_CPU = sse2 sse i686 mmx i586 221. elif ${CPUTYPE} == "pentium3" || ${CPUTYPE} == "pentium3m" 222MACHINE_CPU = sse i686 mmx i586 223. elif ${CPUTYPE} == "pentium2" 224MACHINE_CPU = i686 mmx i586 225. elif ${CPUTYPE} == "pentiumpro" 226MACHINE_CPU = i686 i586 227. elif ${CPUTYPE} == "pentium-mmx" 228MACHINE_CPU = mmx i586 229. elif ${CPUTYPE} == "pentium" 230MACHINE_CPU = i586 231. elif ${CPUTYPE} == "c7" 232MACHINE_CPU = sse3 sse2 sse i686 mmx i586 233. elif ${CPUTYPE} == "c3-2" 234MACHINE_CPU = sse i686 mmx i586 235. elif ${CPUTYPE} == "c3" 236MACHINE_CPU = 3dnow mmx i586 237. elif ${CPUTYPE} == "winchip2" 238MACHINE_CPU = 3dnow mmx 239. elif ${CPUTYPE} == "winchip-c6" 240MACHINE_CPU = mmx 241. endif 242MACHINE_CPU += i486 243########## amd64 244. elif ${MACHINE_CPUARCH} == "amd64" 245. if ${CPUTYPE} == "bdver4" 246MACHINE_CPU = xop avx2 avx sse42 sse41 ssse3 sse4a sse3 247. elif ${CPUTYPE} == "bdver3" || ${CPUTYPE} == "bdver2" || \ 248 ${CPUTYPE} == "bdver1" 249MACHINE_CPU = xop avx sse42 sse41 ssse3 sse4a sse3 250. elif ${CPUTYPE} == "btver2" 251MACHINE_CPU = avx sse42 sse41 ssse3 sse4a sse3 252. elif ${CPUTYPE} == "btver1" 253MACHINE_CPU = ssse3 sse4a sse3 254. elif ${CPUTYPE} == "amdfam10" 255MACHINE_CPU = k8 3dnow sse4a sse3 256. elif ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3" || \ 257 ${CPUTYPE} == "k8-sse3" 258MACHINE_CPU = k8 3dnow sse3 259. elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \ 260 ${CPUTYPE} == "athlon-fx" || ${CPUTYPE} == "k8" 261MACHINE_CPU = k8 3dnow 262. elif ${CPUTYPE} == "skylake" || ${CPUTYPE} == "knl" 263MACHINE_CPU = avx512 avx2 avx sse42 sse41 ssse3 sse3 264. elif ${CPUTYPE} == "broadwell" || ${CPUTYPE} == "haswell" 265MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse3 266. elif ${CPUTYPE} == "ivybridge" || ${CPUTYPE} == "sandybridge" 267MACHINE_CPU = avx sse42 sse41 ssse3 sse3 268. elif ${CPUTYPE} == "westmere" || ${CPUTYPE} == "nehalem" || \ 269 ${CPUTYPE} == "silvermont" 270MACHINE_CPU = sse42 sse41 ssse3 sse3 271. elif ${CPUTYPE} == "penryn" 272MACHINE_CPU = sse41 ssse3 sse3 273. elif ${CPUTYPE} == "core2" || ${CPUTYPE} == "bonnell" 274MACHINE_CPU = ssse3 sse3 275. elif ${CPUTYPE} == "nocona" 276MACHINE_CPU = sse3 277. endif 278MACHINE_CPU += amd64 sse2 sse mmx 279########## Mips 280. elif ${MACHINE_CPUARCH} == "mips" 281MACHINE_CPU = mips 282########## powerpc 283. elif ${MACHINE_ARCH} == "powerpc" 284. if ${CPUTYPE} == "e500" 285MACHINE_CPU = booke softfp 286. endif 287########## riscv 288. elif ${MACHINE_CPUARCH} == "riscv" 289MACHINE_CPU = riscv 290########## sparc64 291. elif ${MACHINE_ARCH} == "sparc64" 292. if ${CPUTYPE} == "v9" 293MACHINE_CPU = v9 294. elif ${CPUTYPE} == "ultrasparc" 295MACHINE_CPU = v9 ultrasparc 296. elif ${CPUTYPE} == "ultrasparc3" 297MACHINE_CPU = v9 ultrasparc ultrasparc3 298. endif 299. endif 300.endif 301 302.if ${MACHINE_CPUARCH} == "mips" 303CFLAGS += -G0 304.endif 305 306########## arm 307.if ${MACHINE_CPUARCH} == "arm" 308MACHINE_CPU += arm 309. if ${MACHINE_ARCH:Marmv6*} != "" 310MACHINE_CPU += armv6 311. endif 312# armv6 is a hybrid. It uses the softfp ABI, but doesn't emulate 313# floating point in the general case, so don't define softfp for 314# it at this time. arm and armeb are pure softfp, so define it 315# for them. 316. if ${MACHINE_ARCH:Marmv6*} == "" 317MACHINE_CPU += softfp 318. endif 319.if ${MACHINE_ARCH} == "armv6" 320# Needs to be CFLAGS not _CPUCFLAGS because it's needed for the ABI 321# not a nice optimization. 322CFLAGS += -mfloat-abi=softfp 323.endif 324.endif 325 326.if ${MACHINE_CPUARCH} == "riscv" 327CFLAGS += -msoft-float 328.endif 329 330# NB: COPTFLAGS is handled in /usr/src/sys/conf/kern.pre.mk 331 332.if !defined(NO_CPU_CFLAGS) 333CFLAGS += ${_CPUCFLAGS} 334.endif 335 336# 337# Prohibit the compiler from emitting SIMD instructions. 338# These flags are added to CFLAGS in areas where the extra context-switch 339# cost outweighs the advantages of SIMD instructions. 340# 341# gcc: 342# Setting -mno-mmx implies -mno-3dnow 343# Setting -mno-sse implies -mno-sse2, -mno-sse3, -mno-ssse3 and -mfpmath=387 344# 345# clang: 346# Setting -mno-mmx implies -mno-3dnow and -mno-3dnowa 347# Setting -mno-sse implies -mno-sse2, -mno-sse3, -mno-ssse3, -mno-sse41 and 348# -mno-sse42 349# (-mfpmath= is not supported) 350# 351.if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64" 352CFLAGS_NO_SIMD.clang= -mno-avx 353CFLAGS_NO_SIMD= -mno-mmx -mno-sse 354.endif 355CFLAGS_NO_SIMD += ${CFLAGS_NO_SIMD.${COMPILER_TYPE}} 356 357# Add in any architecture-specific CFLAGS. 358# These come from make.conf or the command line or the environment. 359CFLAGS += ${CFLAGS.${MACHINE_ARCH}} 360CXXFLAGS += ${CXXFLAGS.${MACHINE_ARCH}} 361