1.\" 2.\" Copyright (c) 2005 Bruce M Simpson <bms@FreeBSD.org> 3.\" All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 14.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24.\" SUCH DAMAGE. 25.\" 26.\" $FreeBSD$ 27.\" 28.Dd May 16, 2016 29.Dt PCI 9 30.Os 31.Sh NAME 32.Nm pci , 33.Nm pci_alloc_msi , 34.Nm pci_alloc_msix , 35.Nm pci_disable_busmaster , 36.Nm pci_disable_io , 37.Nm pci_enable_busmaster , 38.Nm pci_enable_io , 39.Nm pci_find_bsf , 40.Nm pci_find_cap , 41.Nm pci_find_dbsf , 42.Nm pci_find_device , 43.Nm pci_find_extcap , 44.Nm pci_find_htcap , 45.Nm pci_find_pcie_root_port , 46.Nm pci_get_id , 47.Nm pci_get_max_read_req , 48.Nm pci_get_powerstate , 49.Nm pci_get_vpd_ident , 50.Nm pci_get_vpd_readonly , 51.Nm pci_iov_attach , 52.Nm pci_iov_detach , 53.Nm pci_msi_count , 54.Nm pci_msix_count , 55.Nm pci_msix_pba_bar , 56.Nm pci_msix_table_bar , 57.Nm pci_pending_msix , 58.Nm pci_read_config , 59.Nm pci_release_msi , 60.Nm pci_remap_msix , 61.Nm pci_restore_state , 62.Nm pci_save_state , 63.Nm pci_set_max_read_req , 64.Nm pci_set_powerstate , 65.Nm pci_write_config , 66.Nm pcie_adjust_config , 67.Nm pcie_read_config , 68.Nm pcie_write_config 69.Nd PCI bus interface 70.Sh SYNOPSIS 71.In sys/bus.h 72.In dev/pci/pcireg.h 73.In dev/pci/pcivar.h 74.Ft int 75.Fn pci_alloc_msi "device_t dev" "int *count" 76.Ft int 77.Fn pci_alloc_msix "device_t dev" "int *count" 78.Ft int 79.Fn pci_disable_busmaster "device_t dev" 80.Ft int 81.Fn pci_disable_io "device_t dev" "int space" 82.Ft int 83.Fn pci_enable_busmaster "device_t dev" 84.Ft int 85.Fn pci_enable_io "device_t dev" "int space" 86.Ft device_t 87.Fn pci_find_bsf "uint8_t bus" "uint8_t slot" "uint8_t func" 88.Ft int 89.Fn pci_find_cap "device_t dev" "int capability" "int *capreg" 90.Ft device_t 91.Fn pci_find_dbsf "uint32_t domain" "uint8_t bus" "uint8_t slot" "uint8_t func" 92.Ft device_t 93.Fn pci_find_device "uint16_t vendor" "uint16_t device" 94.Ft int 95.Fn pci_find_extcap "device_t dev" "int capability" "int *capreg" 96.Ft int 97.Fn pci_find_htcap "device_t dev" "int capability" "int *capreg" 98.Ft device_t 99.Fn pci_find_pcie_root_port "device_t dev" 100.Ft int 101.Fn pci_get_id "device_t dev" "enum pci_id_type type" "uintptr_t *id" 102.Ft int 103.Fn pci_get_max_read_req "device_t dev" 104.Ft int 105.Fn pci_get_powerstate "device_t dev" 106.Ft int 107.Fn pci_get_vpd_ident "device_t dev" "const char **identptr" 108.Ft int 109.Fn pci_get_vpd_readonly "device_t dev" "const char *kw" "const char **vptr" 110.Ft int 111.Fn pci_msi_count "device_t dev" 112.Ft int 113.Fn pci_msix_count "device_t dev" 114.Ft int 115.Fn pci_msix_pba_bar "device_t dev" 116.Ft int 117.Fn pci_msix_table_bar "device_t dev" 118.Ft int 119.Fn pci_pending_msix "device_t dev" "u_int index" 120.Ft uint32_t 121.Fn pci_read_config "device_t dev" "int reg" "int width" 122.Ft int 123.Fn pci_release_msi "device_t dev" 124.Ft int 125.Fn pci_remap_msix "device_t dev" "int count" "const u_int *vectors" 126.Ft void 127.Fn pci_restore_state "device_t dev" 128.Ft void 129.Fn pci_save_state "device_t dev" 130.Ft int 131.Fn pci_set_max_read_req "device_t dev" "int size" 132.Ft int 133.Fn pci_set_powerstate "device_t dev" "int state" 134.Ft void 135.Fn pci_write_config "device_t dev" "int reg" "uint32_t val" "int width" 136.Ft uint32_t 137.Fo pcie_adjust_config 138.Fa "device_t dev" 139.Fa "int reg" 140.Fa "uint32_t mask" 141.Fa "uint32_t val" 142.Fa "int width" 143.Fc 144.Ft uint32_t 145.Fn pcie_read_config "device_t dev" "int reg" "int width" 146.Ft void 147.Fn pcie_write_config "device_t dev" "int reg" "uint32_t val" "int width" 148.In dev/pci/pci_iov.h 149.Ft int 150.Fn pci_iov_attach "device_t dev" "nvlist_t *pf_schema" "nvlist_t *vf_schema" 151.Ft int 152.Fn pci_iov_detach "device_t dev" 153.Sh DESCRIPTION 154The 155.Nm 156set of functions are used for managing PCI devices. 157The functions are split into several groups: 158raw configuration access, 159locating devices, 160device information, 161device configuration, 162and 163message signaled interrupts. 164.Ss Raw Configuration Access 165The 166.Fn pci_read_config 167function is used to read data from the PCI configuration 168space of the device 169.Fa dev , 170at offset 171.Fa reg , 172with 173.Fa width 174specifying the size of the access. 175.Pp 176The 177.Fn pci_write_config 178function is used to write the value 179.Fa val 180to the PCI configuration 181space of the device 182.Fa dev , 183at offset 184.Fa reg , 185with 186.Fa width 187specifying the size of the access. 188.Pp 189The 190.Fn pcie_adjust_config 191function is used to modify the value of a register in the PCI-express 192capability register set of device 193.Fa dev . 194The offset 195.Fa reg 196specifies a relative offset in the register set with 197.Fa width 198specifying the size of the access. 199The new value of the register is computed by modifying bits set in 200.Fa mask 201to the value in 202.Fa val . 203Any bits not specified in 204.Fa mask 205are preserved. 206The previous value of the register is returned. 207.Pp 208The 209.Fn pcie_read_config 210function is used to read the value of a register in the PCI-express 211capability register set of device 212.Fa dev . 213The offset 214.Fa reg 215specifies a relative offset in the register set with 216.Fa width 217specifying the size of the access. 218.Pp 219The 220.Fn pcie_write_config 221function is used to write the value 222.Fa val 223to a register in the PCI-express capability register set of device 224.Fa dev . 225The offset 226.Fa reg 227specifies a relative offset in the register set with 228.Fa width 229specifying the size of the access. 230.Pp 231.Em NOTE : 232Device drivers should only use these functions for functionality that 233is not available via another 234.Fn pci 235function. 236.Ss Locating Devices 237The 238.Fn pci_find_bsf 239function looks up the 240.Vt device_t 241of a PCI device, given its 242.Fa bus , 243.Fa slot , 244and 245.Fa func . 246The 247.Fa slot 248number actually refers to the number of the device on the bus, 249which does not necessarily indicate its geographic location 250in terms of a physical slot. 251Note that in case the system has multiple PCI domains, 252the 253.Fn pci_find_bsf 254function only searches the first one. 255Actually, it is equivalent to: 256.Bd -literal -offset indent 257pci_find_dbsf(0, bus, slot, func); 258.Ed 259.Pp 260The 261.Fn pci_find_dbsf 262function looks up the 263.Vt device_t 264of a PCI device, given its 265.Fa domain , 266.Fa bus , 267.Fa slot , 268and 269.Fa func . 270The 271.Fa slot 272number actually refers to the number of the device on the bus, 273which does not necessarily indicate its geographic location 274in terms of a physical slot. 275.Pp 276The 277.Fn pci_find_device 278function looks up the 279.Vt device_t 280of a PCI device, given its 281.Fa vendor 282and 283.Fa device 284IDs. 285Note that there can be multiple matches for this search; this function 286only returns the first matching device. 287.Ss Device Information 288The 289.Fn pci_find_cap 290function is used to locate the first instance of a PCI capability 291register set for the device 292.Fa dev . 293The capability to locate is specified by ID via 294.Fa capability . 295Constant macros of the form 296.Dv PCIY_xxx 297for standard capability IDs are defined in 298.In dev/pci/pcireg.h . 299If the capability is found, then 300.Fa *capreg 301is set to the offset in configuration space of the capability register set, 302and 303.Fn pci_find_cap 304returns zero. 305If the capability is not found or the device does not support capabilities, 306.Fn pci_find_cap 307returns an error. 308.Pp 309The 310.Fn pci_find_extcap 311function is used to locate the first instance of a PCI-express 312extended capability register set for the device 313.Fa dev . 314The extended capability to locate is specified by ID via 315.Fa capability . 316Constant macros of the form 317.Dv PCIZ_xxx 318for standard extended capability IDs are defined in 319.In dev/pci/pcireg.h . 320If the extended capability is found, then 321.Fa *capreg 322is set to the offset in configuration space of the extended capability 323register set, and 324.Fn pci_find_extcap 325returns zero. 326If the extended capability is not found or the device is not a 327PCI-express device, 328.Fn pci_find_extcap 329returns an error. 330.Pp 331The 332.Fn pci_find_htcap 333function is used to locate the first instance of a HyperTransport capability 334register set for the device 335.Fa dev . 336The capability to locate is specified by type via 337.Fa capability . 338Constant macros of the form 339.Dv PCIM_HTCAP_xxx 340for standard HyperTransport capability types are defined in 341.In dev/pci/pcireg.h . 342If the capability is found, then 343.Fa *capreg 344is set to the offset in configuration space of the capability register set, 345and 346.Fn pci_find_htcap 347returns zero. 348If the capability is not found or the device is not a HyperTransport device, 349.Fn pci_find_htcap 350returns an error. 351.Pp 352The 353.Fn pci_find_pcie_root_port 354function walks up the PCI device hierarchy to locate the PCI-express root 355port upstream of 356.Fa dev . 357If a root port is not found, 358.Fn pci_find_pcie_root_port 359returns 360.Dv NULL . 361.Pp 362The 363.Fn pci_get_id 364function is used to read an identifier from a device. 365The 366.Fa type 367flag is used to specify which identifier to read. 368The following flags are supported: 369.Bl -hang -width ".Dv PCI_ID_RID" 370.It Dv PCI_ID_RID 371Read the routing identifier for the device. 372.It Dv PCI_ID_MSI 373Read the MSI routing ID. 374This is needed by some interrupt controllers to route MSI and MSI-X interrupts. 375.El 376.Pp 377The 378.Fn pci_get_vpd_ident 379function is used to fetch a device's Vital Product Data 380.Pq VPD 381identifier string. 382If the device 383.Fa dev 384supports VPD and provides an identifier string, 385then 386.Fa *identptr 387is set to point at a read-only, null-terminated copy of the identifier 388string, 389and 390.Fn pci_get_vpd_ident 391returns zero. 392If the device does not support VPD or does not provide an identifier 393string, 394then 395.Fn pci_get_vpd_ident 396returns an error. 397.Pp 398The 399.Fn pci_get_vpd_readonly 400function is used to fetch the value of a single VPD read-only keyword 401for the device 402.Fa dev . 403The keyword to fetch is identified by the two character string 404.Fa kw . 405If the device supports VPD and provides a read-only value for the 406requested keyword, 407then 408.Fa *vptr 409is set to point at a read-only, null-terminated copy of the value, 410and 411.Fn pci_get_vpd_readonly 412returns zero. 413If the device does not support VPD or does not provide the requested 414keyword, 415then 416.Fn pci_get_vpd_readonly 417returns an error. 418.Ss Device Configuration 419The 420.Fn pci_enable_busmaster 421function enables PCI bus mastering for the device 422.Fa dev , 423by setting the 424.Dv PCIM_CMD_BUSMASTEREN 425bit in the 426.Dv PCIR_COMMAND 427register. 428The 429.Fn pci_disable_busmaster 430function clears this bit. 431.Pp 432The 433.Fn pci_enable_io 434function enables memory or I/O port address decoding for the device 435.Fa dev , 436by setting the 437.Dv PCIM_CMD_MEMEN 438or 439.Dv PCIM_CMD_PORTEN 440bit in the 441.Dv PCIR_COMMAND 442register appropriately. 443The 444.Fn pci_disable_io 445function clears the appropriate bit. 446The 447.Fa space 448argument specifies which resource is affected; this can be either 449.Dv SYS_RES_MEMORY 450or 451.Dv SYS_RES_IOPORT 452as appropriate. 453Device drivers should generally not use these routines directly. 454The PCI bus will enable decoding automatically when a 455.Dv SYS_RES_MEMORY 456or 457.Dv SYS_RES_IOPORT 458resource is activated via 459.Xr bus_alloc_resource 9 460or 461.Xr bus_activate_resource 9 . 462.Pp 463The 464.Fn pci_get_max_read_req 465function returns the current maximum read request size in bytes for a 466PCI-express device. 467If the 468.Fa dev 469device is not a PCI-express device, 470.Fn pci_get_max_read_req 471returns zero. 472.Pp 473The 474.Fn pci_set_max_read_req 475sets the PCI-express maximum read request size for 476.Fa dev . 477The requested 478.Fa size 479may be adjusted, 480and 481.Fn pci_set_max_read_req 482returns the actual size set in bytes. 483If the 484.Fa dev 485device is not a PCI-express device, 486.Fn pci_set_max_read_req 487returns zero. 488.Pp 489The 490.Fn pci_get_powerstate 491function returns the current power state of the device 492.Fa dev . 493If the device does not support power management capabilities, then the default 494state of 495.Dv PCI_POWERSTATE_D0 496is returned. 497The following power states are defined by PCI: 498.Bl -hang -width ".Dv PCI_POWERSTATE_UNKNOWN" 499.It Dv PCI_POWERSTATE_D0 500State in which device is on and running. 501It is receiving full power from the system and delivering 502full functionality to the user. 503.It Dv PCI_POWERSTATE_D1 504Class-specific low-power state in which device context may or 505may not be lost. 506Busses in this state cannot do anything to the bus, to 507force devices to lose context. 508.It Dv PCI_POWERSTATE_D2 509Class-specific low-power state in which device context may or 510may not be lost. 511Attains greater power savings than 512.Dv PCI_POWERSTATE_D1 . 513Busses in this state can cause devices to lose some context. 514Devices 515.Em must 516be prepared for the bus to be in this state or higher. 517.It Dv PCI_POWERSTATE_D3 518State in which the device is off and not running. 519Device context is lost, and power from the device can 520be removed. 521.It Dv PCI_POWERSTATE_UNKNOWN 522State of the device is unknown. 523.El 524.Pp 525The 526.Fn pci_set_powerstate 527function is used to transition the device 528.Fa dev 529to the PCI power state 530.Fa state . 531If the device does not support power management capabilities or 532it does not support the specific power state 533.Fa state , 534then the function will fail with 535.Er EOPNOTSUPP . 536.Pp 537The 538.Fn pci_iov_attach 539function is used to advertise that the given device 540.Pq and associated device driver 541supports PCI Single-Root I/O Virtualization 542.Pq SR-IOV . 543A driver that supports SR-IOV must implement the 544.Xr PCI_IOV_INIT 9 , 545.Xr PCI_IOV_ADD_VF 9 546and 547.Xr PCI_IOV_UNINIT 9 548methods. 549This function should be called during the 550.Xr DEVICE_ATTACH 9 551method. 552If this function returns an error, it is recommended that the device driver 553still successfully attaches, but runs with SR-IOV disabled. 554The 555.Fa pf_schema 556and 557.Fa vf_schema 558parameters are used to define what device-specific configuration parameters the 559device driver accepts when SR-IOV is enabled for the Physical Function 560.Pq PF 561and for individual Virtual Functions 562.Pq VFs 563respectively. 564See 565.Xr pci_iov_schema 9 566for details on how to construct the schema. 567If either the 568.Pa pf_schema 569or 570.Pa vf_schema 571is invalid or specifies parameter names that conflict with parameter names that 572are already in use, 573.Fn pci_iov_attach 574will return an error and SR-IOV will not be available on the PF device. 575If a driver does not accept configuration parameters for either the PF device 576or the VF devices, the driver must pass an empty schema for that device. 577The SR-IOV infrastructure takes ownership of the 578.Fa pf_schema 579and 580.Fa vf_schema 581and is responsible for freeing them. 582The driver must never free the schemas itself. 583.Pp 584The 585.Fn pci_iov_detach 586function is used to advise the SR-IOV infrastructure that the driver for the 587given device is attempting to detach and that all SR-IOV resources for the 588device must be released. 589This function must be called during the 590.Xr DEVICE_DETACH 9 591method if 592.Fn pci_iov_attach 593was successfully called on the device and 594.Fn pci_iov_detach 595has not subsequently been called on the device and returned no error. 596If this function returns an error, the 597.Xr DEVICE_DETACH 9 598method must fail and return an error, as detaching the PF driver while VF 599devices are active would cause system instability. 600This function is safe to call and will always succeed if 601.Fn pci_iov_attach 602previously failed with an error on the given device, or if 603.Fn pci_iov_attach 604was never called on the device. 605.Pp 606The 607.Fn pci_save_state 608and 609.Fn pci_restore_state 610functions can be used by a device driver to save and restore standard PCI 611config registers. 612The 613.Fn pci_save_state 614function must be invoked while the device has valid state before 615.Fn pci_restore_state 616can be used. 617If the device is not in the fully-powered state 618.Pq Dv PCI_POWERSTATE_D0 619when 620.Fn pci_restore_state 621is invoked, 622then the device will be transitioned to 623.Dv PCI_POWERSTATE_D0 624before any config registers are restored. 625.Ss Message Signaled Interrupts 626Message Signaled Interrupts 627.Pq MSI 628and 629Enhanced Message Signaled Interrupts 630.Pq MSI-X 631are PCI capabilities that provide an alternate method for PCI 632devices to signal interrupts. 633The legacy INTx interrupt is available to PCI devices as a 634.Dv SYS_RES_IRQ 635resource with a resource ID of zero. 636MSI and MSI-X interrupts are available to PCI devices as one or more 637.Dv SYS_RES_IRQ 638resources with resource IDs greater than zero. 639A driver must ask the PCI bus to allocate MSI or MSI-X interrupts 640using 641.Fn pci_alloc_msi 642or 643.Fn pci_alloc_msix 644before it can use MSI or MSI-X 645.Dv SYS_RES_IRQ 646resources. 647A driver is not allowed to use the legacy INTx 648.Dv SYS_RES_IRQ 649resource if MSI or MSI-X interrupts have been allocated, 650and attempts to allocate MSI or MSI-X interrupts will fail if the 651driver is currently using the legacy INTx 652.Dv SYS_RES_IRQ 653resource. 654A driver is only allowed to use either MSI or MSI-X, 655but not both. 656.Pp 657The 658.Fn pci_msi_count 659function returns the maximum number of MSI messages supported by the 660device 661.Fa dev . 662If the device does not support MSI, 663then 664.Fn pci_msi_count 665returns zero. 666.Pp 667The 668.Fn pci_alloc_msi 669function attempts to allocate 670.Fa *count 671MSI messages for the device 672.Fa dev . 673The 674.Fn pci_alloc_msi 675function may allocate fewer messages than requested for various 676reasons including requests for more messages than the device 677.Fa dev 678supports, 679or if the system has a shortage of available MSI messages. 680On success, 681.Fa *count 682is set to the number of messages allocated and 683.Fn pci_alloc_msi 684returns zero. 685The 686.Dv SYS_RES_IRQ 687resources for the allocated messages will be available at consecutive 688resource IDs beginning with one. 689If 690.Fn pci_alloc_msi 691is not able to allocate any messages, 692it returns an error. 693Note that MSI only supports message counts that are powers of two; 694requests to allocate a non-power of two count of messages will fail. 695.Pp 696The 697.Fn pci_release_msi 698function is used to release any allocated MSI or MSI-X messages back 699to the system. 700If any MSI or MSI-X 701.Dv SYS_RES_IRQ 702resources are allocated by the driver or have a configured interrupt 703handler, 704this function will fail with 705.Er EBUSY . 706The 707.Fn pci_release_msi 708function returns zero on success and an error on failure. 709.Pp 710The 711.Fn pci_msix_count 712function returns the maximum number of MSI-X messages supported by the 713device 714.Fa dev . 715If the device does not support MSI-X, 716then 717.Fn pci_msix_count 718returns zero. 719.Pp 720The 721.Fn pci_msix_pba_bar 722function returns the offset in configuration space of the Base Address Register 723.Pq BAR 724containing the MSI-X Pending Bit Array (PBA) for device 725.Fa dev . 726The returned value can be used as the resource ID with 727.Xr bus_alloc_resource 9 728and 729.Xr bus_release_resource 9 730to allocate the BAR. 731If the device does not support MSI-X, 732then 733.Fn pci_msix_pba_bar 734returns -1. 735.Pp 736The 737.Fn pci_msix_table_bar 738function returns the offset in configuration space of the BAR 739containing the MSI-X vector table for device 740.Fa dev . 741The returned value can be used as the resource ID with 742.Xr bus_alloc_resource 9 743and 744.Xr bus_release_resource 9 745to allocate the BAR. 746If the device does not support MSI-X, 747then 748.Fn pci_msix_table_bar 749returns -1. 750.Pp 751The 752.Fn pci_alloc_msix 753function attempts to allocate 754.Fa *count 755MSI-X messages for the device 756.Fa dev . 757The 758.Fn pci_alloc_msix 759function may allocate fewer messages than requested for various 760reasons including requests for more messages than the device 761.Fa dev 762supports, 763or if the system has a shortage of available MSI-X messages. 764On success, 765.Fa *count 766is set to the number of messages allocated and 767.Fn pci_alloc_msix 768returns zero. 769For MSI-X messages, 770the resource ID for each 771.Dv SYS_RES_IRQ 772resource identifies the index in the MSI-X table of the 773corresponding message. 774A resource ID of one maps to the first index of the MSI-X table; 775a resource ID two identifies the second index in the table, etc. 776The 777.Fn pci_alloc_msix 778function assigns the 779.Fa *count 780messages allocated to the first 781.Fa *count 782table indices. 783If 784.Fn pci_alloc_msix 785is not able to allocate any messages, 786it returns an error. 787Unlike MSI, 788MSI-X does not require message counts that are powers of two. 789.Pp 790The BARs containing the MSI-X vector table and PBA must be 791allocated via 792.Xr bus_alloc_resource 9 793before calling 794.Fn pci_alloc_msix 795and must not be released until after calling 796.Fn pci_release_msi . 797Note that the vector table and PBA may be stored in the same BAR or in 798different BARs. 799.Pp 800The 801.Fn pci_pending_msix 802function examines the 803.Fa dev 804device's PBA 805to determine the pending status of the MSI-X message at table index 806.Fa index . 807If the indicated message is pending, 808this function returns a non-zero value; 809otherwise, 810it returns zero. 811Passing an invalid 812.Fa index 813to this function will result in undefined behavior. 814.Pp 815As mentioned in the description of 816.Fn pci_alloc_msix , 817MSI-X messages are initially assigned to the first N table entries. 818A driver may use a different distribution of available messages to 819table entries via the 820.Fn pci_remap_msix 821function. 822Note that this function must be called after a successful call to 823.Fn pci_alloc_msix 824but before any of the 825.Dv SYS_RES_IRQ 826resources are allocated. 827The 828.Fn pci_remap_msix 829function returns zero on success, 830or an error on failure. 831.Pp 832The 833.Fa vectors 834array should contain 835.Fa count 836message vectors. 837The array maps directly to the MSI-X table in that the first entry in 838the array specifies the message used for the first entry in the MSI-X 839table, 840the second entry in the array corresponds to the second entry in the 841MSI-X table, 842etc. 843The vector value in each array index can either be zero to indicate 844that no message should be assigned to the corresponding MSI-X table entry, 845or it can be a number from one to N 846.Po 847where N is the count returned from the previous call to 848.Fn pci_alloc_msix 849.Pc 850to indicate which of the allocated messages should be assigned to the 851corresponding MSI-X table entry. 852.Pp 853If 854.Fn pci_remap_msix 855succeeds, 856each MSI-X table entry with a non-zero vector will have an associated 857.Dv SYS_RES_IRQ 858resource whose resource ID corresponds to the table index as described 859above for 860.Fn pci_alloc_msix . 861MSI-X table entries that with a vector of zero will not have an 862associated 863.Dv SYS_RES_IRQ 864resource. 865Additionally, 866if any of the original messages allocated by 867.Fn pci_alloc_msix 868are not used in the new distribution of messages in the MSI-X table, 869they will be released automatically. 870Note that if a driver wishes to use fewer messages than were allocated by 871.Fn pci_alloc_msix , 872the driver must use a single, contiguous range of messages beginning 873with one in the new distribution. 874The 875.Fn pci_remap_msix 876function will fail if this condition is not met. 877.Sh IMPLEMENTATION NOTES 878The 879.Vt pci_addr_t 880type varies according to the size of the PCI bus address 881space on the target architecture. 882.Sh SEE ALSO 883.Xr pci 4 , 884.Xr pciconf 8 , 885.Xr bus_alloc_resource 9 , 886.Xr bus_dma 9 , 887.Xr bus_release_resource 9 , 888.Xr bus_setup_intr 9 , 889.Xr bus_teardown_intr 9 , 890.Xr devclass 9 , 891.Xr device 9 , 892.Xr driver 9 , 893.Xr rman 9 894.Rs 895.%B FreeBSD Developers' Handbook 896.%T NewBus 897.%U http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/developers-handbook/ 898.Re 899.Rs 900.%A Shanley 901.%A Anderson 902.%B PCI System Architecture 903.%N 2nd Edition 904.%I Addison-Wesley 905.%O ISBN 0-201-30974-2 906.Re 907.Sh AUTHORS 908.An -nosplit 909This manual page was written by 910.An Bruce M Simpson Aq Mt bms@FreeBSD.org 911and 912.An John Baldwin Aq Mt jhb@FreeBSD.org . 913.Sh BUGS 914The kernel PCI code has a number of references to 915.Dq "slot numbers" . 916These do not refer to the geographic location of PCI devices, 917but to the device number assigned by the combination of the PCI IDSEL 918mechanism and the platform firmware. 919This should be taken note of when working with the kernel PCI code. 920.Pp 921The PCI bus driver should allocate the MSI-X vector table and PBA internally 922as necessary rather than requiring the caller to do so. 923