xref: /freebsd/share/man/man9/microseq.9 (revision 7fdf597e96a02165cfe22ff357b857d5fa15ed8a)
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25.Dd June 6, 1998
26.Dt MICROSEQ 9
27.Os
28.Sh NAME
29.Nm microseq
30.Nd ppbus microsequencer developer's guide
31.Sh SYNOPSIS
32.In sys/types.h
33.In dev/ppbus/ppbconf.h
34.In dev/ppbus/ppb_msq.h
35.Sh DESCRIPTION
36See
37.Xr ppbus 4
38for ppbus description and general info about the microsequencer.
39.Pp
40The purpose of this document is to encourage developers to use the
41microsequencer mechanism in order to have:
42.Bl -enum -offset indent
43.It
44a uniform programming model
45.It
46efficient code
47.El
48.Pp
49Before using microsequences, you are encouraged to look at
50.Xr ppc 4
51microsequencer implementation and an example of how using it in
52.Xr ppi 4 .
53.Sh PPBUS register model
54.Ss Background
55The parallel port model chosen for ppbus is the PC parallel port model.
56Thus, any register described later has the same semantic than its counterpart
57in a PC parallel port.
58For more info about ISA/ECP programming, get the
59Microsoft standard referenced as "Extended Capabilities Port Protocol and
60ISA interface Standard".
61Registers described later are standard parallel port
62registers.
63.Pp
64Mask macros are defined in the standard ppbus include files for each valid
65bit of parallel port registers.
66.Ss Data register
67In compatible or nibble mode, writing to this register will drive data to the
68parallel port data lines.
69In any other mode, drivers may be tri-stated by
70setting the direction bit (PCD) in the control register.
71Reads to this register
72return the value on the data lines.
73.Ss Device status register
74This read-only register reflects the inputs on the parallel port interface.
75.Pp
76.Bl -column "Bit" "Name" "Description" -compact
77.It Em Bit Ta Em Name Ta Em Description
78.It 7 Ta nBUSY Ta "inverted version of parallel port Busy signal"
79.It 6 Ta nACK Ta "version of parallel port nAck signal"
80.It 5 Ta PERROR Ta "version of parallel port PERROR signal"
81.It 4 Ta SELECT Ta "version of parallel port Select signal"
82.It 3 Ta nFAULT Ta "version of parallel port nFault signal"
83.El
84.Pp
85Others are reserved and return undefined result when read.
86.Ss Device control register
87This register directly controls several output signals as well as enabling
88some functions.
89.Pp
90.Bl -column "Bit" "Name    " "Description" -compact
91.It Em Bit Ta Em Name Ta Em Description
92.It 5 Ta PCD Ta "direction bit in extended modes"
93.It 4 Ta IRQENABLE Ta "1 enables an interrupt on the rising edge of nAck"
94.It 3 Ta SELECTIN Ta "inverted and driven as parallel port nSelectin signal"
95.It 2 Ta nINIT Ta "driven as parallel port nInit signal"
96.It 1 Ta AUTOFEED Ta "inverted and driven as parallel port nAutoFd signal"
97.It 0 Ta STROBE Ta "inverted and driven as parallel port nStrobe signal"
98.El
99.Sh MICROINSTRUCTIONS
100.Ss Description
101.Em Microinstructions
102are either parallel port accesses, program iterations, submicrosequence or
103C calls.
104The parallel port must be considered as the logical model described in
105.Xr ppbus 4 .
106.Pp
107Available microinstructions are:
108.Bd -literal
109#define MS_OP_GET       0	/* get <ptr>, <len>			*/
110#define MS_OP_PUT       1	/* put <ptr>, <len>			*/
111#define MS_OP_RFETCH	2	/* rfetch <reg>, <mask>, <ptr>		*/
112#define MS_OP_RSET	3	/* rset <reg>, <mask>, <mask>		*/
113#define MS_OP_RASSERT	4	/* rassert <reg>, <mask>		*/
114#define MS_OP_DELAY     5	/* delay <val>				*/
115#define MS_OP_SET       6	/* set <val>				*/
116#define MS_OP_DBRA      7	/* dbra <offset>			*/
117#define MS_OP_BRSET     8	/* brset <mask>, <offset>		*/
118#define MS_OP_BRCLEAR   9	/* brclear <mask>, <offset>		*/
119#define MS_OP_RET       10	/* ret <retcode>			*/
120#define MS_OP_C_CALL	11	/* c_call <function>, <parameter>	*/
121#define MS_OP_PTR	12	/* ptr <pointer>			*/
122#define MS_OP_ADELAY	13	/* adelay <val>				*/
123#define MS_OP_BRSTAT	14	/* brstat <mask>, <mask>, <offset>	*/
124#define MS_OP_SUBRET	15	/* subret <code>			*/
125#define MS_OP_CALL	16	/* call <microsequence>			*/
126#define MS_OP_RASSERT_P	17	/* rassert_p <iter>, <reg>		*/
127#define MS_OP_RFETCH_P	18	/* rfetch_p <iter>, <reg>, <mask>	*/
128#define MS_OP_TRIG	19	/* trigger <reg>, <len>, <array>	*/
129.Ed
130.Ss Execution context
131The
132.Em execution context
133of microinstructions is:
134.Bl -bullet -offset indent
135.It
136the
137.Em program counter
138which points to the next microinstruction to execute either in the main
139microsequence or in a subcall
140.It
141the current value of
142.Em ptr
143which points to the next char to send/receive
144.It
145the current value of the internal
146.Em branch register
147.El
148.Pp
149This data is modified by some of the microinstructions, not all.
150.Ss MS_OP_GET and MS_OP_PUT
151are microinstructions used to do either predefined standard IEEE1284-1994
152transfers or programmed non-standard io.
153.Ss MS_OP_RFETCH - Register FETCH
154is used to retrieve the current value of a parallel port register, apply a
155mask and save it in a buffer.
156.Pp
157Parameters:
158.Bl -enum -offset indent
159.It
160register
161.It
162character mask
163.It
164pointer to the buffer
165.El
166.Pp
167Predefined macro: MS_RFETCH(reg,mask,ptr)
168.Ss MS_OP_RSET - Register SET
169is used to assert/clear some bits of a particular parallel port register,
170two masks are applied.
171.Pp
172Parameters:
173.Bl -enum -offset indent
174.It
175register
176.It
177mask of bits to assert
178.It
179mask of bits to clear
180.El
181.Pp
182Predefined macro: MS_RSET(reg,assert,clear)
183.Ss MS_OP_RASSERT - Register ASSERT
184is used to assert all bits of a particular parallel port register.
185.Pp
186Parameters:
187.Bl -enum -offset indent
188.It
189register
190.It
191byte to assert
192.El
193.Pp
194Predefined macro: MS_RASSERT(reg,byte)
195.Ss MS_OP_DELAY - microsecond DELAY
196is used to delay the execution of the microsequence.
197.Pp
198Parameter:
199.Bl -enum -offset indent
200.It
201delay in microseconds
202.El
203.Pp
204Predefined macro: MS_DELAY(delay)
205.Ss MS_OP_SET - SET internal branch register
206is used to set the value of the internal branch register.
207.Pp
208Parameter:
209.Bl -enum -offset indent
210.It
211integer value
212.El
213.Pp
214Predefined macro: MS_SET(accum)
215.Ss MS_OP_DBRA - \&Do BRAnch
216is used to branch if internal branch register decremented by one result value
217is positive.
218.Pp
219Parameter:
220.Bl -enum -offset indent
221.It
222integer offset in the current executed (sub)microsequence.
223Offset is added to
224the index of the next microinstruction to execute.
225.El
226.Pp
227Predefined macro: MS_DBRA(offset)
228.Ss MS_OP_BRSET - BRanch on SET
229is used to branch if some of the status register bits of the parallel port
230are set.
231.Pp
232Parameter:
233.Bl -enum -offset indent
234.It
235bits of the status register
236.It
237integer offset in the current executed (sub)microsequence.
238Offset is added to
239the index of the next microinstruction to execute.
240.El
241.Pp
242Predefined macro: MS_BRSET(mask,offset)
243.Ss MS_OP_BRCLEAR - BRanch on CLEAR
244is used to branch if some of the status register bits of the parallel port
245are cleared.
246.Pp
247Parameter:
248.Bl -enum -offset indent
249.It
250bits of the status register
251.It
252integer offset in the current executed (sub)microsequence.
253Offset is added to
254the index of the next microinstruction to execute.
255.El
256.Pp
257Predefined macro: MS_BRCLEAR(mask,offset)
258.Ss MS_OP_RET - RETurn
259is used to return from a microsequence.
260This instruction is mandatory.
261This
262is the only way for the microsequencer to detect the end of the microsequence.
263The return code is returned in the integer pointed by the (int *) parameter
264of the ppb_MS_microseq().
265.Pp
266Parameter:
267.Bl -enum -offset indent
268.It
269integer return code
270.El
271.Pp
272Predefined macro: MS_RET(code)
273.Ss MS_OP_C_CALL - C function CALL
274is used to call C functions from microsequence execution.
275This may be useful
276when a non-standard i/o is performed to retrieve a data character from the
277parallel port.
278.Pp
279Parameter:
280.Bl -enum -offset indent
281.It
282the C function to call
283.It
284the parameter to pass to the function call
285.El
286.Pp
287The C function shall be declared as a
288.Ft int(*)(void *p, char *ptr) .
289The ptr parameter is the current position in the buffer currently scanned.
290.Pp
291Predefined macro: MS_C_CALL(func,param)
292.Ss MS_OP_PTR - initialize internal PTR
293is used to initialize the internal pointer to the currently scanned buffer.
294This pointer is passed to any C call (see above).
295.Pp
296Parameter:
297.Bl -enum -offset indent
298.It
299pointer to the buffer that shall be accessed by xxx_P() microsequence calls.
300Note that this pointer is automatically incremented during xxx_P() calls
301.El
302.Pp
303Predefined macro: MS_PTR(ptr)
304.Ss MS_OP_ADELAY - do an Asynchronous DELAY
305is used to make a tsleep() during microsequence execution.
306The tsleep is
307executed at PPBPRI level.
308.Pp
309Parameter:
310.Bl -enum -offset indent
311.It
312delay in ms
313.El
314.Pp
315Predefined macro: MS_ADELAY(delay)
316.Ss MS_OP_BRSTAT - BRanch on STATe
317is used to branch on status register state condition.
318.Pp
319Parameter:
320.Bl -enum -offset indent
321.It
322mask of asserted bits.
323Bits that shall be asserted in the status register
324are set in the mask
325.It
326mask of cleared bits.
327Bits that shall be cleared in the status register
328are set in the mask
329.It
330integer offset in the current executed (sub)microsequence.
331Offset is added
332to the index of the next microinstruction to execute.
333.El
334.Pp
335Predefined macro: MS_BRSTAT(asserted_bits,clear_bits,offset)
336.Ss MS_OP_SUBRET - SUBmicrosequence RETurn
337is used to return from the submicrosequence call.
338This action is mandatory
339before a RET call.
340Some microinstructions (PUT, GET) may not be callable
341within a submicrosequence.
342.Pp
343No parameter.
344.Pp
345Predefined macro: MS_SUBRET()
346.Ss MS_OP_CALL - submicrosequence CALL
347is used to call a submicrosequence.
348A submicrosequence is a microsequence with
349a SUBRET call.
350Parameter:
351.Bl -enum -offset indent
352.It
353the submicrosequence to execute
354.El
355.Pp
356Predefined macro: MS_CALL(microseq)
357.Ss MS_OP_RASSERT_P - Register ASSERT from internal PTR
358is used to assert a register with data currently pointed by the internal PTR
359pointer.
360Parameter:
361.Bl -enum -offset indent
362.It
363amount of data to write to the register
364.It
365register
366.El
367.Pp
368Predefined macro: MS_RASSERT_P(iter,reg)
369.Ss MS_OP_RFETCH_P - Register FETCH to internal PTR
370is used to fetch data from a register.
371Data is stored in the buffer currently
372pointed by the internal PTR pointer.
373Parameter:
374.Bl -enum -offset indent
375.It
376amount of data to read from the register
377.It
378register
379.It
380mask applied to fetched data
381.El
382.Pp
383Predefined macro: MS_RFETCH_P(iter,reg,mask)
384.Ss MS_OP_TRIG - TRIG register
385is used to trigger the parallel port.
386This microinstruction is intended to
387provide a very efficient control of the parallel port.
388Triggering a register
389is writing data, wait a while, write data, wait a while...
390This allows to
391write magic sequences to the port.
392Parameter:
393.Bl -enum -offset indent
394.It
395amount of data to read from the register
396.It
397register
398.It
399size of the array
400.It
401array of unsigned chars.
402Each couple of u_chars define the data to write to
403the register and the delay in us to wait.
404The delay is limited to 255 us to
405simplify and reduce the size of the array.
406.El
407.Pp
408Predefined macro: MS_TRIG(reg,len,array)
409.Sh MICROSEQUENCES
410.Ss C structures
411.Bd -literal
412union ppb_insarg {
413     int     i;
414     char    c;
415     void    *p;
416     int     (* f)(void *, char *);
417};
418
419struct ppb_microseq {
420     int                     opcode;         /* microins. opcode */
421     union ppb_insarg        arg[PPB_MS_MAXARGS];    /* arguments */
422};
423.Ed
424.Ss Using microsequences
425To instantiate a microsequence, just declare an array of ppb_microseq
426structures and initialize it as needed.
427You may either use predefined macros
428or code directly your microinstructions according to the ppb_microseq
429definition.
430For example,
431.Bd -literal
432     struct ppb_microseq select_microseq[] = {
433
434	     /* parameter list
435	      */
436	     #define SELECT_TARGET    MS_PARAM(0, 1, MS_TYP_INT)
437	     #define SELECT_INITIATOR MS_PARAM(3, 1, MS_TYP_INT)
438
439	     /* send the select command to the drive */
440	     MS_DASS(MS_UNKNOWN),
441	     MS_CASS(H_nAUTO | H_nSELIN |  H_INIT | H_STROBE),
442	     MS_CASS( H_AUTO | H_nSELIN |  H_INIT | H_STROBE),
443	     MS_DASS(MS_UNKNOWN),
444	     MS_CASS( H_AUTO | H_nSELIN | H_nINIT | H_STROBE),
445
446	     /* now, wait until the drive is ready */
447	     MS_SET(VP0_SELTMO),
448/* loop: */     MS_BRSET(H_ACK, 2 /* ready */),
449	     MS_DBRA(-2 /* loop */),
450/* error: */    MS_RET(1),
451/* ready: */    MS_RET(0)
452     };
453.Ed
454.Pp
455Here, some parameters are undefined and must be filled before executing
456the microsequence.
457In order to initialize each microsequence, one
458should use the ppb_MS_init_msq() function like this:
459.Bd -literal
460     ppb_MS_init_msq(select_microseq, 2,
461		     SELECT_TARGET, 1 << target,
462		     SELECT_INITIATOR, 1 << initiator);
463.Ed
464.Pp
465and then execute the microsequence.
466.Ss The microsequencer
467The microsequencer is executed either at ppbus or adapter level (see
468.Xr ppbus 4
469for info about ppbus system layers).
470Most of the microsequencer is executed
471at ppc level to avoid ppbus to adapter function call overhead.
472But some
473actions like deciding whereas the transfer is IEEE1284-1994 compliant are
474executed at ppbus layer.
475.Sh SEE ALSO
476.Xr ppbus 4 ,
477.Xr ppc 4 ,
478.Xr ppi 4
479.Sh HISTORY
480The
481.Nm
482manual page first appeared in
483.Fx 3.0 .
484.Sh AUTHORS
485This
486manual page was written by
487.An Nicolas Souchu .
488.Sh BUGS
489Only one level of submicrosequences is allowed.
490.Pp
491When triggering the port, maximum delay allowed is 255 us.
492