1.\" Copyright (c) 2002, 2003 Hiten M. Pandya. 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions, and the following disclaimer, 9.\" without modification, immediately at the beginning of the file. 10.\" 2. The name of the author may not be used to endorse or promote products 11.\" derived from this software without specific prior written permission. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR, CONTRIBUTORS OR THE 17.\" VOICES IN HITEN PANDYA'S HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18.\" SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19.\" TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20.\" PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21.\" LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22.\" NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23.\" SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" 25.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 26.\" All rights reserved. 27.\" 28.\" This code is derived from software contributed to The NetBSD Foundation 29.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 30.\" NASA Ames Research Center. 31.\" 32.\" Redistribution and use in source and binary forms, with or without 33.\" modification, are permitted provided that the following conditions 34.\" are met: 35.\" 1. Redistributions of source code must retain the above copyright 36.\" notice, this list of conditions and the following disclaimer. 37.\" 2. Redistributions in binary form must reproduce the above copyright 38.\" notice, this list of conditions and the following disclaimer in the 39.\" documentation and/or other materials provided with the distribution. 40.\" 3. All advertising materials mentioning features or use of this software 41.\" must display the following acknowledgment: 42.\" This product includes software developed by the NetBSD 43.\" Foundation, Inc. and its contributors. 44.\" 4. Neither the name of The NetBSD Foundation nor the names of its 45.\" contributors may be used to endorse or promote products derived 46.\" from this software without specific prior written permission. 47.\" 48.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 49.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 50.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 51.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 52.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 53.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 54.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 55.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 56.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 57.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 58.\" POSSIBILITY OF SUCH DAMAGE. 59.\" 60.\" $FreeBSD$ 61.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $ 62.\" 63.Dd May 28, 2003 64.Dt BUS_DMA 9 65.Os 66.Sh NAME 67.Nm bus_dma , 68.Nm bus_dma_tag_create , 69.Nm bus_dma_tag_destroy , 70.Nm bus_dmamap_create , 71.Nm bus_dmamap_destroy , 72.Nm bus_dmamap_load , 73.Nm bus_dmamap_load_mbuf , 74.Nm bus_dmamap_load_uio , 75.Nm bus_dmamap_unload , 76.Nm bus_dmamap_sync , 77.Nm bus_dmamem_alloc , 78.Nm bus_dmamem_free 79.Nd Bus and Machine Independent DMA Mapping Interface 80.Sh SYNOPSIS 81.In machine/bus.h 82.Ft int 83.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \ 84"bus_size_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 85"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \ 86"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_lock_t *lockfunc" \ 87"void *lockfuncarg" "bus_dma_tag_t *dmat" 88.Ft int 89.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat" 90.Ft int 91.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp" 92.Ft int 93.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map" 94.Ft int 95.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \ 96"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 97"int flags" 98.Ft int 99.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 100"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 101"int flags" 102.Ft int 103.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 104"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 105"int flags" 106.Ft int 107.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \ 108"int flags" "bus_dmamap_t *mapp" 109.Ft void 110.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map" 111.Ft void 112.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 113"op" 114.Ft void 115.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \ 116"bus_dmamap_t map" 117.Sh DESCRIPTION 118Direct Memory Access (DMA) is a method of transferring data 119without involving the CPU, thus providing higher performance. 120A DMA transaction can be achieved between device to memory, 121device to device, or memory to memory. 122.Pp 123The 124.Nm 125API is a bus, device, and machine-independent (MI) interface to 126DMA mechanisms. 127It provides the client with flexibility and simplicity by 128abstracting machine dependent issues like setting up 129DMA mappings, handling cache issues, bus specific features 130and limitations. 131.Sh STRUCTURES AND TYPES 132.Bl -tag -width compact 133.It Vt bus_dma_tag_t 134A machine-dependent (MD) opaque type that describes the 135characteristics of DMA transactions. 136DMA tags are organized into a hierarchy, with each child 137tag inheriting the restrictions of its parent. 138This allows all devices along the path of DMA transactions 139to contribute to the constraints of those transactions. 140.It Vt bus_dma_filter_t 141Client specified address filter having the format: 142.Bl -tag -width compact 143.It Ft int 144.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr" 145.El 146.sp 147Address filters can be specified during tag creation to allow 148for devices who's DMA address restrictions cannot be specified 149by a single window. 150The 151.Fa filtarg 152is client specified during tag creation to be passed to all 153invocations of the callback. 154The 155.Fa testaddr 156argument contains a potential starting address of a DMA mapping. 157The filter function operates on the set of addresses from 158.Fa testaddr 159to 160.Ql trunc_page(testaddr) + PAGE_SIZE - 1 , 161inclusive. 162The filter function should return zero for any mapping in this range 163that can be accommodated by the device and non-zero otherwise. 164.It Vt bus_dma_segment_t 165A machine-dependent type that describes individual 166DMA segments. 167.Bd -literal 168 bus_addr_t ds_addr; 169 bus_size_t ds_len; 170.Ed 171.sp 172The 173.Fa ds_addr 174field contains the device visible address of the DMA segment, and 175.Fa ds_len 176contains the length of the DMA segment. 177Although the DMA segments returned by a mapping call will adhere to 178all restrictions necessary for a successful DMA operation, some conversion 179(e.g.\& a conversion from host byte order to the device's byte order) is 180almost always required when presenting segment information to the device. 181.It Vt bus_dmamap_t 182A machine-dependent opaque type describing an individual mapping. 183Multiple DMA maps can be associated with one DMA tag. 184.It Vt bus_dmamap_callback_t 185Client specified callback for receiving mapping information resulting from 186the load of a 187.Vt bus_dmamap_t 188via 189.Fn bus_dmamap_load . 190Callbacks are of the format: 191.Bl -tag -width compact 192.It Ft void 193.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \ 194"int nseg" "int error" 195.El 196.sp 197The 198.Fa callback_arg 199is the callback argument passed to dmamap load functions. 200The 201.Fa segs 202and 203.Fa nseg 204parameters describe an array of 205.Vt bus_dma_segment_t 206structures that represent the mapping. 207This array is only valid within the scope of the callback function. 208The success or failure of the mapping is indicated by the 209.Fa error 210parameter. 211More information on the use of callbacks can be found in the 212description of the individual dmamap load functions. 213.It Vt bus_dmamap_callback2_t 214Client specified callback for receiving mapping information resulting from 215the load of a 216.Vt bus_dmamap_t 217via 218.Fn bus_dmamap_load_uio 219or 220.Fn bus_dmamap_load_mbuf . 221.sp 222Callback2s are of the format: 223.Bl -tag -width compact 224.It Ft void 225.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \ 226"int nseg" "bus_size_t mapsize" "int error" 227.El 228.sp 229Callback2's behavior is the same as 230.Vt bus_dmamap_callback_t 231with the addition that the length of the data mapped is provided via 232.Fa mapsize . 233.It Vt bus_dmasync_op_t 234Memory synchronization operation specifier. 235Bus DMA requires explicit synchronization of memory with it's device 236visible mapping in order to guarantee memory coherency. 237The 238.Vt bus_dmasync_op_t 239allows the type of DMA operation that will be or has been performed 240to be communicated to the system so that the correct coherency measures 241are taken. 242All operations specified below are performed from the DMA engine's 243point of view: 244.Bl -tag -width BUS_DMASYNC_POSTWRITE 245.It Dv BUS_DMASYNC_PREREAD 246Perform any synchronization required after an update of memory by the CPU 247but prior to DMA read operations. 248.It Dv BUS_DMASYNC_PREWRITE 249Perform any synchronization required after an update of memory by the CPU 250but prior to DMA write operations. 251.It Dv BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE 252Perform any synchronization required prior to a combination of DMA read 253and write operations. 254.It Dv BUS_DMASYNC_POSTREAD 255Perform any synchronization required after DMA read operations, but prior 256to CPU access of the memory. 257.It Dv BUS_DMASYNC_POSTWRITE 258Perform any synchronization required after DMA write operations, but prior 259to CPU access of the memory. 260.It Dv BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE 261Perform any synchronization required after a combination of DMA read 262and write operations. 263.El 264.It Vt bus_dma_lock_t 265Client specified lock/mutex manipulation method. 266This will be called from 267within busdma whenever a client lock needs to be manipulated. 268This method is of the format: 269.Bl -tag -width compact 270.It Ft void 271.Fn "lockfunc" "void *lockfunc_arg" "bus_dma_lock_op_t op" 272.El 273.sp 274Two 275.Vt lockfunc 276implementations are provided for convenience. 277.Fn busdma_lock_mutex 278performs standard mutex operations on the sleep mutex provided via the 279.Fa lockfuncarg . 280passed into 281.Fn bus_dma_tag_create . 282.Fn dflt_lock 283will generate a system panic if it is called. 284It is substituted into the tag when 285.Fa lockfunc 286is passed as NULL to 287.Fn bus_dma_tag_create . 288.It Vt bus_dma_lock_op_t 289Operations to be performed by the client-specified 290.Fn lockfunc . 291.Bl -tag -width BUS_DMA_UNLOCK 292.It Dv BUS_DMA_LOCK 293Acquires and/or locks the client locking primitive. 294.It Dv BUS_DMA_UNLOCK 295Releases and/or unlocks the client locking primitive. 296.El 297.El 298.sp 299.Sh FUNCTIONS 300.Bl -tag -width compact 301.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \ 302"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \ 303"flags" "lockfunc" "lockfuncarg" "*dmat" 304Allocates a device specific DMA tag, and initializes it according to 305the arguments provided: 306.Bl -tag -width *filtfuncarg -compact 307.It Fa parent 308Indicates restrictions between the parent bridge, CPU memory, and the 309device. 310May be NULL, if no DMA restrictions are to be inherited. 311.It Fa alignment 312Alignment constraint, in bytes, of any mappings created using this tag. 313The alignment must be a power of 2. 314Hardware that can DMA starting at any address would specify 315.Em 1 316for byte alignment. 317Hardware requiring DMA transfers to start on a multiple of 4K 318would specify 319.Em 4096. 320.It Fa boundary 321Boundary constraint, in bytes, of the target DMA memory region. 322The boundary indicates the set of addresses, all multiples of the 323boundary argument, that cannot be crossed by a single 324.Vt bus_dma_segment_t . 325The boundary must be a power of 2 and must be no smaller that the 326maximum segment size. 327.Ql 0 328indicates that there are no boundary restrictions. 329.It Fa lowaddr 330.It Fa highaddr 331Bounds of the window of bus address space that 332.Em cannot 333be directly accessed by the device. 334The window contains all address greater than lowaddr and 335less than or equal to highaddr. 336For example, a device incapable of DMA above 4GB, would specify 337a highaddr of 338.Dv BUS_SPACE_MAXADDR 339and a lowaddr of 340.Dv BUS_SPACE_MAXADDR_32BIT . 341Similarly a device that can only dma to addresses bellow 16MB would 342specify a highaddr of 343.Dv BUS_SPACE_MAXADDR 344and a lowaddr of 345.Dv BUS_SPACE_MAXADDR_24BIT . 346Some implementations requires that some region of device visible 347address space, overlapping available host memory, be outside the 348window. 349This area of 350.Ql safe memory 351is used to bounce requests that would otherwise conflict with 352the exclusion window. 353.It Fa filtfunc 354Optional filter function (may be NULL) to be called for any attempt to 355map memory into the window described by 356.Fa lowaddr 357and 358.Fa highaddr. 359A filter function is only required when the single window described 360by 361.Fa lowaddr 362and 363.Fa highaddr 364cannot adequately describe the constraints of the device. 365The filter function will be called for every machine page 366that overlaps the exclusion window. 367.It Fa filtfuncarg 368Argument passed to all calls to the filter function for this tag. 369May be NULL. 370.It Fa maxsize 371Maximum size, in bytes, of the sum of all segment lengths in a given 372DMA mapping associated with this tag. 373.It Fa nsegments 374Number of discontinuities (scatter/gather segments) allowed 375in a DMA mapped region. 376If there is no restriction, 377.Dv BUS_SPACE_UNRESTRICTED 378may be specified. 379.It Fa maxsegsz 380Maximum size, in bytes, of a segment in any DMA mapped region associated 381with 382.Fa dmat . 383.It Fa flags 384Are as follows: 385.Bl -tag -width "BUS_DMA_ALLOCNOW" -compact 386.It Dv BUS_DMA_ALLOCNOW 387Allocate the resources necessary to guarantee that all map load 388operations associated with this tag will not block. 389If sufficient resources are not available, 390.Er ENOMEM 391is returned. 392.El 393.It Fa lockfunc 394Optional lock manipulation function (may be NULL) to be called when busdma 395needs to manipulate a lock on behalf of the client. 396If NULL is specified, 397.Fn dflt_lock 398is used. 399.It Fa lockfuncarg 400Optional argument to be passed to the function specified by 401.Fa lockfunc . 402.It Fa dmat 403Pointer to a bus_dma_tag_t where the resulting DMA tag will 404be stored. 405.El 406.Pp 407Returns 408.Er ENOMEM 409if sufficient memory is not available for tag creation 410or allocating mapping resources. 411.It Fn bus_dma_tag_destroy "dmat" 412Deallocate the DMA tag 413.Fa dmat 414that was created by 415.Fn bus_dma_tag_create . 416.Pp 417Returns 418.Er EBUSY 419if any DMA maps remain associated with 420.Fa dmat 421or 422.Ql 0 423on success. 424.It Fn bus_dmamap_create "dmat" "flags" "*mapp" 425Allocates and initializes a DMA map. 426Arguments are as follows: 427.Bl -tag -width nsegments -compact 428.It Fa dmat 429DMA tag. 430.It Fa flags 431The value of this argument is currently undefined and should be 432specified as 433.Ql 0 . 434.It Fa mapp 435Pointer to a 436.Vt bus_dmamap_t 437where the resulting DMA map will be stored. 438.El 439.Pp 440Returns 441.Er ENOMEM 442if sufficient memory is not available for creating the 443map or allocating mapping resources. 444.It Fn bus_dmamap_destroy "dmat" "map" 445Frees all resources associated with a given DMA map. 446Arguments are as follows: 447.Bl -tag -width dmat -compact 448.It Fa dmat 449DMA tag used to allocate 450.Fa map . 451.It Fa map 452The DMA map to destroy. 453.El 454.Pp 455Returns 456.Er EBUSY 457if a mapping is still active for 458.Fa map . 459.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" "..." 460Creates a mapping in device visible address space of 461.Fa buflen 462bytes of 463.Fa buf , 464associated with the DMA map 465.Fa map. 466Arguments are as follows: 467.Bl -tag -width buflen -compact 468.It Fa dmat 469DMA tag used to allocate 470.Fa map. 471.It Fa map 472A DMA map without a currently active mapping. 473.It Fa buf 474A kernel virtual address pointer to a contiguous (in KVA) buffer, to be 475mapped into device visible address space. 476.It Fa buflen 477The size of the buffer. 478.It Fa callback Fa callback_arg 479The callback function, and its argument. 480.It Fa flags 481The value of this argument is currently undefined, and should be 482specified as 483.Ql 0 . 484.El 485.Pp 486Return values to the caller are as follows: 487.Bl -tag -width EINPROGRESS -compact 488.It 0 489The callback has been called and completed. 490The status of the mapping has been delivered to the callback. 491.It Er EINPROGRESS 492The mapping has been deferred for lack of resources. 493The callback will be called as soon as resources are available. 494Callbacks are serviced in FIFO order. 495DMA maps created from DMA tags that are allocated with 496the 497.Dv BUS_DMA_ALLOCNOW 498flag will never return this status for a load operation. 499.It Er EINVAL 500The load request was invalid. 501The callback has not, and will not be called. 502This error value may indicate that 503.Fa dmat , 504.Fa map , 505.Fa buf , 506or 507.Fa callback 508were invalid, or 509.Fa buslen 510was larger than the 511.Fa maxsize 512argument used to create the dma tag 513.Fa dmat . 514.El 515.Pp 516When the callback is called, it is presented with an error value 517indicating the disposition of the mapping. 518Error may be one of the following: 519.Bl -tag -width EINPROGRESS -compact 520.It 0 521The mapping was successful and the 522.Fa dm_segs 523callback argument contains an array of 524.Vt bus_dma_segment_t 525elements describing the mapping. 526This array is only valid during the scope of the callback function. 527.It Er EFBIG 528A mapping could not be achieved within the segment constraints provided 529in the tag even though the requested allocation size was less than maxsize. 530.El 531.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \ 532"flags" 533This is a variation of 534.Fn bus_dmamap_load 535which maps mbuf chains 536for DMA transfers. 537A 538.Vt bus_size_t 539argument is also passed to the callback routine, which 540contains the mbuf chain's packet header length. 541.Pp 542Mbuf chains are assumed to be in kernel virtual address space. 543.Pp 544Returns 545.Er EINVAL 546if the size of the mbuf chain exceeds the maximum limit of the 547DMA tag. 548.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags" 549This is a variation of 550.Fn bus_dmamap_load 551which maps buffers pointed to by 552.Fa uio 553for DMA transfers. 554A 555.Vt bus_size_t 556argument is also passed to the callback routine, which contains the size of 557.Fa uio , 558i.e. 559.Fa uio->uio_resid . 560.Pp 561If 562.Fa uio->uio_segflg 563is 564.Dv UIO_USERSPACE , 565then it is assumed that the buffer, 566.Fa uio 567is in 568.Fa "uio->uio_td->td_proc" Ns 's 569address space. 570User space memory must be in-core and wired prior to attempting a map 571load operation. 572.It Fn bus_dmamap_unload "dmat" "map" 573Unloads a DMA map. 574Arguments are as follows: 575.Bl -tag -width dmam -compact 576.It Fa dmat 577DMA tag used to allocate 578.Fa map . 579.It Fa map 580The DMA map that is to be unloaded. 581.El 582.Pp 583.Fn bus_dmamap_unload 584will not perform any implicit synchronization of DMA buffers. 585This must be done explicitly by a call to 586.Fn bus_dmamap_sync 587prior to unloading the map. 588.It Fn bus_dmamap_sync "dmat" "map" "op" 589Performs synchronization of a device visible mapping with the CPU visible 590memory referenced by that mapping. 591Arguments are as follows: 592.Bl -tag -width dmat -compact 593.It Fa dmat 594DMA tag used to allocate 595.Fa map . 596.It Fa map 597The DMA mapping to be synchronized. 598.It Fa op 599Type of synchronization operation to perform. 600See the definition of 601.Vt bus_dmasync_op_t 602for a description of the acceptable values for 603.Fa op . 604.El 605.Pp 606.Fn bus_dmamap_sync 607is the method used to ensure that CPU and device DMA access to shared 608memory is coherent. 609For example, the CPU might be used to setup the contents of a buffer 610that is to be DMA'ed into a device. 611To ensure that the data are visible via the device's mapping of that 612memory, the buffer must be loaded and a dma sync operation of 613.Dv BUS_DMASYNC_PREREAD 614must be performed. 615Additional sync operations must be performed after every CPU write 616to this memory if additional DMA reads are to be performed. 617Conversely, for the DMA write case, the buffer must be loaded, 618and a dma sync operation of 619.Dv BUS_DMASYNC_PREWRITE 620must be performed. 621The CPU will only be able to see the results of this DMA write 622once the DMA has completed and a 623.Dv BUS_DMASYNC_POSTWRITE 624operation has been performed. 625.Pp 626If DMA read and write operations are not preceded and followed by the 627appropriate synchronization operations, behavior is undefined. 628.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "mapp" 629Allocates memory that is mapped into KVA at the address returned 630in 631.Fa vaddr 632that is permanently loaded into the newly created 633.Vt bus_dmamap_t 634returned via 635.Fa mapp . 636Arguments are as follows: 637.Bl -tag -width alignment -compact 638.It Fa dmat 639DMA tag describing the constraints of the DMA mapping. 640.It Fa vaddr 641Pointer to a pointer that will hold the returned KVA mapping of 642the allocated region. 643.It Fa flags 644Flags are defined as follows: 645.Bl -tag -width BUS_DMA_NOWAIT -compact 646.It Dv BUS_DMA_WAITOK 647The routine can safely wait (sleep) for resources. 648.It Dv BUS_DMA_NOWAIT 649The routine is not allowed to wait for resources. 650If resources are not available, 651.Dv ENOMEM 652is returned. 653.It Dv BUS_DMA_COHERENT 654Attempt to map this memory such that cache sync operations are 655as cheap as possible. 656This flag is typically set on memory that will be accessed by both 657a CPU and a DMA engine, frequently. 658Use of this flag does not remove the requirement of using 659bus_dmamap_sync, but it may reduce the cost of performing 660these operations. 661.It Dv BUS_DMA_ZERO 662Causes the allocated memory to be set to all zeros. 663.El 664.It Fa mapp 665Pointer to storage for the returned DMA map. 666.El 667.Pp 668The size of memory to be allocated is 669.Fa maxsize 670as specified in 671.Fa dmat . 672.Pp 673The current implementation of 674.Fn bus_dmamem_alloc 675will allocate all requests as a single segment. 676.Pp 677Although no explicit loading is required to access the memory 678referenced by the returned map, the synchronization requirements 679as described in the 680.Fn bus_dmamap_sync 681section still apply. 682.Pp 683Returns 684.Er ENOMEM 685if sufficient memory is not available for completing 686the operation. 687.It Fn bus_dmamem_free "dmat" "*vaddr" "map" 688Frees memory previously allocated by 689.Fn bus_dmamem_alloc . 690Any mappings 691will be invalidated. 692Arguments are as follows: 693.Bl -tag -width vaddr -compact 694.It Fa dmat 695DMA tag. 696.It Fa vaddr 697Kernel virtual address of the memory. 698.It Fa map 699DMA map to be invalidated. 700.El 701.El 702.Sh RETURN VALUES 703Behavior is undefined if invalid arguments are passed to 704any of the above functions. 705If sufficient resources cannot be allocated for a given 706transaction, 707.Er ENOMEM 708is returned. 709All 710routines that are not of type, 711.Vt void , 712will return 0 on success or an error 713code, as discussed above. 714.Pp 715All 716.Vt void 717routines will succeed if provided with valid arguments. 718.Sh SEE ALSO 719.Xr devclass 9 , 720.Xr device 9 , 721.Xr driver 9 , 722.Xr rman 9 723.Pp 724.Rs 725.%A "Jason R. Thorpe" 726.%T "A Machine-Independent DMA Framework for NetBSD" 727.%J "Proceedings of the Summer 1998 USENIX Technical Conference" 728.%Q "USENIX Association" 729.%D "June 1998" 730.Re 731.Sh HISTORY 732The 733.Nm 734interface first appeared in 735.Nx 1.3 . 736.Pp 737The 738.Nm 739API was adopted from 740.Nx 741for use in the CAM SCSI subsystem. 742The alterations to the original API were aimed to remove the need for 743a 744.Vt bus_dma_segment_t 745array stored in each 746.Vt bus_dmamap_t 747while allowing callers to queue up on scarce resources. 748.Sh AUTHORS 749The 750.Nm 751interface was designed and implemented by 752.An Jason R. Thorpe 753of the Numerical Aerospace Simulation Facility, NASA Ames Research Center. 754Additional input on the 755.Nm 756design was provided by 757.An -nosplit 758.An Chris Demetriou , 759.An Charles Hannum , 760.An Ross Harvey , 761.An Matthew Jacob , 762.An Jonathan Stone , 763and 764.An Matt Thomas . 765.Pp 766The 767.Nm 768interface in 769.Fx 770benefits from the contributions of 771.An Justin T. Gibbs , 772.An Peter Wemm , 773.An Doug Rabson , 774.An Matthew N. Dodd , 775.An Sam Leffler , 776.An Maxime Henrion , 777.An Jake Burkholder , 778.An Takahashi Yoshihiro , 779.An Scott Long 780and many others. 781.Pp 782This manual page was written by 783.An Hiten M. Pandya 784and 785.An Justin T. Gibbs . 786