1.\" Copyright (c) 2002, 2003 Hiten M. Pandya. 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions, and the following disclaimer, 9.\" without modification, immediately at the beginning of the file. 10.\" 2. The name of the author may not be used to endorse or promote products 11.\" derived from this software without specific prior written permission. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR, CONTRIBUTORS OR THE 17.\" VOICES IN HITEN PANDYA'S HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18.\" SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19.\" TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20.\" PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21.\" LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22.\" NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23.\" SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" 25.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 26.\" All rights reserved. 27.\" 28.\" This code is derived from software contributed to The NetBSD Foundation 29.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 30.\" NASA Ames Research Center. 31.\" 32.\" Redistribution and use in source and binary forms, with or without 33.\" modification, are permitted provided that the following conditions 34.\" are met: 35.\" 1. Redistributions of source code must retain the above copyright 36.\" notice, this list of conditions and the following disclaimer. 37.\" 2. Redistributions in binary form must reproduce the above copyright 38.\" notice, this list of conditions and the following disclaimer in the 39.\" documentation and/or other materials provided with the distribution. 40.\" 3. All advertising materials mentioning features or use of this software 41.\" must display the following acknowledgment: 42.\" This product includes software developed by the NetBSD 43.\" Foundation, Inc. and its contributors. 44.\" 4. Neither the name of The NetBSD Foundation nor the names of its 45.\" contributors may be used to endorse or promote products derived 46.\" from this software without specific prior written permission. 47.\" 48.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 49.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 50.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 51.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 52.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 53.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 54.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 55.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 56.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 57.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 58.\" POSSIBILITY OF SUCH DAMAGE. 59.\" 60.\" $FreeBSD$ 61.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $ 62.\" 63.Dd May 28, 2003 64.Dt BUS_DMA 9 65.Os 66.Sh NAME 67.Nm bus_dma , 68.Nm bus_dma_tag_create , 69.Nm bus_dma_tag_destroy , 70.Nm bus_dmamap_create , 71.Nm bus_dmamap_destroy , 72.Nm bus_dmamap_load , 73.Nm bus_dmamap_load_mbuf , 74.Nm bus_dmamap_load_uio , 75.Nm bus_dmamap_unload , 76.Nm bus_dmamap_sync , 77.Nm bus_dmamem_alloc , 78.Nm bus_dmamem_free , 79.Nd Bus and Machine Independent DMA Mapping Interface 80.Sh SYNOPSIS 81.In machine/bus.h 82.Ft int 83.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \ 84"bus_size_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 85"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \ 86"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_lock_t *lockfunc" \ 87"void *lockfuncarg" "bus_dma_tag_t *dmat" 88.Ft int 89.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat" 90.Ft int 91.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp" 92.Ft int 93.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map" 94.Ft int 95.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \ 96"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 97"int flags" 98.Ft int 99.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 100"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 101"int flags" 102.Ft int 103.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 104"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 105"int flags" 106.Ft int 107.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \ 108"int flags" "bus_dmamap_t *mapp" 109.Ft void 110.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map" 111.Ft void 112.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 113"op" 114.Ft void 115.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \ 116"bus_dmamap_t map" 117.Sh DESCRIPTION 118Direct Memory Access (DMA) is a method of transferring data 119without involving the CPU, thus providing higher performance. 120A DMA transaction can be achieved between device to memory, 121device to device, or memory to memory. 122.Pp 123The 124.Nm 125API is a bus, device, and machine-independent (MI) interface to 126DMA mechanisms. 127It provides the client with flexibility and simplicity by 128abstracting machine dependent issues like setting up 129DMA mappings, handling cache issues, bus specific features 130and limitations. 131.Sh STRUCTURES AND TYPES 132.Bl -tag -width compact 133.It Vt bus_dma_tag_t 134A machine-dependent (MD) opaque type that describes the 135characteristics of DMA transactions. 136DMA tags are organized into a hierarchy, with each child 137tag inheriting the restrictions of its parent. 138This allows all devices along the path of DMA transactions 139to contribute to the constraints of those transactions. 140.It Vt bus_dma_filter_t 141Client specified address filter having the format: 142.Bl -tag -width compact 143.It Ft int 144.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr" 145.El 146.sp 147Address filters can be specified during tag creation to allow 148for devices who's DMA address restrictions cannot be specified 149by a single window. 150The 151.Fa filtarg 152is client specified during tag creation to be passed to all 153invocations of the callback. 154The 155.Fa testaddr 156argument contains a potential starting address of a DMA mapping. 157The filter function operates on the set of addresses from 158.Fa testaddr 159to 160.Ql trunc_page(testaddr) + PAGE_SIZE - 1 , 161inclusive. 162The filter function should return zero for any mapping in this range 163that can be accommodated by the device and non-zero otherwise. 164.It Vt bus_dma_segment_t 165A machine-dependent type that describes individual 166DMA segments. 167.Bd -literal 168 bus_addr_t ds_addr; 169 bus_size_t ds_len; 170.Ed 171.sp 172The 173.Fa ds_addr 174field contains the device visible address of the DMA segment, and 175.Fa ds_len 176contains the length of the DMA segment. 177Although the DMA segments returned by a mapping call will adhere to 178all restrictions necessary for a successful DMA operation, some conversion 179(e.g. a conversion from host byte order to the device's byte order) is 180almost always required when presenting segment information to the device. 181.It Vt bus_dmamap_t 182A machine-dependent opaque type describing an individual mapping. 183Multiple DMA maps can be associated with one DMA tag. 184.It Vt bus_dmamap_callback_t 185Client specified callback for receiving mapping information resulting from 186the load of a 187.Vt bus_dmamap_t 188via 189.Fn bus_dmamap_load . 190Callbacks are of the format: 191.Bl -tag -width compact 192.It Ft void 193.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \ 194"int nseg" "int error" 195.El 196.sp 197The 198.Fa callback_arg 199is the callback argument passed to dmamap load functions. 200The 201.Fa segs 202and 203.Fa nseg 204parameters describe an array of 205.Vt bus_dma_segment_t 206structures that represent the mapping. 207This array is only valid within the scope of the callback function. 208The success or failure of the mapping is indicated by the 209.Fa error 210parameter. 211More information on the use of callbacks can be found in the 212description of the individual dmamap load functions. 213.It Vt bus_dmamap_callback2_t 214Client specified callback for receiving mapping information resulting from 215the load of a 216.Vt bus_dmamap_t 217via 218.Fn bus_dmamap_load_uio 219or 220.Fn bus_dmamap_load_mbuf . 221.sp 222Callback2s are of the format: 223.Bl -tag -width compact 224.It Ft void 225.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \ 226"int nseg" "bus_size_t mapsize" "int error" 227.El 228.sp 229Callback2's behavior is the same as 230.Vt bus_dmamap_callback_t 231with the addition that the length of the data mapped is provided via 232.Fa mapsize . 233.It Vt bus_dmasync_op_t 234Memory synchronization operation specifier. 235Bus DMA requires explicit synchronization of memory with it's device 236visible mapping in order to guarantee memory coherency. 237The 238.Vt bus_dmasync_op_t 239allows the type of DMA operation that will be or has been performed 240to be communicated to the system so that the correct coherency measures 241are taken. 242All operations specified below are performed from the DMA engine's 243point of view: 244.Bl -tag -width BUS_DMASYNC_POSTWRITE 245.It Dv BUS_DMASYNC_PREREAD 246Perform any synchronization required after an update of memory by the CPU 247but prior to DMA read operations. 248.It Dv BUS_DMASYNC_PREWRITE 249Perform any synchronization required after an update of memory by the CPU 250but prior to DMA write operations. 251.It Dv BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE 252Perform any synchronization required prior to a combination of DMA read 253and write operations. 254.It Dv BUS_DMASYNC_POSTREAD 255Perform any synchronization required after DMA read operations, but prior 256to CPU access of the memory. 257.It Dv BUS_DMASYNC_POSTWRITE 258Perform any synchronization required after DMA write operations, but prior 259to CPU access of the memory. 260.It Dv BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE 261Perform any synchronization required after a combination of DMA read 262and write operations. 263.El 264.It Vt bus_dma_lock_t 265Client specified lock/mutex manipulation method. This will be called from 266within busdma whenever a client lock needs to be manipulated. 267This method is of the format: 268.Bl -tag -width compact 269.It Ft void 270.Fn "lockfunc" "void *lockfunc_arg" "bus_dma_lock_op_t op" 271.El 272.sp 273Two 274.Vt lockfunc 275implementations are provided for convenience. 276.Fn busdma_lock_mutex 277performs standard mutex operations on the sleep mutex provided via the 278.Fa lockfuncarg . 279passed into 280.Fn bus_dma_tag_create . 281.Fn dflt_lock 282will generate a system panic if it is called. It is substituted into 283the tag when 284.Fa lockfunc 285is passed as NULL to 286.Fn bus_dma_tag_create . 287.It Vt bus_dma_lock_op_t 288Operations to be performed by the client-specified 289.Fn lockfunc . 290.Bl -tag -width BUS_DMA_UNLOCK 291.It Dv BUS_DMA_LOCK 292Aquires and/or locks the client locking primitive. 293.It Dv BUS_DMA_UNLOCK 294Releases and/or unlocks the client locking primitive. 295.El 296.El 297.sp 298.Sh FUNCTIONS 299.Bl -tag -width compact 300.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \ 301"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \ 302"flags" "lockfunc" "lockfuncarg" "*dmat" 303Allocates a device specific DMA tag, and initializes it according to 304the arguments provided: 305.Bl -tag -width *filtfuncarg -compact 306.It Fa parent 307Indicates restrictions between the parent bridge, CPU memory, and the 308device. 309May be NULL, if no DMA restrictions are to be inherited. 310.It Fa alignment 311Alignment constraint, in bytes, of any mappings created using this tag. 312The alignment must be a power of 2. 313Hardware that can DMA starting at any address would specify 314.Em 1 315for byte alignment. 316Hardware requiring DMA transfers to start on a multiple of 4K 317would specify 318.Em 4096. 319.It Fa boundary 320Boundary constraint, in bytes, of the target DMA memory region. 321The boundary indicates the set of addresses, all multiples of the 322boundary argument, that cannot be crossed by a single 323.Vt bus_dma_segment_t . 324The boundary must be either a power of 2 or 0. 325.Ql 0 326indicates that there are no boundary restrictions. 327.It Fa lowaddr 328.It Fa highaddr 329Bounds of the window of bus address space that 330.Em cannot 331be directly accessed by the device. 332The window contains all address greater than lowaddr and 333less than or equal to highaddr. 334For example, a device incapable of DMA above 4GB, would specify 335a highaddr of 336.Dv BUS_SPACE_MAXADDR 337and a lowaddr of 338.Dv BUS_SPACE_MAXADDR_32BIT . 339Similarly a device that can only dma to addresses bellow 16MB would 340specify a highaddr of 341.Dv BUS_SPACE_MAXADDR 342and a lowaddr of 343.Dv BUS_SPACE_MAXADDR_24BIT . 344Some implementations requires that some region of device visible 345address space, overlapping available host memory, be outside the 346window. 347This area of 348.Ql safe memory 349is used to bounce requests that would otherwise conflict with 350the exclusion window. 351.It Fa filtfunc 352Optional filter function (may be NULL) to be called for any attempt to 353map memory into the window described by 354.Fa lowaddr 355and 356.Fa highaddr. 357A filter function is only required when the single window described 358by 359.Fa lowaddr 360and 361.Fa highaddr 362cannot adequately describe the constraints of the device. 363The filter function will be called for every machine page 364that overlaps the exclusion window. 365.It Fa filtfuncarg 366Argument passed to all calls to the filter function for this tag. 367May be NULL. 368.It Fa maxsize 369Maximum size, in bytes, of the sum of all segment lengths in a given 370DMA mapping associated with this tag. 371.It Fa nsegments 372Number of discontinuities (scatter/gather segments) allowed 373in a DMA mapped region. 374If there is no restriction, 375.Dv BUS_SPACE_UNRESTRICTED 376may be specified. 377.It Fa maxsegsz 378Maximum size, in bytes, of a segment in any DMA mapped region associated 379with 380.Fa dmat . 381.It Fa flags 382Are as follows: 383.Bl -tag -width "BUS_DMA_ALLOCNOW" -compact 384.It Dv BUS_DMA_ALLOCNOW 385Allocate the resources necessary to guarantee that all map load 386operations associated with this tag will not block. 387If sufficient resources are not available, 388.Er ENOMEM 389is returned. 390.El 391.It Fa lockfunc 392Optional lock manipulation function (may be NULL) to be called when busdma 393needs to manipulate a lock on behalf of the client. If NULL is specified, 394.Fn dflt_lock 395is used. 396.It Fa lockfuncarg 397Optional argument to be passed to the function specified by 398.Fa lockfunc . 399.It Fa dmat 400Pointer to a bus_dma_tag_t where the resulting DMA tag will 401be stored. 402.El 403.Pp 404Returns 405.Er ENOMEM 406if sufficient memory is not available for tag creation 407or allocating mapping resources. 408.It Fn bus_dma_tag_destroy "dmat" 409Deallocate the DMA tag 410.Fa dmat 411that was created by 412.Fn bus_dma_tag_create . 413.Pp 414Returns 415.Er EBUSY 416if any DMA maps remain associated with 417.Fa dmat 418or 419.Ql 0 420on success. 421.It Fn bus_dmamap_create "dmat" "flags" "*mapp" 422Allocates and initializes a DMA map. 423Arguments are as follows: 424.Bl -tag -width nsegments -compact 425.It Fa dmat 426DMA tag. 427.It Fa flags 428The value of this argument is currently undefined and should be 429specified as 430.Ql 0 . 431.It Fa mapp 432Pointer to a 433.Vt bus_dmamap_t 434where the resulting DMA map will be stored. 435.El 436.Pp 437Returns 438.Er ENOMEM 439if sufficient memory is not available for creating the 440map or allocating mapping resources. 441.It Fn bus_dmamap_destroy "dmat" "map" 442Frees all resources associated with a given DMA map. 443Arguments are as follows: 444.Bl -tag -width dmat -compact 445.It Fa dmat 446DMA tag used to allocate 447.Fa map . 448.It Fa map 449The DMA map to destroy. 450.El 451.Pp 452Returns 453.Er EBUSY 454if a mapping is still active for 455.Fa map . 456.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" "..." 457Creates a mapping in device visible address space of 458.Fa buflen 459bytes of 460.Fa buf , 461associated with the DMA map 462.Fa map. 463Arguments are as follows: 464.Bl -tag -width buflen -compact 465.It Fa dmat 466DMA tag used to allocate 467.Fa map. 468.It Fa map 469A DMA map without a currently active mapping. 470.It Fa buf 471A kernel virtual address pointer to a contiguous (in KVA) buffer, to be 472mapped into device visible address space. 473.It Fa buflen 474The size of the buffer. 475.It Fa callback Fa callback_arg 476The callback function, and its argument. 477.It Fa flags 478The value of this argument is currently undefined, and should be 479specified as 480.Ql 0 . 481.El 482.Pp 483Return values to the caller are as follows: 484.Bl -tag -width EINPROGRESS -compact 485.It 0 486The callback has been called and completed. 487The status of the mapping has been delivered to the callback. 488.It Er EINPROGRESS 489The mapping has been deferred for lack of resources. 490The callback will be called as soon as resources are available. 491Callbacks are serviced in FIFO order. 492DMA maps created from DMA tags that are allocated with 493the 494.Dv BUS_DMA_ALLOCNOW 495flag will never return this status for a load operation. 496.It Er EINVAL 497The load request was invalid. 498The callback has not, and will not be called. 499This error value may indicate that 500.Fa dmat , 501.Fa map , 502.Fa buf , 503or 504.Fa callback 505were invalid, or 506.Fa buslen 507was larger than the 508.Fa maxsize 509argument used to create the dma tag 510.Fa dmat . 511.El 512.Pp 513When the callback is called, it is presented with an error value 514indicating the disposition of the mapping. 515Error may be one of the following: 516.Bl -tag -width EINPROGRESS -compact 517.It 0 518The mapping was successful and the 519.Fa dm_segs 520callback argument contains an array of 521.Vt bus_dma_segment_t 522elements describing the mapping. 523This array is only valid during the scope of the callback function. 524.It Er EFBIG 525A mapping could not be achieved within the segment constraints provided 526in the tag even though the requested allocation size was less than maxsize. 527.El 528.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \ 529"flags" 530This is a variation of 531.Fn bus_dmamap_load 532which maps mbuf chains 533for DMA transfers. 534A 535.Vt bus_size_t 536argument is also passed to the callback routine, which 537contains the mbuf chain's packet header length. 538.Pp 539Mbuf chains are assumed to be in kernel virtual address space. 540.Pp 541Returns 542.Er EINVAL 543if the size of the mbuf chain exceeds the maximum limit of the 544DMA tag. 545.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags" 546This is a variation of 547.Fn bus_dmamap_load 548which maps buffers pointed to by 549.Fa uio 550for DMA transfers. 551A 552.Vt bus_size_t 553argument is also passed to the callback routine, which contains the size of 554.Fa uio , 555i.e. 556.Fa uio->uio_resid . 557.Pp 558If 559.Fa uio->uio_segflg 560is 561.Dv UIO_USERSPACE , 562then it is assumed that the buffer, 563.Fa uio 564is in 565.Fa "uio->uio_td->td_proc" Ns 's 566address space. 567User space memory must be in-core and wired prior to attempting a map 568load operation. 569.It Fn bus_dmamap_unload "dmat" "map" 570Unloads a DMA map. 571Arguments are as follows: 572.Bl -tag -width dmam -compact 573.It Fa dmat 574DMA tag used to allocate 575.Fa map . 576.It Fa map 577The DMA map that is to be unloaded. 578.El 579.Pp 580.Fn bus_dmamap_unload 581will not perform any implicit synchronization of DMA buffers. 582This must be done explicitly by a call to 583.Fn bus_dmamap_sync 584prior to unloading the map. 585.It Fn bus_dmamap_sync "dmat" "map" "op" 586Performs synchronization of a device visible mapping with the CPU visible 587memory referenced by that mapping. 588Arguments are as follows: 589.Bl -tag -width dmat -compact 590.It Fa dmat 591DMA tag used to allocate 592.Fa map . 593.It Fa map 594The DMA mapping to be synchronized. 595.It Fa op 596Type of synchronization operation to perform. 597See the definition of 598.Vt bus_dmasync_op_t 599for a description of the acceptable values for 600.Fa op . 601.El 602.Pp 603.Fn bus_dmamap_sync 604is the method used to ensure that CPU and device DMA access to shared 605memory is coherent. 606For example, the CPU might be used to setup the contents of a buffer 607that is to be DMA'ed into a device. 608To ensure that the data are visible via the device's mapping of that 609memory, the buffer must be loaded and a dma sync operation of 610.Dv BUS_DMASYNC_PREREAD 611must be performed. 612Additional sync operations must be performed after every CPU write 613to this memory if additional DMA reads are to be performed. 614Conversely, for the DMA write case, the buffer must be loaded, 615and a dma sync operation of 616.Dv BUS_DMASYNC_PREWRITE 617must be performed. 618The CPU will only be able to see the results of this DMA write 619once the DMA has completed and a 620.Dv BUS_DMASYNC_POSTWRITE 621operation has been performed. 622.Pp 623If DMA read and write operations are not preceded and followed by the 624appropriate synchronization operations, behavior is undefined. 625.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "mapp" 626Allocates memory that is mapped into KVA at the address returned 627in 628.Fa vaddr 629that is permanently loaded into the newly created 630.Vt bus_dmamap_t 631returned via 632.Fa mapp . 633Arguments are as follows: 634.Bl -tag -width alignment -compact 635.It Fa dmat 636DMA tag describing the constraints of the DMA mapping. 637.It Fa vaddr 638Pointer to a pointer that will hold the returned KVA mapping of 639the allocated region. 640.It Fa flags 641Flags are defined as follows: 642.Bl -tag -width BUS_DMA_NOWAIT -compact 643.It Dv BUS_DMA_WAITOK 644The routine can safely wait (sleep) for resources. 645.It Dv BUS_DMA_NOWAIT 646The routine is not allowed to wait for resources. 647If resources are not available, 648.Dv ENOMEM 649is returned. 650.It Dv BUS_DMA_COHERENT 651Attempt to map this memory such that cache sync operations are 652as cheap as possible. 653This flag is typically set on memory that will be accessed by both 654a CPU and a DMA engine, frequently. 655Use of this flag does not remove the requirement of using 656bus_dmamap_sync, but it may reduce the cost of performing 657these operations. 658.It Dv BUS_DMA_ZERO 659Causes the allocated memory to be set to all zeros. 660.El 661.It Fa mapp 662Pointer to storage for the returned DMA map. 663.El 664.Pp 665The size of memory to be allocated is 666.Fa maxsize 667as specified in 668.Fa dmat . 669.Pp 670The current implementation of 671.Fn bus_dmamem_alloc 672will allocate all requests as a single segment. 673.Pp 674Although no explicit loading is required to access the memory 675referenced by the returned map, the synchronization requirements 676as described in the 677.Fn bus_dmamap_sync 678section still apply. 679.Pp 680Returns 681.Er ENOMEM 682if sufficient memory is not available for completing 683the operation. 684.It Fn bus_dmamem_free "dmat" "*vaddr" "map" 685Frees memory previously allocated by 686.Fn bus_dmamem_alloc . 687Any mappings 688will be invalidated. 689Arguments are as follows: 690.Bl -tag -width vaddr -compact 691.It Fa dmat 692DMA tag. 693.It Fa vaddr 694Kernel virtual address of the memory. 695.It Fa map 696DMA map to be invalidated. 697.El 698.El 699.Sh RETURN VALUES 700Behavior is undefined if invalid arguments are passed to 701any of the above functions. 702If sufficient resources cannot be allocated for a given 703transaction, 704.Er ENOMEM 705is returned. 706All 707routines that are not of type, 708.Vt void , 709will return 0 on success or an error 710code, as discussed above. 711.Pp 712All 713.Vt void 714routines will succeed if provided with valid arguments. 715.Sh SEE ALSO 716.Xr devclass 9 , 717.Xr device 9 , 718.Xr driver 9 , 719.Xr rman 9 720.Pp 721.Rs 722.%A "Jason R. Thorpe" 723.%T "A Machine-Independent DMA Framework for NetBSD" 724.%J "Proceedings of the Summer 1998 USENIX Technical Conference" 725.%Q "USENIX Association" 726.%D "June 1998" 727.Re 728.Sh HISTORY 729The 730.Nm 731interface first appeared in 732.Nx 1.3 . 733.Pp 734The 735.Nm 736API was adopted from 737.Nx 738for use in the CAM SCSI subsystem. 739The alterations to the original API were aimed to remove the need for 740a 741.Vt bus_dma_segment_t 742array stored in each 743.Vt bus_dmamap_t 744while allowing callers to queue up on scarce resources. 745.Sh AUTHORS 746The 747.Nm 748interface was designed and implemented by 749.An Jason R. Thorpe 750of the Numerical Aerospace Simulation Facility, NASA Ames Research Center. 751Additional input on the 752.Nm 753design was provided by 754.An -nosplit 755.An Chris Demetriou , 756.An Charles Hannum , 757.An Ross Harvey , 758.An Matthew Jacob , 759.An Jonathan Stone , 760and 761.An Matt Thomas . 762.Pp 763The 764.Nm 765interface in 766.Fx 767benefits from the contributions of 768.An Justin T. Gibbs , 769.An Peter Wemm , 770.An Doug Rabson , 771.An Matthew N. Dodd , 772.An Sam Leffler , 773.An Maxime Henrion , 774.An Jake Burkholder , 775.An Takahashi Yoshihiro , 776.An Scott Long 777and many others. 778.Pp 779This manual page was written by 780.An Hiten M. Pandya 781and 782.An Justin T. Gibbs . 783