1.\" Copyright (c) 2002, 2003 Hiten M. Pandya. 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions, and the following disclaimer, 9.\" without modification, immediately at the beginning of the file. 10.\" 2. The name of the author may not be used to endorse or promote products 11.\" derived from this software without specific prior written permission. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR, CONTRIBUTORS OR THE 17.\" VOICES IN HITEN PANDYA'S HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18.\" SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19.\" TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20.\" PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21.\" LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22.\" NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23.\" SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" 25.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 26.\" All rights reserved. 27.\" 28.\" This code is derived from software contributed to The NetBSD Foundation 29.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 30.\" NASA Ames Research Center. 31.\" 32.\" Redistribution and use in source and binary forms, with or without 33.\" modification, are permitted provided that the following conditions 34.\" are met: 35.\" 1. Redistributions of source code must retain the above copyright 36.\" notice, this list of conditions and the following disclaimer. 37.\" 2. Redistributions in binary form must reproduce the above copyright 38.\" notice, this list of conditions and the following disclaimer in the 39.\" documentation and/or other materials provided with the distribution. 40.\" 41.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 42.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 43.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 44.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 45.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 46.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 47.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 48.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 49.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 50.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 51.\" POSSIBILITY OF SUCH DAMAGE. 52.\" 53.\" $FreeBSD$ 54.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $ 55.\" 56.Dd August 11, 2018 57.Dt BUS_DMA 9 58.Os 59.Sh NAME 60.Nm bus_dma , 61.Nm bus_dma_tag_create , 62.Nm bus_dma_tag_destroy , 63.Nm bus_dma_template_init , 64.Nm bus_dma_template_tag , 65.Nm bus_dma_template_clone , 66.Nm bus_dmamap_create , 67.Nm bus_dmamap_destroy , 68.Nm bus_dmamap_load , 69.Nm bus_dmamap_load_bio , 70.Nm bus_dmamap_load_ccb , 71.Nm bus_dmamap_load_mbuf , 72.Nm bus_dmamap_load_mbuf_sg , 73.Nm bus_dmamap_load_uio , 74.Nm bus_dmamap_unload , 75.Nm bus_dmamap_sync , 76.Nm bus_dmamem_alloc , 77.Nm bus_dmamem_free 78.Nd Bus and Machine Independent DMA Mapping Interface 79.Sh SYNOPSIS 80.In machine/bus.h 81.Ft int 82.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \ 83"bus_addr_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 84"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \ 85"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_lock_t *lockfunc" \ 86"void *lockfuncarg" "bus_dma_tag_t *dmat" 87.Ft int 88.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat" 89.Ft void 90.Fo bus_dma_template_init 91.Fa "bus_dma_template_t template" 92.Fa "bus_dma_tag_t parent" 93.Fc 94.Ft int 95.Fo bus_dma_template_tag 96.Fa "bus_dma_template_t template" 97.Fa "bus_dma_tag_t *dmat" 98.Fc 99.Ft void 100.Fo bus_dma_template_clone 101.Fa "bus_dma_template_t template" 102.Fa "bus_dma_tag_t dmat" 103.Fc 104.Ft int 105.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp" 106.Ft int 107.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map" 108.Ft int 109.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \ 110"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 111"int flags" 112.Ft int 113.Fn bus_dmamap_load_bio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 114"struct bio *bio" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 115"int flags" 116.Ft int 117.Fn bus_dmamap_load_ccb "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 118"union ccb *ccb" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 119"int flags" 120.Ft int 121.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 122"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 123"int flags" 124.Ft int 125.Fn bus_dmamap_load_mbuf_sg "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 126"struct mbuf *mbuf" "bus_dma_segment_t *segs" "int *nsegs" "int flags" 127.Ft int 128.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 129"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 130"int flags" 131.Ft void 132.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map" 133.Ft void 134.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 135"op" 136.Ft int 137.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \ 138"int flags" "bus_dmamap_t *mapp" 139.Ft void 140.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \ 141"bus_dmamap_t map" 142.Sh DESCRIPTION 143Direct Memory Access (DMA) is a method of transferring data 144without involving the CPU, thus providing higher performance. 145A DMA transaction can be achieved between device to memory, 146device to device, or memory to memory. 147.Pp 148The 149.Nm 150API is a bus, device, and machine-independent (MI) interface to 151DMA mechanisms. 152It provides the client with flexibility and simplicity by 153abstracting machine dependent issues like setting up 154DMA mappings, handling cache issues, bus specific features 155and limitations. 156.Sh OVERVIEW 157A tag structure 158.Vt ( bus_dma_tag_t ) 159is used to describe the properties of a group of related DMA 160transactions. 161One way to view this is that a tag describes the limitations of a DMA engine. 162For example, if a DMA engine in a device is limited to 32-bit addresses, 163that limitation is specified by a parameter when creating the tag 164for that device. 165Similarly, a tag can be marked as requiring buffers whose addresses are 166aligned to a specific boundary. 167.Pp 168Some devices may require multiple tags to describe DMA 169transactions with differing properties. 170For example, a device might require 16-byte alignment of its descriptor ring 171while permitting arbitrary alignment of I/O buffers. 172In this case, 173the driver must create one tag for the descriptor ring and a separate tag for 174I/O buffers. 175If a device has restrictions that are common to all DMA transactions 176in addition to restrictions that differ between unrelated groups of 177transactions, 178the driver can first create a 179.Dq parent 180tag that decribes the common restrictions. 181The per-group tags can then inherit these restrictions from this 182.Dq parent 183tag rather than having to list them explicitly when creating the per-group tags. 184.Pp 185A mapping structure 186.Vt ( bus_dmamap_t ) 187represents a mapping of a memory region for DMA. 188On systems with I/O MMUs, 189the mapping structure tracks any I/O MMU entries used by a request. 190For DMA requests that require bounce pages, 191the mapping tracks the bounce pages used. 192.Pp 193To prepare for one or more DMA transactions, 194a mapping must be bound to a memory region by calling one of the 195.Fn bus_dmamap_load 196functions. 197These functions configure the mapping which can include programming entries 198in an I/O MMU and/or allocating bounce pages. 199An output of these functions 200(either directly or indirectly by invoking a callback routine) 201is the list of scatter/gather address ranges a consumer can pass to a DMA 202engine to access the memory region. 203When a mapping is no longer needed, 204the mapping must be unloaded via 205.Fn bus_dmamap_unload . 206.Pp 207Before and after each DMA transaction, 208.Fn bus_dmamap_sync 209must be used to ensure that the correct data is used by the DMA engine and 210the CPU. 211If a mapping uses bounce pages, 212the sync operations copy data between the bounce pages and the memory region 213bound to the mapping. 214Sync operations also handle architecture-specific details such as CPU cache 215flushing and CPU memory operation ordering. 216.Sh STATIC VS DYNAMIC 217.Nm 218handles two types of DMA transactions: static and dynamic. 219Static transactions are used with a long-lived memory region that is reused 220for many transactions such as a descriptor ring. 221Dynamic transactions are used for transfers to or from transient buffers 222such as I/O buffers holding a network packet or disk block. 223Each transaction type uses a different subset of the 224.Nm 225API. 226.Ss Static Transactions 227Static transactions use memory regions allocated by 228.Nm . 229Each static memory region is allocated by calling 230.Fn bus_dmamem_alloc . 231This function requires a valid tag describing the properties of the 232DMA transactions to this region such as alignment or address restrictions. 233Multiple regions can share a single tag if they share the same restrictions. 234.Pp 235.Fn bus_dmamem_alloc 236allocates a memory region along with a mapping object. 237The associated tag, memory region, and mapping object must then be passed to 238.Fn bus_dmamap_load 239to bind the mapping to the allocated region and obtain the 240scatter/gather list. 241.Pp 242It is expected that 243.Fn bus_dmamem_alloc 244will attempt to allocate memory requiring less expensive sync operations 245(for example, implementations should not allocate regions requiring bounce 246pages), 247but sync operations should still be used. 248For example, a driver should use 249.Fn bus_dmamap_sync 250in an interrupt handler before reading descriptor ring entries written by the 251device prior to the interrupt. 252.Pp 253When a consumer is finished with a memory region, 254it should unload the mapping via 255.Fn bus_dmamap_unload 256and then release the memory region and mapping object via 257.Fn bus_dmamem_free . 258.Ss Dynamic Transactions 259Dynamic transactions map memory regions provided by other parts of the system. 260A tag must be created via 261.Fn bus_dma_tag_create 262to describe the DMA transactions to and from these memory regions, 263and a pool of mapping objects must be allocated via 264.Fn bus_dmamap_create 265to track the mappings of any in-flight transactions. 266.Pp 267When a consumer wishes to schedule a transaction for a memory region, 268the consumer must first obtain an unused mapping object from its pool 269of mapping objects. 270The memory region must be bound to the mapping object via one of the 271.Fn bus_dmamap_load 272functions. 273Before scheduling the transaction, 274the consumer should sync the memory region via 275.Fn bus_dmamap_sync 276with one or more of the 277.Dq PRE 278flags. 279After the transaction has completed, 280the consumer should sync the memory region via 281.Fn bus_dmamap_sync 282with one or more of the 283.Dq POST 284flags. 285The mapping can then be unloaded via 286.Fn bus_dmamap_unload , 287and the mapping object can be returned to the pool of unused mapping objects. 288.Pp 289When a consumer is no longer scheduling DMA transactions, 290the mapping objects should be freed via 291.Fn bus_dmamap_destroy , 292and the tag should be freed via 293.Fn bus_dma_tag_destroy . 294.Sh STRUCTURES AND TYPES 295.Bl -tag -width indent 296.It Vt bus_dma_tag_t 297A machine-dependent (MD) opaque type that describes the 298characteristics of a group of DMA transactions. 299DMA tags are organized into a hierarchy, with each child 300tag inheriting the restrictions of its parent. 301This allows all devices along the path of DMA transactions 302to contribute to the constraints of those transactions. 303.It Vt bus_dma_template_t 304A template structure for creating a 305.Fa bus_dma_tag_t 306from a set of defaults. 307Once initialized with 308.Fn bus_dma_template_init , 309a driver can over-ride individual fields to suit its needs. 310The following fields have the indicated values: 311.Bd -literal 312 alignment 1 313 boundary 0 314 lowaddr BUS_SPACE_MAXADDR 315 highaddr BUS_SPACE_MAXADDR 316 maxsize BUS_SPACE_MAXSIZE 317 nsegments BUS_SPACE_UNRESTRICTED 318 maxsegsize BUS_SPACE_MAXSIZE 319 flags 0 320 lockfunc NULL 321 lockfuncarg NULL 322.Ed 323.Pp 324Descriptions of each field are documented with 325.Fn bus_dma_tag_create . 326Note that the 327.Fa filtfunc 328and 329.Fa filtfuncarg 330attributes of the DMA tag are not supported with templates. 331.It Vt bus_dma_filter_t 332Client specified address filter having the format: 333.Bl -tag -width indent 334.It Ft int 335.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr" 336.El 337.Pp 338Address filters can be specified during tag creation to allow 339for devices whose DMA address restrictions cannot be specified 340by a single window. 341The 342.Fa filtarg 343argument is specified by the client during tag creation to be passed to all 344invocations of the callback. 345The 346.Fa testaddr 347argument contains a potential starting address of a DMA mapping. 348The filter function operates on the set of addresses from 349.Fa testaddr 350to 351.Ql trunc_page(testaddr) + PAGE_SIZE - 1 , 352inclusive. 353The filter function should return zero if any mapping in this range 354can be accommodated by the device and non-zero otherwise. 355.It Vt bus_dma_segment_t 356A machine-dependent type that describes individual 357DMA segments. 358It contains the following fields: 359.Bd -literal 360 bus_addr_t ds_addr; 361 bus_size_t ds_len; 362.Ed 363.Pp 364The 365.Fa ds_addr 366field contains the device visible address of the DMA segment, and 367.Fa ds_len 368contains the length of the DMA segment. 369Although the DMA segments returned by a mapping call will adhere to 370all restrictions necessary for a successful DMA operation, some conversion 371(e.g.\& a conversion from host byte order to the device's byte order) is 372almost always required when presenting segment information to the device. 373.It Vt bus_dmamap_t 374A machine-dependent opaque type describing an individual mapping. 375One map is used for each memory allocation that will be loaded. 376Maps can be reused once they have been unloaded. 377Multiple maps can be associated with one DMA tag. 378While the value of the map may evaluate to 379.Dv NULL 380on some platforms under certain conditions, 381it should never be assumed that it will be 382.Dv NULL 383in all cases. 384.It Vt bus_dmamap_callback_t 385Client specified callback for receiving mapping information resulting from 386the load of a 387.Vt bus_dmamap_t 388via 389.Fn bus_dmamap_load , 390.Fn bus_dmamap_load_bio 391or 392.Fn bus_dmamap_load_ccb . 393Callbacks are of the format: 394.Bl -tag -width indent 395.It Ft void 396.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \ 397"int nseg" "int error" 398.El 399.Pp 400The 401.Fa callback_arg 402is the callback argument passed to dmamap load functions. 403The 404.Fa segs 405and 406.Fa nseg 407arguments describe an array of 408.Vt bus_dma_segment_t 409structures that represent the mapping. 410This array is only valid within the scope of the callback function. 411The success or failure of the mapping is indicated by the 412.Fa error 413argument. 414More information on the use of callbacks can be found in the 415description of the individual dmamap load functions. 416.It Vt bus_dmamap_callback2_t 417Client specified callback for receiving mapping information resulting from 418the load of a 419.Vt bus_dmamap_t 420via 421.Fn bus_dmamap_load_uio 422or 423.Fn bus_dmamap_load_mbuf . 424.Pp 425Callback2s are of the format: 426.Bl -tag -width indent 427.It Ft void 428.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \ 429"int nseg" "bus_size_t mapsize" "int error" 430.El 431.Pp 432Callback2's behavior is the same as 433.Vt bus_dmamap_callback_t 434with the addition that the length of the data mapped is provided via 435.Fa mapsize . 436.It Vt bus_dmasync_op_t 437Memory synchronization operation specifier. 438Bus DMA requires explicit synchronization of memory with its device 439visible mapping in order to guarantee memory coherency. 440The 441.Vt bus_dmasync_op_t 442allows the type of DMA operation that will be or has been performed 443to be communicated to the system so that the correct coherency measures 444are taken. 445The operations are represented as bitfield flags that can be combined together, 446though it only makes sense to combine PRE flags or POST flags, not both. 447See the 448.Fn bus_dmamap_sync 449description below for more details on how to use these operations. 450.Pp 451All operations specified below are performed from the host memory point of view, 452where a read implies data coming from the device to the host memory, and a write 453implies data going from the host memory to the device. 454Alternatively, the operations can be thought of in terms of driver operations, 455where reading a network packet or storage sector corresponds to a read operation 456in 457.Nm . 458.Bl -tag -width ".Dv BUS_DMASYNC_POSTWRITE" 459.It Dv BUS_DMASYNC_PREREAD 460Perform any synchronization required prior to an update of host memory by the 461device. 462.It Dv BUS_DMASYNC_PREWRITE 463Perform any synchronization required after an update of host memory by the CPU 464and prior to device access to host memory. 465.It Dv BUS_DMASYNC_POSTREAD 466Perform any synchronization required after an update of host memory by the 467device and prior to CPU access to host memory. 468.It Dv BUS_DMASYNC_POSTWRITE 469Perform any synchronization required after device access to host memory. 470.El 471.It Vt bus_dma_lock_t 472Client specified lock/mutex manipulation method. 473This will be called from 474within busdma whenever a client lock needs to be manipulated. 475In its current form, the function will be called immediately before 476the callback for a DMA load operation that has been deferred with 477.Dv BUS_DMA_LOCK 478and immediately after with 479.Dv BUS_DMA_UNLOCK . 480If the load operation does not need to be deferred, then it 481will not be called since the function loading the map should 482be holding the appropriate locks. 483This method is of the format: 484.Bl -tag -width indent 485.It Ft void 486.Fn "lockfunc" "void *lockfunc_arg" "bus_dma_lock_op_t op" 487.El 488.Pp 489The 490.Fa lockfuncarg 491argument is specified by the client during tag creation to be passed to all 492invocations of the callback. 493The 494.Fa op 495argument specifies the lock operation to perform. 496.Pp 497Two 498.Vt lockfunc 499implementations are provided for convenience. 500.Fn busdma_lock_mutex 501performs standard mutex operations on the sleep mutex provided via 502.Fa lockfuncarg . 503.Fn dflt_lock 504will generate a system panic if it is called. 505It is substituted into the tag when 506.Fa lockfunc 507is passed as 508.Dv NULL 509to 510.Fn bus_dma_tag_create 511and is useful for tags that should not be used with deferred load operations. 512.It Vt bus_dma_lock_op_t 513Operations to be performed by the client-specified 514.Fn lockfunc . 515.Bl -tag -width ".Dv BUS_DMA_UNLOCK" 516.It Dv BUS_DMA_LOCK 517Acquires and/or locks the client locking primitive. 518.It Dv BUS_DMA_UNLOCK 519Releases and/or unlocks the client locking primitive. 520.El 521.El 522.Sh FUNCTIONS 523.Bl -tag -width indent 524.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \ 525"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \ 526"flags" "lockfunc" "lockfuncarg" "*dmat" 527Allocates a DMA tag, and initializes it according to 528the arguments provided: 529.Bl -tag -width ".Fa filtfuncarg" 530.It Fa parent 531A parent tag from which to inherit restrictions. 532The restrictions passed in other arguments can only further tighten the 533restrictions inherited from the parent tag. 534.Pp 535All tags created by a device driver must inherit from the tag returned by 536.Fn bus_get_dma_tag 537to honor restrictions between the parent bridge, CPU memory, and the 538device. 539.It Fa alignment 540Alignment constraint, in bytes, of any mappings created using this tag. 541The alignment must be a power of 2. 542Hardware that can DMA starting at any address would specify 543.Em 1 544for byte alignment. 545Hardware requiring DMA transfers to start on a multiple of 4K 546would specify 547.Em 4096 . 548.It Fa boundary 549Boundary constraint, in bytes, of the target DMA memory region. 550The boundary indicates the set of addresses, all multiples of the 551boundary argument, that cannot be crossed by a single 552.Vt bus_dma_segment_t . 553The boundary must be a power of 2 and must be no smaller than the 554maximum segment size. 555.Ql 0 556indicates that there are no boundary restrictions. 557.It Fa lowaddr , highaddr 558Bounds of the window of bus address space that 559.Em cannot 560be directly accessed by the device. 561The window contains all addresses greater than 562.Fa lowaddr 563and less than or equal to 564.Fa highaddr . 565For example, a device incapable of DMA above 4GB, would specify a 566.Fa highaddr 567of 568.Dv BUS_SPACE_MAXADDR 569and a 570.Fa lowaddr 571of 572.Dv BUS_SPACE_MAXADDR_32BIT . 573Similarly a device that can only perform DMA to addresses below 57416MB would specify a 575.Fa highaddr 576of 577.Dv BUS_SPACE_MAXADDR 578and a 579.Fa lowaddr 580of 581.Dv BUS_SPACE_MAXADDR_24BIT . 582Some implementations require that some region of device visible 583address space, overlapping available host memory, be outside the 584window. 585This area of 586.Ql safe memory 587is used to bounce requests that would otherwise conflict with 588the exclusion window. 589.It Fa filtfunc 590Optional filter function (may be 591.Dv NULL ) 592to be called for any attempt to 593map memory into the window described by 594.Fa lowaddr 595and 596.Fa highaddr . 597A filter function is only required when the single window described 598by 599.Fa lowaddr 600and 601.Fa highaddr 602cannot adequately describe the constraints of the device. 603The filter function will be called for every machine page 604that overlaps the exclusion window. 605.It Fa filtfuncarg 606Argument passed to all calls to the filter function for this tag. 607May be 608.Dv NULL . 609.It Fa maxsize 610Maximum size, in bytes, of the sum of all segment lengths in a given 611DMA mapping associated with this tag. 612.It Fa nsegments 613Number of discontinuities (scatter/gather segments) allowed 614in a DMA mapped region. 615If there is no restriction, 616.Dv BUS_SPACE_UNRESTRICTED 617may be specified. 618.It Fa maxsegsz 619Maximum size, in bytes, of a segment in any DMA mapped region associated 620with 621.Fa dmat . 622.It Fa flags 623Are as follows: 624.Bl -tag -width ".Dv BUS_DMA_ALLOCNOW" 625.It Dv BUS_DMA_ALLOCNOW 626Pre-allocate enough resources to handle at least one map load operation on 627this tag. 628If sufficient resources are not available, 629.Er ENOMEM 630is returned. 631This should not be used for tags that only describe buffers that will be 632allocated with 633.Fn bus_dmamem_alloc . 634Also, due to resource sharing with other tags, this flag does not guarantee 635that resources will be allocated or reserved exclusively for this tag. 636It should be treated only as a minor optimization. 637.It Dv BUS_DMA_COHERENT 638Indicate that the DMA engine and CPU are cache-coherent. 639Cached memory may be used to back allocations created by 640.Fn bus_dmamem_alloc . 641For 642.Fn bus_dma_tag_create , 643the 644.Dv BUS_DMA_COHERENT 645flag is currently implemented on arm64. 646.El 647.It Fa lockfunc 648Optional lock manipulation function (may be 649.Dv NULL ) 650to be called when busdma 651needs to manipulate a lock on behalf of the client. 652If 653.Dv NULL 654is specified, 655.Fn dflt_lock 656is used. 657.It Fa lockfuncarg 658Optional argument to be passed to the function specified by 659.Fa lockfunc . 660.It Fa dmat 661Pointer to a bus_dma_tag_t where the resulting DMA tag will 662be stored. 663.El 664.Pp 665Returns 666.Er ENOMEM 667if sufficient memory is not available for tag creation 668or allocating mapping resources. 669.It Fn bus_dma_tag_destroy "dmat" 670Deallocate the DMA tag 671.Fa dmat 672that was created by 673.Fn bus_dma_tag_create . 674.Pp 675Returns 676.Er EBUSY 677if any DMA maps remain associated with 678.Fa dmat 679or 680.Ql 0 681on success. 682.It Fn bus_dma_template_init "*template" "parent" 683Initializes a 684.Fa bus_dma_template_t 685structure and associates it with an optional 686.Fa parent . 687The 688.Fa parent 689argument may be NULL. 690.It Fn bus_dma_template_tag "*template" "*dmat" 691Unpacks a template into a tag, and returns the tag via the 692.Fa dmat . 693All return values are identical to 694.Fn bus_dma_tag_create . 695.It Fn bus_dma_template_clone "*template" "dmat" 696Clones the fields from a tag to a template. 697This is useful for cloning tags when paired with 698.Fn bus_dma_template_tag . 699A template that is filled in as a clone does not need to be initialized 700first. 701.It Fn bus_dmamap_create "dmat" "flags" "*mapp" 702Allocates and initializes a DMA map. 703Arguments are as follows: 704.Bl -tag -width ".Fa nsegments" 705.It Fa dmat 706DMA tag. 707.It Fa flags 708Are as follows: 709.Bl -tag -width ".Dv BUS_DMA_COHERENT" 710.It Dv BUS_DMA_COHERENT 711Attempt to map the memory loaded with this map such that cache sync 712operations are as cheap as possible. 713This flag is typically set on maps when the memory loaded with these will 714be accessed by both a CPU and a DMA engine, frequently such as control data 715and as opposed to streamable data such as receive and transmit buffers. 716Use of this flag does not remove the requirement of using 717.Fn bus_dmamap_sync , 718but it may reduce the cost of performing these operations. 719For 720.Fn bus_dmamap_create , 721the 722.Dv BUS_DMA_COHERENT 723flag is currently implemented on sparc64. 724.El 725.It Fa mapp 726Pointer to a 727.Vt bus_dmamap_t 728where the resulting DMA map will be stored. 729.El 730.Pp 731Returns 732.Er ENOMEM 733if sufficient memory is not available for creating the 734map or allocating mapping resources. 735.It Fn bus_dmamap_destroy "dmat" "map" 736Frees all resources associated with a given DMA map. 737Arguments are as follows: 738.Bl -tag -width ".Fa dmat" 739.It Fa dmat 740DMA tag used to allocate 741.Fa map . 742.It Fa map 743The DMA map to destroy. 744.El 745.Pp 746Returns 747.Er EBUSY 748if a mapping is still active for 749.Fa map . 750.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" \ 751"callback_arg" "flags" 752Creates a mapping in device visible address space of 753.Fa buflen 754bytes of 755.Fa buf , 756associated with the DMA map 757.Fa map . 758This call will always return immediately and will not block for any reason. 759Arguments are as follows: 760.Bl -tag -width ".Fa buflen" 761.It Fa dmat 762DMA tag used to allocate 763.Fa map . 764.It Fa map 765A DMA map without a currently active mapping. 766.It Fa buf 767A kernel virtual address pointer to a contiguous (in KVA) buffer, to be 768mapped into device visible address space. 769.It Fa buflen 770The size of the buffer. 771.It Fa callback Fa callback_arg 772The callback function, and its argument. 773This function is called once sufficient mapping resources are available for 774the DMA operation. 775If resources are temporarily unavailable, this function will be deferred until 776later, but the load operation will still return immediately to the caller. 777Thus, callers should not assume that the callback will be called before the 778load returns, and code should be structured appropriately to handle this. 779See below for specific flags and error codes that control this behavior. 780.It Fa flags 781Are as follows: 782.Bl -tag -width ".Dv BUS_DMA_NOWAIT" 783.It Dv BUS_DMA_NOWAIT 784The load should not be deferred in case of insufficient mapping resources, 785and instead should return immediately with an appropriate error. 786.It Dv BUS_DMA_NOCACHE 787The generated transactions to and from the virtual page are non-cacheable. 788For 789.Fn bus_dmamap_load , 790the 791.Dv BUS_DMA_NOCACHE 792flag is currently implemented on sparc64. 793.El 794.El 795.Pp 796Return values to the caller are as follows: 797.Bl -tag -width ".Er EINPROGRESS" 798.It 0 799The callback has been called and completed. 800The status of the mapping has been delivered to the callback. 801.It Er EINPROGRESS 802The mapping has been deferred for lack of resources. 803The callback will be called as soon as resources are available. 804Callbacks are serviced in FIFO order. 805.Pp 806Note that subsequent load operations for the same tag that do not require 807extra resources will still succeed. 808This may result in out-of-order processing of requests. 809If the caller requires the order of requests to be preserved, 810then the caller is required to stall subsequent requests until a pending 811request's callback is invoked. 812.It Er ENOMEM 813The load request has failed due to insufficient resources, and the caller 814specifically used the 815.Dv BUS_DMA_NOWAIT 816flag. 817.It Er EINVAL 818The load request was invalid. 819The callback has been called and has been provided the same error. 820This error value may indicate that 821.Fa dmat , 822.Fa map , 823.Fa buf , 824or 825.Fa callback 826were invalid, or 827.Fa buflen 828was larger than the 829.Fa maxsize 830argument used to create the dma tag 831.Fa dmat . 832.El 833.Pp 834When the callback is called, it is presented with an error value 835indicating the disposition of the mapping. 836Error may be one of the following: 837.Bl -tag -width ".Er EINPROGRESS" 838.It 0 839The mapping was successful and the 840.Fa dm_segs 841callback argument contains an array of 842.Vt bus_dma_segment_t 843elements describing the mapping. 844This array is only valid during the scope of the callback function. 845.It Er EFBIG 846A mapping could not be achieved within the segment constraints provided 847in the tag even though the requested allocation size was less than maxsize. 848.El 849.It Fn bus_dmamap_load_bio "dmat" "map" "bio" "callback" "callback_arg" "flags" 850This is a variation of 851.Fn bus_dmamap_load 852which maps buffers pointed to by 853.Fa bio 854for DMA transfers. 855.Fa bio 856may point to either a mapped or unmapped buffer. 857.It Fn bus_dmamap_load_ccb "dmat" "map" "ccb" "callback" "callback_arg" "flags" 858This is a variation of 859.Fn bus_dmamap_load 860which maps data pointed to by 861.Fa ccb 862for DMA transfers. 863The data for 864.Fa ccb 865may be any of the following types: 866.Bl -tag -width ".Er CAM_DATA_SG_PADDR" 867.It CAM_DATA_VADDR 868The data is a single KVA buffer. 869.It CAM_DATA_PADDR 870The data is a single bus address range. 871.It CAM_DATA_SG 872The data is a scatter/gather list of KVA buffers. 873.It CAM_DATA_SG_PADDR 874The data is a scatter/gather list of bus address ranges. 875.It CAM_DATA_BIO 876The data is contained in a 877.Vt struct bio 878attached to the CCB. 879.El 880.Pp 881.Fn bus_dmamap_load_ccb 882supports the following CCB XPT function codes: 883.Pp 884.Bl -item -offset indent -compact 885.It 886XPT_ATA_IO 887.It 888XPT_CONT_TARGET_IO 889.It 890XPT_SCSI_IO 891.El 892.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \ 893"flags" 894This is a variation of 895.Fn bus_dmamap_load 896which maps mbuf chains 897for DMA transfers. 898A 899.Vt bus_size_t 900argument is also passed to the callback routine, which 901contains the mbuf chain's packet header length. 902The 903.Dv BUS_DMA_NOWAIT 904flag is implied, thus no callback deferral will happen. 905.Pp 906Mbuf chains are assumed to be in kernel virtual address space. 907.Pp 908Beside the error values listed for 909.Fn bus_dmamap_load , 910.Er EINVAL 911will be returned if the size of the mbuf chain exceeds the maximum limit of the 912DMA tag. 913.It Fn bus_dmamap_load_mbuf_sg "dmat" "map" "mbuf" "segs" "nsegs" "flags" 914This is just like 915.Fn bus_dmamap_load_mbuf 916except that it returns immediately without calling a callback function. 917It is provided for efficiency. 918The scatter/gather segment array 919.Va segs 920is provided by the caller and filled in directly by the function. 921The 922.Va nsegs 923argument is returned with the number of segments filled in. 924Returns the same errors as 925.Fn bus_dmamap_load_mbuf . 926.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags" 927This is a variation of 928.Fn bus_dmamap_load 929which maps buffers pointed to by 930.Fa uio 931for DMA transfers. 932A 933.Vt bus_size_t 934argument is also passed to the callback routine, which contains the size of 935.Fa uio , 936i.e. 937.Fa uio->uio_resid . 938The 939.Dv BUS_DMA_NOWAIT 940flag is implied, thus no callback deferral will happen. 941Returns the same errors as 942.Fn bus_dmamap_load . 943.Pp 944If 945.Fa uio->uio_segflg 946is 947.Dv UIO_USERSPACE , 948then it is assumed that the buffer, 949.Fa uio 950is in 951.Fa "uio->uio_td->td_proc" Ns 's 952address space. 953User space memory must be in-core and wired prior to attempting a map 954load operation. 955Pages may be locked using 956.Xr vslock 9 . 957.It Fn bus_dmamap_unload "dmat" "map" 958Unloads a DMA map. 959Arguments are as follows: 960.Bl -tag -width ".Fa dmam" 961.It Fa dmat 962DMA tag used to allocate 963.Fa map . 964.It Fa map 965The DMA map that is to be unloaded. 966.El 967.Pp 968.Fn bus_dmamap_unload 969will not perform any implicit synchronization of DMA buffers. 970This must be done explicitly by a call to 971.Fn bus_dmamap_sync 972prior to unloading the map. 973.It Fn bus_dmamap_sync "dmat" "map" "op" 974Performs synchronization of a device visible mapping with the CPU visible 975memory referenced by that mapping. 976Arguments are as follows: 977.Bl -tag -width ".Fa dmat" 978.It Fa dmat 979DMA tag used to allocate 980.Fa map . 981.It Fa map 982The DMA mapping to be synchronized. 983.It Fa op 984Type of synchronization operation to perform. 985See the definition of 986.Vt bus_dmasync_op_t 987for a description of the acceptable values for 988.Fa op . 989.El 990.Pp 991The 992.Fn bus_dmamap_sync 993function 994is the method used to ensure that CPU's and device's direct 995memory access (DMA) to shared 996memory is coherent. 997For example, the CPU might be used to set up the contents of a buffer 998that is to be made available to a device. 999To ensure that the data are visible via the device's mapping of that 1000memory, the buffer must be loaded and a DMA sync operation of 1001.Dv BUS_DMASYNC_PREWRITE 1002must be performed after the CPU has updated the buffer and before the device 1003access is initiated. 1004If the CPU modifies this buffer again later, another 1005.Dv BUS_DMASYNC_PREWRITE 1006sync operation must be performed before an additional device 1007access. 1008Conversely, suppose a device updates memory that is to be read by a CPU. 1009In this case, the buffer must be loaded, and a DMA sync operation of 1010.Dv BUS_DMASYNC_PREREAD 1011must be performed before the device access is initiated. 1012The CPU will only be able to see the results of this memory update 1013once the DMA operation has completed and a 1014.Dv BUS_DMASYNC_POSTREAD 1015sync operation has been performed. 1016.Pp 1017If read and write operations are not preceded and followed by the 1018appropriate synchronization operations, behavior is undefined. 1019.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "*mapp" 1020Allocates memory that is mapped into KVA at the address returned 1021in 1022.Fa vaddr 1023and that is permanently loaded into the newly created 1024.Vt bus_dmamap_t 1025returned via 1026.Fa mapp . 1027Arguments are as follows: 1028.Bl -tag -width ".Fa alignment" 1029.It Fa dmat 1030DMA tag describing the constraints of the DMA mapping. 1031.It Fa vaddr 1032Pointer to a pointer that will hold the returned KVA mapping of 1033the allocated region. 1034.It Fa flags 1035Flags are defined as follows: 1036.Bl -tag -width ".Dv BUS_DMA_NOWAIT" 1037.It Dv BUS_DMA_WAITOK 1038The routine can safely wait (sleep) for resources. 1039.It Dv BUS_DMA_NOWAIT 1040The routine is not allowed to wait for resources. 1041If resources are not available, 1042.Dv ENOMEM 1043is returned. 1044.It Dv BUS_DMA_COHERENT 1045Attempt to map this memory in a coherent fashion. 1046See 1047.Fn bus_dmamap_create 1048above for a description of this flag. 1049For 1050.Fn bus_dmamem_alloc , 1051the 1052.Dv BUS_DMA_COHERENT 1053flag is currently implemented on arm, arm64 and sparc64. 1054.It Dv BUS_DMA_ZERO 1055Causes the allocated memory to be set to all zeros. 1056.It Dv BUS_DMA_NOCACHE 1057The allocated memory will not be cached in the processor caches. 1058All memory accesses appear on the bus and are executed 1059without reordering. 1060For 1061.Fn bus_dmamem_alloc , 1062the 1063.Dv BUS_DMA_NOCACHE 1064flag is currently implemented on amd64 and i386 where it results in the 1065Strong Uncacheable PAT to be set for the allocated virtual address range. 1066.El 1067.It Fa mapp 1068Pointer to a 1069.Vt bus_dmamap_t 1070where the resulting DMA map will be stored. 1071.El 1072.Pp 1073The size of memory to be allocated is 1074.Fa maxsize 1075as specified in the call to 1076.Fn bus_dma_tag_create 1077for 1078.Fa dmat . 1079.Pp 1080The current implementation of 1081.Fn bus_dmamem_alloc 1082will allocate all requests as a single segment. 1083.Pp 1084An initial load operation is required to obtain the bus address of the allocated 1085memory, and an unload operation is required before freeing the memory, as 1086described below in 1087.Fn bus_dmamem_free . 1088Maps are automatically handled by this function and should not be explicitly 1089allocated or destroyed. 1090.Pp 1091Although an explicit load is not required for each access to the memory 1092referenced by the returned map, the synchronization requirements 1093as described in the 1094.Fn bus_dmamap_sync 1095section still apply and should be used to achieve portability on architectures 1096without coherent buses. 1097.Pp 1098Returns 1099.Er ENOMEM 1100if sufficient memory is not available for completing 1101the operation. 1102.It Fn bus_dmamem_free "dmat" "*vaddr" "map" 1103Frees memory previously allocated by 1104.Fn bus_dmamem_alloc . 1105Any mappings 1106will be invalidated. 1107Arguments are as follows: 1108.Bl -tag -width ".Fa vaddr" 1109.It Fa dmat 1110DMA tag. 1111.It Fa vaddr 1112Kernel virtual address of the memory. 1113.It Fa map 1114DMA map to be invalidated. 1115.El 1116.El 1117.Sh RETURN VALUES 1118Behavior is undefined if invalid arguments are passed to 1119any of the above functions. 1120If sufficient resources cannot be allocated for a given 1121transaction, 1122.Er ENOMEM 1123is returned. 1124All 1125routines that are not of type 1126.Vt void 1127will return 0 on success or an error 1128code on failure as discussed above. 1129.Pp 1130All 1131.Vt void 1132routines will succeed if provided with valid arguments. 1133.Sh LOCKING 1134Two locking protocols are used by 1135.Nm . 1136The first is a private global lock that is used to synchronize access to the 1137bounce buffer pool on the architectures that make use of them. 1138This lock is strictly a leaf lock that is only used internally to 1139.Nm 1140and is not exposed to clients of the API. 1141.Pp 1142The second protocol involves protecting various resources stored in the tag. 1143Since almost all 1144.Nm 1145operations are done through requests from the driver that created the tag, 1146the most efficient way to protect the tag resources is through the lock that 1147the driver uses. 1148In cases where 1149.Nm 1150acts on its own without being called by the driver, the lock primitive 1151specified in the tag is acquired and released automatically. 1152An example of this is when the 1153.Fn bus_dmamap_load 1154callback function is called from a deferred context instead of the driver 1155context. 1156This means that certain 1157.Nm 1158functions must always be called with the same lock held that is specified in the 1159tag. 1160These functions include: 1161.Pp 1162.Bl -item -offset indent -compact 1163.It 1164.Fn bus_dmamap_load 1165.It 1166.Fn bus_dmamap_load_bio 1167.It 1168.Fn bus_dmamap_load_ccb 1169.It 1170.Fn bus_dmamap_load_mbuf 1171.It 1172.Fn bus_dmamap_load_mbuf_sg 1173.It 1174.Fn bus_dmamap_load_uio 1175.It 1176.Fn bus_dmamap_unload 1177.It 1178.Fn bus_dmamap_sync 1179.El 1180.Pp 1181There is one exception to this rule. 1182It is common practice to call some of these functions during driver start-up 1183without any locks held. 1184So long as there is a guarantee of no possible concurrent use of the tag by 1185different threads during this operation, it is safe to not hold a lock for 1186these functions. 1187.Pp 1188Certain 1189.Nm 1190operations should not be called with the driver lock held, either because 1191they are already protected by an internal lock, or because they might sleep 1192due to memory or resource allocation. 1193The following functions must not be 1194called with any non-sleepable locks held: 1195.Pp 1196.Bl -item -offset indent -compact 1197.It 1198.Fn bus_dma_tag_create 1199.It 1200.Fn bus_dmamap_create 1201.It 1202.Fn bus_dmamem_alloc 1203.El 1204.Pp 1205All other functions do not have a locking protocol and can thus be 1206called with or without any system or driver locks held. 1207.Sh SEE ALSO 1208.Xr devclass 9 , 1209.Xr device 9 , 1210.Xr driver 9 , 1211.Xr rman 9 , 1212.Xr vslock 9 1213.Pp 1214.Rs 1215.%A "Jason R. Thorpe" 1216.%T "A Machine-Independent DMA Framework for NetBSD" 1217.%J "Proceedings of the Summer 1998 USENIX Technical Conference" 1218.%Q "USENIX Association" 1219.%D "June 1998" 1220.Re 1221.Sh HISTORY 1222The 1223.Nm 1224interface first appeared in 1225.Nx 1.3 . 1226.Pp 1227The 1228.Nm 1229API was adopted from 1230.Nx 1231for use in the CAM SCSI subsystem. 1232The alterations to the original API were aimed to remove the need for 1233a 1234.Vt bus_dma_segment_t 1235array stored in each 1236.Vt bus_dmamap_t 1237while allowing callers to queue up on scarce resources. 1238.Sh AUTHORS 1239The 1240.Nm 1241interface was designed and implemented by 1242.An Jason R. Thorpe 1243of the Numerical Aerospace Simulation Facility, NASA Ames Research Center. 1244Additional input on the 1245.Nm 1246design was provided by 1247.An -nosplit 1248.An Chris Demetriou , 1249.An Charles Hannum , 1250.An Ross Harvey , 1251.An Matthew Jacob , 1252.An Jonathan Stone , 1253and 1254.An Matt Thomas . 1255.Pp 1256The 1257.Nm 1258interface in 1259.Fx 1260benefits from the contributions of 1261.An Justin T. Gibbs , 1262.An Peter Wemm , 1263.An Doug Rabson , 1264.An Matthew N. Dodd , 1265.An Sam Leffler , 1266.An Maxime Henrion , 1267.An Jake Burkholder , 1268.An Takahashi Yoshihiro , 1269.An Scott Long 1270and many others. 1271.Pp 1272This manual page was written by 1273.An Hiten M. Pandya 1274and 1275.An Justin T. Gibbs . 1276