1.\" Copyright (c) 2002, 2003 Hiten M. Pandya. 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions, and the following disclaimer, 9.\" without modification, immediately at the beginning of the file. 10.\" 2. The name of the author may not be used to endorse or promote products 11.\" derived from this software without specific prior written permission. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR, CONTRIBUTORS OR THE 17.\" VOICES IN HITEN PANDYA'S HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18.\" SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19.\" TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20.\" PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21.\" LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22.\" NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23.\" SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" 25.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 26.\" All rights reserved. 27.\" 28.\" This code is derived from software contributed to The NetBSD Foundation 29.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 30.\" NASA Ames Research Center. 31.\" 32.\" Redistribution and use in source and binary forms, with or without 33.\" modification, are permitted provided that the following conditions 34.\" are met: 35.\" 1. Redistributions of source code must retain the above copyright 36.\" notice, this list of conditions and the following disclaimer. 37.\" 2. Redistributions in binary form must reproduce the above copyright 38.\" notice, this list of conditions and the following disclaimer in the 39.\" documentation and/or other materials provided with the distribution. 40.\" 3. All advertising materials mentioning features or use of this software 41.\" must display the following acknowledgment: 42.\" This product includes software developed by the NetBSD 43.\" Foundation, Inc. and its contributors. 44.\" 4. Neither the name of The NetBSD Foundation nor the names of its 45.\" contributors may be used to endorse or promote products derived 46.\" from this software without specific prior written permission. 47.\" 48.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 49.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 50.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 51.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 52.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 53.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 54.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 55.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 56.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 57.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 58.\" POSSIBILITY OF SUCH DAMAGE. 59.\" 60.\" $FreeBSD$ 61.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $ 62.\" 63.Dd May 28, 2003 64.Dt BUS_DMA 9 65.Os 66.Sh NAME 67.Nm bus_dma , 68.Nm bus_dma_tag_create , 69.Nm bus_dma_tag_destroy , 70.Nm bus_dmamap_create , 71.Nm bus_dmamap_destroy , 72.Nm bus_dmamap_load , 73.Nm bus_dmamap_load_mbuf , 74.Nm bus_dmamap_load_uio , 75.Nm bus_dmamap_unload , 76.Nm bus_dmamap_sync , 77.Nm bus_dmamem_alloc , 78.Nm bus_dmamem_free , 79.Nd Bus and Machine Independent DMA Mapping Interface 80.Sh SYNOPSIS 81.In machine/bus.h 82.Ft int 83.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \ 84"bus_size_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 85"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \ 86"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_tag_t *dmat" 87.Ft int 88.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat" 89.Ft int 90.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp" 91.Ft int 92.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map" 93.Ft int 94.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \ 95"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 96"int flags" 97.Ft int 98.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 99"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 100"int flags" 101.Ft int 102.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 103"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 104"int flags" 105.Ft int 106.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \ 107"int flags" "bus_dmamap_t *mapp" 108.Ft void 109.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map" 110.Ft void 111.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 112"op" 113.Ft void 114.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \ 115"bus_dmamap_t map" 116.Sh DESCRIPTION 117Direct Memory Access (DMA) is a method of transferring data 118without involving the CPU, thus providing higher performance. 119A DMA transaction can be achieved between device to memory, 120device to device, or memory to memory. 121.Pp 122The 123.Nm 124API is a bus, device, and machine-independent (MI) interface to 125DMA mechanisms. 126It provides the client with flexibility and simplicity by 127abstracting machine dependent issues like setting up 128DMA mappings, handling cache issues, bus specific features 129and limitations. 130.Sh STRUCTURES AND TYPES 131.Bl -tag -width compact 132.It Vt bus_dma_tag_t 133A machine-dependent (MD) opaque type that describes the 134characteristics of DMA transactions. 135DMA tags are organized into a hierarchy, with each child 136tag inheriting the restrictions of its parent. 137This allows all devices along the path of DMA transactions 138to contribute to the constraints of those transactions. 139.It Vt bus_dma_filter_t 140Client specified address filter having the format: 141.Bl -tag -width compact 142.It Ft int 143.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr" 144.El 145.sp 146Address filters can be specified during tag creation to allow 147for devices who's DMA address restrictions cannot be specified 148by a single window. 149The 150.Fa filtarg 151is client specified during tag creation to be passed to all 152invocations of the callback. 153The 154.Fa testaddr 155argument contains a potential starting address of a DMA mapping. 156The filter function operates on the set of addresses from 157.Fa testaddr 158to 159.Ql trunc_page(testaddr) + PAGE_SIZE - 1 , 160inclusive. 161The filter function should return zero for any mapping in this range 162that can be accommodated by the device and non-zero otherwise. 163.It Vt bus_dma_segment_t 164A machine-dependent type that describes individual 165DMA segments. 166.Bd -literal 167 bus_addr_t ds_addr; 168 bus_size_t ds_len; 169.Ed 170.sp 171The 172.Fa ds_addr 173field contains the device visible address of the DMA segment, and 174.Fa ds_len 175contains the length of the DMA segment. 176Although the DMA segments returned by a mapping call will adhere to 177all restrictions necessary for a successful DMA operation, some conversion 178(e.g. a conversion from host byte order to the device's byte order) is 179almost always required when presenting segment information to the device. 180.It Vt bus_dmamap_t 181A machine-dependent opaque type describing an individual mapping. 182Multiple DMA maps can be associated with one DMA tag. 183.It Vt bus_dmamap_callback_t 184Client specified callback for receiving mapping information resulting from 185the load of a 186.Vt bus_dmamap_t 187via 188.Fn bus_dmamap_load . 189Callbacks are of the format: 190.Bl -tag -width compact 191.It Ft void 192.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \ 193"int nseg" "int error" 194.El 195.sp 196The 197.Fa callback_arg 198is the callback argument passed to dmamap load functions. 199The 200.Fa segs 201and 202.Fa nseg 203parameters describe an array of 204.Vt bus_dma_segment_t 205structures that represent the mapping. 206This array is only valid within the scope of the callback function. 207The success or failure of the mapping is indicated by the 208.Fa error 209parameter. 210More information on the use of callbacks can be found in the 211description of the individual dmamap load functions. 212.It Vt bus_dmamap_callback2_t 213Client specified callback for receiving mapping information resulting from 214the load of a 215.Vt bus_dmamap_t 216via 217.Fn bus_dmamap_load_uio 218or 219.Fn bus_dmamap_load_mbuf . 220.sp 221Callback2s are of the format: 222.Bl -tag -width compact 223.It Ft void 224.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \ 225"int nseg" "bus_size_t mapsize" "int error" 226.El 227.sp 228Callback2's behavior is the same as 229.Vt bus_dmamap_callback_t 230with the addition that the length of the data mapped is provided via 231.Fa mapsize . 232.It Vt bus_dmasync_op_t 233Memory synchronization operation specifier. 234Bus DMA requires explicit synchronization of memory with it's device 235visible mapping in order to guarantee memory coherency. 236The 237.Vt bus_dmasync_op_t 238allows the type of DMA operation that will be or has been performed 239to be communicated to the system so that the correct coherency measures 240are taken. 241All operations specified below are performed from the DMA engine's 242point of view: 243.Bl -tag -width BUS_DMASYNC_POSTWRITE 244.It Dv BUS_DMASYNC_PREREAD 245Perform any synchronization required after an update of memory by the CPU 246but prior to DMA read operations. 247.It Dv BUS_DMASYNC_PREWRITE 248Perform any synchronization required after an update of memory by the CPU 249but prior to DMA write operations. 250.It Dv BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE 251Perform any synchronization required prior to a combination of DMA read 252and write operations. 253.It Dv BUS_DMASYNC_POSTREAD 254Perform any synchronization required after DMA read operations, but prior 255to CPU access of the memory. 256.It Dv BUS_DMASYNC_POSTWRITE 257Perform any synchronization required after DMA write operations, but prior 258to CPU access of the memory. 259.It Dv BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE 260Perform any synchronization required after a combination of DMA read 261and write operations. 262.El 263.El 264.Sh FUNCTIONS 265.Bl -tag -width compact 266.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \ 267"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \ 268"flags" "*dmat" 269Allocates a device specific DMA tag, and initializes it according to 270the arguments provided: 271.Bl -tag -width *filtfuncarg -compact 272.It Fa parent 273Indicates restrictions between the parent bridge, CPU memory, and the 274device. 275May be NULL, if no DMA restrictions are to be inherited. 276.It Fa alignment 277Alignment constraint, in bytes, of any mappings created using this tag. 278The alignment must be a power of 2. 279Hardware that can DMA starting at any address would specify 280.Em 1 281for byte alignment. 282Hardware requiring DMA transfers to start on a multiple of 4K 283would specify 284.Em 4096. 285.It Fa boundary 286Boundary constraint, in bytes, of the target DMA memory region. 287The boundary indicates the set of addresses, all multiples of the 288boundary argument, that cannot be crossed by a single 289.Vt bus_dma_segment_t . 290The boundary must be either a power of 2 or 0. 291.Ql 0 292indicates that there are no boundary restrictions. 293.It Fa lowaddr 294.It Fa highaddr 295Bounds of the window of bus address space that 296.Em cannot 297be directly accessed by the device. 298The window contains all address greater than lowaddr and 299less than or equal to highaddr. 300For example, a device incapable of DMA above 4GB, would specify 301a highaddr of 302.Dv BUS_SPACE_MAXADDR 303and a lowaddr of 304.Dv BUS_SPACE_MAXADDR_32BIT . 305Similarly a device that can only dma to addresses bellow 16MB would 306specify a highaddr of 307.Dv BUS_SPACE_MAXADDR 308and a lowaddr of 309.Dv BUS_SPACE_MAXADDR_24BIT . 310Some implementations requires that some region of device visible 311address space, overlapping available host memory, be outside the 312window. 313This area of 314.Ql safe memory 315is used to bounce requests that would otherwise conflict with 316the exclusion window. 317.It Fa filtfunc 318Optional filter function (may be NULL) to be called for any attempt to 319map memory into the window described by 320.Fa lowaddr 321and 322.Fa highaddr. 323A filter function is only required when the single window described 324by 325.Fa lowaddr 326and 327.Fa highaddr 328cannot adequately describe the constraints of the device. 329The filter function will be called for every machine page 330that overlaps the exclusion window. 331.It Fa filtfuncarg 332Argument passed to all calls to the filter function for this tag. 333May be NULL. 334.It Fa maxsegsz 335Maximum size, in bytes, of a segment in any DMA mapped region associated 336with 337.Fa dmat . 338.It Fa maxsize 339Maximum size, in bytes, of the sum of all segment lengths in a given 340DMA mapping associated with this tag. 341.It Fa nsegments 342Number of discontinuities (scatter/gather segments) allowed 343in a DMA mapped region. 344If there is no restriction, 345.Dv BUS_SPACE_UNRESTRICTED 346may be specified. 347.It Fa flags 348Are as follows: 349.Bl -tag -width "BUS_DMA_ALLOCNOW" -compact 350.It Dv BUS_DMA_ALLOCNOW 351Allocate the resources necessary to guarantee that all map load 352operations associated with this tag will not block. 353If sufficient resources are not available, 354.Er ENOMEM 355is returned. 356.El 357.It Fa dmat 358Pointer to a bus_dma_tag_t where the resulting DMA tag will 359be stored. 360.El 361.Pp 362Returns 363.Er ENOMEM 364if sufficient memory is not available for tag creation 365or allocating mapping resources. 366.It Fn bus_dma_tag_destroy "dmat" 367Deallocate the DMA tag 368.Fa dmat 369that was created by 370.Fn bus_dma_tag_create . 371.Pp 372Returns 373.Er EBUSY 374if any DMA maps remain associated with 375.Fa dmat 376or 377.Ql 0 378on success. 379.It Fn bus_dmamap_create "dmat" "flags" "*mapp" 380Allocates and initializes a DMA map. 381Arguments are as follows: 382.Bl -tag -width nsegments -compact 383.It Fa dmat 384DMA tag. 385.It Fa flags 386The value of this argument is currently undefined and should be 387specified as 388.Ql 0 . 389.It Fa mapp 390Pointer to a 391.Vt bus_dmamap_t 392where the resulting DMA map will be stored. 393.El 394.Pp 395Returns 396.Er ENOMEM 397if sufficient memory is not available for creating the 398map or allocating mapping resources. 399.It Fn bus_dmamap_destroy "dmat" "map" 400Frees all resources associated with a given DMA map. 401Arguments are as follows: 402.Bl -tag -width dmat -compact 403.It Fa dmat 404DMA tag used to allocate 405.Fa map . 406.It Fa map 407The DMA map to destroy. 408.El 409.Pp 410Returns 411.Er EBUSY 412if a mapping is still active for 413.Fa map . 414.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" "..." 415Creates a mapping in device visible address space of 416.Fa buflen 417bytes of 418.Fa buf , 419associated with the DMA map 420.Fa map. 421Arguments are as follows: 422.Bl -tag -width buflen -compact 423.It Fa dmat 424DMA tag used to allocate 425.Fa map. 426.It Fa map 427A DMA map without a currently active mapping. 428.It Fa buf 429A kernel virtual address pointer to a contiguous (in KVA) buffer, to be 430mapped into device visible address space. 431.It Fa buflen 432The size of the buffer. 433.It Fa callback Fa callback_arg 434The callback function, and its argument. 435.It Fa flags 436The value of this argument is currently undefined, and should be 437specified as 438.Ql 0 . 439.El 440.Pp 441Return values to the caller are as follows: 442.Bl -tag -width EINPROGRESS -compact 443.It 0 444The callback has been called and completed. 445The status of the mapping has been delivered to the callback. 446.It Er EINPROGRESS 447The mapping has been deferred for lack of resources. 448The callback will be called as soon as resources are available. 449Callbacks are serviced in FIFO order. 450DMA maps created from DMA tags that are allocated with 451the 452.Dv BUS_DMA_ALLOCNOW 453flag will never return this status for a load operation. 454.It Er EINVAL 455The load request was invalid. 456The callback has not, and will not be called. 457This error value may indicate that 458.Fa dmat , 459.Fa map , 460.Fa buf , 461or 462.Fa callback 463were invalid, or 464.Fa buslen 465was larger than the 466.Fa maxsize 467argument used to create the dma tag 468.Fa dmat . 469.El 470.Pp 471When the callback is called, it is presented with an error value 472indicating the disposition of the mapping. 473Error may be one of the following: 474.Bl -tag -width EINPROGRESS -compact 475.It 0 476The mapping was successful and the 477.Fa dm_segs 478callback argument contains an array of 479.Vt bus_dma_segment_t 480elements describing the mapping. 481This array is only valid during the scope of the callback function. 482.It Er EFBIG 483A mapping could not be achieved within the segment constraints provided 484in the tag even though the requested allocation size was less than maxsize. 485.El 486.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \ 487"flags" 488This is a variation of 489.Fn bus_dmamap_load 490which maps mbuf chains 491for DMA transfers. 492A 493.Vt bus_size_t 494argument is also passed to the callback routine, which 495contains the mbuf chain's packet header length. 496.Pp 497Mbuf chains are assumed to be in kernel virtual address space. 498.Pp 499Returns 500.Er EINVAL 501if the size of the mbuf chain exceeds the maximum limit of the 502DMA tag. 503.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags" 504This is a variation of 505.Fn bus_dmamap_load 506which maps buffers pointed to by 507.Fa uio 508for DMA transfers. 509A 510.Vt bus_size_t 511argument is also passed to the callback routine, which contains the size of 512.Fa uio , 513i.e. 514.Fa uio->uio_resid . 515.Pp 516If 517.Fa uio->uio_segflg 518is 519.Dv UIO_USERSPACE , 520then it is assumed that the buffer, 521.Fa uio 522is in 523.Fa "uio->uio_td->td_proc" Ns 's 524address space. 525User space memory must be in-core and wired prior to attempting a map 526load operation. 527.It Fn bus_dmamap_unload "dmat" "map" 528Unloads a DMA map. 529Arguments are as follows: 530.Bl -tag -width dmam -compact 531.It Fa dmat 532DMA tag used to allocate 533.Fa map . 534.It Fa map 535The DMA map that is to be unloaded. 536.El 537.Pp 538.Fn bus_dmamap_unload 539will not perform any implicit synchronization of DMA buffers. 540This must be done explicitly by a call to 541.Fn bus_dmamap_sync 542prior to unloading the map. 543.It Fn bus_dmamap_sync "dmat" "map" "op" 544Performs synchronization of a device visible mapping with the CPU visible 545memory referenced by that mapping. 546Arguments are as follows: 547.Bl -tag -width dmat -compact 548.It Fa dmat 549DMA tag used to allocate 550.Fa map . 551.It Fa map 552The DMA mapping to be synchronized. 553.It Fa op 554Type of synchronization operation to perform. 555See the definition of 556.Vt bus_dmasync_op_t 557for a description of the acceptable values for 558.Fa op . 559.El 560.Pp 561.Fn bus_dmamap_sync 562is the method used to ensure that CPU and device DMA access to shared 563memory is coherent. 564For example, the CPU might be used to setup the contents of a buffer 565that is to be DMA'ed into a device. 566To ensure that the data are visible via the device's mapping of that 567memory, the buffer must be loaded and a dma sync operation of 568.Dv BUS_DMASYNC_PREREAD 569must be performed. 570Additional sync operations must be performed after every CPU write 571to this memory if additional DMA reads are to be performed. 572Conversely, for the DMA write case, the buffer must be loaded, 573and a dma sync operation of 574.Dv BUS_DMASYNC_PREWRITE 575must be performed. 576The CPU will only be able to see the results of this DMA write 577once the DMA has completed and a 578.Dv BUS_DMASYNC_POSTWRITE 579operation has been performed. 580.Pp 581If DMA read and write operations are not preceded and followed by the 582appropriate synchronization operations, behavior is undefined. 583.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "mapp" 584Allocates memory that is mapped into KVA at the address returned 585in 586.Fa vaddr 587that is permanently loaded into the newly created 588.Vt bus_dmamap_t 589returned via 590.Fa mapp . 591Arguments are as follows: 592.Bl -tag -width alignment -compact 593.It Fa dmat 594DMA tag describing the constraints of the DMA mapping. 595.It Fa vaddr 596Pointer to a pointer that will hold the returned KVA mapping of 597the allocated region. 598.It Fa flags 599Flags are defined as follows: 600.Bl -tag -width BUS_DMA_NOWAIT -compact 601.It Dv BUS_DMA_WAITOK 602The routine can safely wait (sleep) for resources. 603.It Dv BUS_DMA_NOWAIT 604The routine is not allowed to wait for resources. 605If resources are not available, 606.Dv ENOMEM 607is returned. 608.It Dv BUS_DMA_COHERENT 609Attempt to map this memory such that cache sync operations are 610as cheap as possible. 611This flag is typically set on memory that will be accessed by both 612a CPU and a DMA engine, frequently. 613Use of this flag does not remove the requirement of using 614bus_dmamap_sync, but it may reduce the cost of performing 615these operations. 616.El 617.It Fa mapp 618Pointer to storage for the returned DMA map. 619.El 620.Pp 621The size of memory to be allocated is 622.Fa maxsize 623as specified in 624.Fa dmat . 625.Pp 626The current implementation of 627.Fn bus_dmamem_alloc 628will allocate all requests as a single segment. 629.Pp 630Although no explicit loading is required to access the memory 631referenced by the returned map, the synchronization requirements 632as described in the 633.Fn bus_dmamap_sync 634section still apply. 635.Pp 636Returns 637.Er ENOMEM 638if sufficient memory is not available for completing 639the operation. 640.It Fn bus_dmamem_free "dmat" "*vaddr" "map" 641Frees memory previously allocated by 642.Fn bus_dmamem_alloc . 643Any mappings 644will be invalidated. 645Arguments are as follows: 646.Bl -tag -width vaddr -compact 647.It Fa dmat 648DMA tag. 649.It Fa vaddr 650Kernel virtual address of the memory. 651.It Fa map 652DMA map to be invalidated. 653.El 654.El 655.Sh RETURN VALUES 656Behavior is undefined if invalid arguments are passed to 657any of the above functions. 658If sufficient resources cannot be allocated for a given 659transaction, 660.Er ENOMEM 661is returned. 662All 663routines that are not of type, 664.Vt void , 665will return 0 on success or an error 666code, as discussed above. 667.Pp 668All 669.Vt void 670routines will succeed if provided with valid arguments. 671.Sh SEE ALSO 672.Xr devclass 9 , 673.Xr device 9 , 674.Xr driver 9 , 675.Xr rman 9 676.Pp 677.Rs 678.%A "Jason R. Thorpe" 679.%T "A Machine-Independent DMA Framework for NetBSD" 680.%J "Proceedings of the Summer 1998 USENIX Technical Conference" 681.%Q "USENIX Association" 682.%D "June 1998" 683.Re 684.Sh HISTORY 685The 686.Nm 687interface first appeared in 688.Nx 1.3 . 689.Pp 690The 691.Nm 692API was adopted from 693.Nx 694for use in the CAM SCSI subsystem. 695The alterations to the original API were aimed to remove the need for 696a 697.Vt bus_dma_segment_t 698array stored in each 699.Vt bus_dmamap_t 700while allowing callers to queue up on scarce resources. 701.Sh AUTHORS 702The 703.Nm 704interface was designed and implemented by Jason R. Thorpe of the 705Numerical Aerospace Simulation Facility, NASA Ames Research Center. 706Additional input on the 707.Nm 708design was provided by Chris Demetriou, Charles Hannum, Ross Harvey, 709Matthew Jacob, Jonathan Stone, and Matt Thomas. 710.Pp 711The 712.Nm 713interface in 714.Fx 715benefits from the contributions of Justin T. Gibbs, 716Peter Wemm, Doug Rabson, Matthew N. Dodd, Sam Leffler, 717Maxime Henrion, Jake Burkholder, Takahashi Yoshihiro, 718Scott Long and many others. 719.Pp 720This manual page was written by Hiten M. Pandya and Justin T. Gibbs. 721