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24.\" $FreeBSD$ 25.\" 26.Dd October 27, 2000 27.Os 28.Dt ATOMIC 9 29.Sh NAME 30.Nm atomic_add , 31.Nm atomic_clear , 32.Nm atomic_cmpset , 33.Nm atomic_load , 34.Nm atomic_readandclear , 35.Nm atomic_set , 36.Nm atomic_subtract , 37.Nm atomic_store 38.Nd atomic operations 39.Sh SYNOPSIS 40.Fd #include <machine/atomic.h> 41.Ft void 42.Fn atomic_add{acq_,rel_,}_<type> "volatile <type> *p" "<type> v" 43.Ft void 44.Fn atomic_clear{acq_,rel_,}_<type> "volatile <type> *p" "<type> v" 45.Ft int 46.Fo atomic_cmpset{acq_,rel_,}_<type> 47.Fa "volatile <type> *dst" 48.Fa "<type> old" 49.Fa "<type> new" 50.Fc 51.Ft <type> 52.Fn atomic_load_acq_<type> "volatile <type> *p" 53.Ft <type> 54.Fn atomic_readandclear_<type> "volatile <type> *p" 55.Ft void 56.Fn atomic_set{acq_,rel_,}_<type> "volatile <type> *p" "<type> v" 57.Ft void 58.Fn atomic_subtract{acq_,rel_},_<type> "volatile <type> *p" "<type> v" 59.Ft void 60.Fn atomic_store_rel_<type> "volatile <type> *p" "<type> v" 61.Sh DESCRIPTION 62Each of the atomic operations is guaranteed to be atomic in the presence of 63interrupts. 64They can be used to implement reference counts or as building blocks for more 65advanced synchronization primitives such as mutexes. 66.Ss Types 67Each atomic operation operates on a specific type. 68The type to use is indicated in the function name. 69The available types that can be used are: 70.Bl -tag -offset indent -width short 71.It char 72unsigned character 73.It short 74unsigned short integer 75.It int 76unsigned integer 77.It long 78unsigned long integer 79.It ptr 80unsigned integer the size of a pointer 81.It 8 82unsigned 8-bit integer 83.It 16 84unsigned 16-bit integer 85.It 32 86unsigned 32-bit integer 87.It 64 88unsigned 64-bit integer 89.El 90.Pp 91For example, the function to atomically add two integers is called 92.Fn atomic_add_int . 93.Ss Memory Barriers 94Memory barriers are used to guarantee the order the order of data accesses in 95two ways. 96First, they specify hints to the compiler to not re-order or optimize the 97operations. 98Secondly, on architectures that do not guarantee ordered data accesses, 99special instructions or special variants of instructions are used to indicate 100to the processor that data accesses need to occur in a certain order. 101As a result, most of the atomic operations have three variants in order to 102include optional memory barriers. 103The first form just performs the operation without any explicit barriers. 104The second form uses a read memory barrier, and the final variant uses a write 105memory barrier. 106.Pp 107The second variant of each operation includes a read memory barrier. 108This barrier ensures that the effects of this operation are completed before the 109effects of any later data accesses. 110As a result, the operation is said to have acquire semantics as it acquires a 111pseudo-lock requiring further operations to wait until it has completed. 112To denote this, the suffix 113.Dq _acq 114is inserted into the function name immediately prior to the 115.Em _type 116suffix. 117For example, to subtract two integers ensuring that any later writes will 118happen after the subtraction is performed, use 119.Fn atomic_subtract_acq_int . 120.Pp 121The third variant of each operation includes a write memory barrier. 122This ensures that all effects of all previous data accesses are completed 123before this operation takes place. 124As a result, the operation is said to have release semantics as it releases 125any pending data accesses to be completed before its operation is performed. 126To denote this, the suffix 127.Dq _rel 128is inserted into the function name immediately prior to the 129.Em _type 130suffix. 131For example, to add two long integers ensuring that all previous 132writes will happen first, use 133.Fn atomic_add_rel_long . 134.Pp 135A practical example of using memory barriers is to ensure that data accesses 136that are protected by a lock are all performed while the lock is held. 137To achieve this, one would use a read barrier when acquiring the lock to 138guarantee that the lock is held before any protected operations are performed. 139Finally, one would use a write barrier when releasing the lock to ensure that 140all of the protected operations are completed before the lock is released. 141.Pp 142.Ss Multiple Processors 143The current set of atomic operations do not necessarily guarantee atomicity 144across multiple processors. 145To guarantee atomicity across processors, not only does the individual 146operation need to be atomic on the processor performing the operation, but the 147the result of the operation needs to be pushed out to stable storage and the 148caches of all other processors on the system need to invalidate any cache 149lines that include the affected memory region. 150On the 151.Tn i386 152architecture, the cache coherency model requires that the hardware perform 153this task, thus the atomic operations are atomic across multiple processors. 154On the 155.Tn ia64 156architecture, coherency is only guaranteed for pages that are configured to 157using a caching policy of either uncached or write back. 158.Ss Semantics 159This section describes the semantics of each operation using a C like notation. 160.Bl -hang 161.It Fn atomic_add "p" "v" 162.Bd -literal 163*p += v; 164.Ed 165.It Fn atomic_clear "p" "v" 166.Bd -literal 167*p &= ~v; 168.Ed 169.It Fn atomic_cmpset "dst" "old" "new" 170.Bd -literal 171if (*dst == old) { 172 *dst = new; 173 return 1; 174} else 175 return 0; 176.Ed 177.El 178.Pp 179The 180.Fn atomic_cmpset 181functions are not implemented for the types char, short, 8, and 16. 182.Bl -hang 183.It Fn atomic_load "addr" 184.Bd -literal 185return (*addr) 186.Ed 187.El 188.Pp 189The 190.Fn atomic_load 191functions always have acquire semantics. 192.Bl -hang 193.It Fn atomic_readandclear "addr" 194.Bd -literal 195temp = *addr; 196*addr = 0; 197return (temp); 198.Ed 199.El 200.Pp 201The 202.Fn atomic_readandclear 203functions are not implemented for the types char, short, ptr, 8, and 16 and do 204not have any variants with memory barriers at this time. 205.Bl -hang 206.It Fn atomic_set "p" "v" 207.Bd -literal 208*p |= v; 209.Ed 210.It Fn atomic_subtract "p" "v" 211.Bd -literal 212*p -= v; 213.Ed 214.It Fn atomic_store "p" "v" 215.Bd -literal 216*p = v; 217.Ed 218.El 219.Pp 220The 221.Fn atomic_store 222functions always have release semantics. 223.Pp 224The type 225.Dq 64 226is currently not implemented for any of the atomic operations on the 227.Tn i386 228architecture. 229.Sh RETURN VALUES 230.Fn atomic_cmpset 231returns the result of the compare operation. 232.Fn atomic_load 233and 234.Fn atomic_readandclear 235return the value at the specified address. 236.Sh EXAMPLES 237This example uses the 238.Fn atomic_cmpset_acq_ptr 239and 240.Fn atomic_set_ptr 241functions to obtain a sleep mutex and handle recursion. 242Since the 243.Va mtx_lock 244member of a 245.Li struct mtx 246is a pointer, the 247.Dq ptr 248type is used. 249.Bd -literal 250#define _obtain_lock(mp, tid) \\ 251 atomic_cmpset_acq_ptr(&(mp)->mtx_lock, (void *)MTX_UNOWNED, (tid)) 252 253/* Get a sleep lock, deal with recursion inline. */ 254#define _getlock_sleep(mp, tid, type) do { \\ 255 if (!_obtain_lock(mp, tid)) { \\ 256 if (((mp)->mtx_lock & MTX_FLAGMASK) != ((uintptr_t)(tid)))\\ 257 mtx_enter_hard(mp, (type) & MTX_HARDOPTS, 0); \\ 258 else { \\ 259 atomic_set_ptr(&(mp)->mtx_lock, MTX_RECURSE); \\ 260 (mp)->mtx_recurse++; \\ 261 } \\ 262 } \\ 263} while (0) 264.Ed 265.Sh HISTORY 266The 267.Fn atomic_add , 268.Fn atomic_clear , 269.Fn atomic_set , 270and 271.Fn atomic_subtract 272operations were first introduced in 273.Fx 3.0 . 274This first set only suppored the types char, short, int, and long. 275The 276.Fn atomic_cmpset , 277.Fn atomic_load , 278.Fn atomic_readandclear , 279and 280.Fn atomic_store 281operations were added in 282.Fx 5.0 . 283The types 8, 16, 32, 64, and ptr and all of the acquire and release variants 284were added in 285.Fx 5.0 286as well. 287