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24.\" $FreeBSD$ 25.\" 26.Dd October 27, 2000 27.Os 28.Dt ATOMIC 9 29.Sh NAME 30.Nm atomic_add , 31.Nm atomic_clear , 32.Nm atomic_cmpset , 33.Nm atomic_load , 34.Nm atomic_readandclear , 35.Nm atomic_set , 36.Nm atomic_subtract , 37.Nm atomic_store 38.Nd atomic operations 39.Sh SYNOPSIS 40.Fd #include <sys/types.h> 41.Fd #include <machine/atomic.h> 42.Ft void 43.Fn atomic_add_{acq_,rel_,}<type> "volatile <type> *p" "<type> v" 44.Ft void 45.Fn atomic_clear_{acq_,rel_,}<type> "volatile <type> *p" "<type> v" 46.Ft int 47.Fo atomic_cmpset_{acq_,rel_,}<type> 48.Fa "volatile <type> *dst" 49.Fa "<type> old" 50.Fa "<type> new" 51.Fc 52.Ft <type> 53.Fn atomic_load_acq_<type> "volatile <type> *p" 54.Ft <type> 55.Fn atomic_readandclear_<type> "volatile <type> *p" 56.Ft void 57.Fn atomic_set_{acq_,rel_,}<type> "volatile <type> *p" "<type> v" 58.Ft void 59.Fn atomic_subtract_{acq_,rel_,}<type> "volatile <type> *p" "<type> v" 60.Ft void 61.Fn atomic_store_rel_<type> "volatile <type> *p" "<type> v" 62.Sh DESCRIPTION 63Each of the atomic operations is guaranteed to be atomic in the presence of 64interrupts. 65They can be used to implement reference counts or as building blocks for more 66advanced synchronization primitives such as mutexes. 67.Ss Types 68Each atomic operation operates on a specific type. 69The type to use is indicated in the function name. 70The available types that can be used are: 71.Bl -tag -offset indent -width short 72.It char 73unsigned character 74.It short 75unsigned short integer 76.It int 77unsigned integer 78.It long 79unsigned long integer 80.It ptr 81unsigned integer the size of a pointer 82.It 8 83unsigned 8-bit integer 84.It 16 85unsigned 16-bit integer 86.It 32 87unsigned 32-bit integer 88.It 64 89unsigned 64-bit integer 90.El 91.Pp 92For example, the function to atomically add two integers is called 93.Fn atomic_add_int . 94.Ss Memory Barriers 95Memory barriers are used to guarantee the order the order of data accesses in 96two ways. 97First, they specify hints to the compiler to not re-order or optimize the 98operations. 99Secondly, on architectures that do not guarantee ordered data accesses, 100special instructions or special variants of instructions are used to indicate 101to the processor that data accesses need to occur in a certain order. 102As a result, most of the atomic operations have three variants in order to 103include optional memory barriers. 104The first form just performs the operation without any explicit barriers. 105The second form uses a read memory barrier, and the final variant uses a write 106memory barrier. 107.Pp 108The second variant of each operation includes a read memory barrier. 109This barrier ensures that the effects of this operation are completed before the 110effects of any later data accesses. 111As a result, the operation is said to have acquire semantics as it acquires a 112pseudo-lock requiring further operations to wait until it has completed. 113To denote this, the suffix 114.Dq _acq 115is inserted into the function name immediately prior to the 116.Em _type 117suffix. 118For example, to subtract two integers ensuring that any later writes will 119happen after the subtraction is performed, use 120.Fn atomic_subtract_acq_int . 121.Pp 122The third variant of each operation includes a write memory barrier. 123This ensures that all effects of all previous data accesses are completed 124before this operation takes place. 125As a result, the operation is said to have release semantics as it releases 126any pending data accesses to be completed before its operation is performed. 127To denote this, the suffix 128.Dq _rel 129is inserted into the function name immediately prior to the 130.Em _type 131suffix. 132For example, to add two long integers ensuring that all previous 133writes will happen first, use 134.Fn atomic_add_rel_long . 135.Pp 136A practical example of using memory barriers is to ensure that data accesses 137that are protected by a lock are all performed while the lock is held. 138To achieve this, one would use a read barrier when acquiring the lock to 139guarantee that the lock is held before any protected operations are performed. 140Finally, one would use a write barrier when releasing the lock to ensure that 141all of the protected operations are completed before the lock is released. 142.Pp 143.Ss Multiple Processors 144The current set of atomic operations do not necessarily guarantee atomicity 145across multiple processors. 146To guarantee atomicity across processors, not only does the individual 147operation need to be atomic on the processor performing the operation, but the 148the result of the operation needs to be pushed out to stable storage and the 149caches of all other processors on the system need to invalidate any cache 150lines that include the affected memory region. 151On the 152.Tn i386 153architecture, the cache coherency model requires that the hardware perform 154this task, thus the atomic operations are atomic across multiple processors. 155On the 156.Tn ia64 157architecture, coherency is only guaranteed for pages that are configured to 158using a caching policy of either uncached or write back. 159.Ss Semantics 160This section describes the semantics of each operation using a C like notation. 161.Bl -hang 162.It Fn atomic_add "p" "v" 163.Bd -literal 164*p += v; 165.Ed 166.It Fn atomic_clear "p" "v" 167.Bd -literal 168*p &= ~v; 169.Ed 170.It Fn atomic_cmpset "dst" "old" "new" 171.Bd -literal 172if (*dst == old) { 173 *dst = new; 174 return 1; 175} else 176 return 0; 177.Ed 178.El 179.Pp 180The 181.Fn atomic_cmpset 182functions are not implemented for the types char, short, 8, and 16. 183.Bl -hang 184.It Fn atomic_load "addr" 185.Bd -literal 186return (*addr) 187.Ed 188.El 189.Pp 190The 191.Fn atomic_load 192functions always have acquire semantics. 193.Bl -hang 194.It Fn atomic_readandclear "addr" 195.Bd -literal 196temp = *addr; 197*addr = 0; 198return (temp); 199.Ed 200.El 201.Pp 202The 203.Fn atomic_readandclear 204functions are not implemented for the types char, short, ptr, 8, and 16 and do 205not have any variants with memory barriers at this time. 206.Bl -hang 207.It Fn atomic_set "p" "v" 208.Bd -literal 209*p |= v; 210.Ed 211.It Fn atomic_subtract "p" "v" 212.Bd -literal 213*p -= v; 214.Ed 215.It Fn atomic_store "p" "v" 216.Bd -literal 217*p = v; 218.Ed 219.El 220.Pp 221The 222.Fn atomic_store 223functions always have release semantics. 224.Pp 225The type 226.Dq 64 227is currently not implemented for any of the atomic operations on the 228.Tn i386 229architecture. 230.Sh RETURN VALUES 231.Fn atomic_cmpset 232returns the result of the compare operation. 233.Fn atomic_load 234and 235.Fn atomic_readandclear 236return the value at the specified address. 237.Sh EXAMPLES 238This example uses the 239.Fn atomic_cmpset_acq_ptr 240and 241.Fn atomic_set_ptr 242functions to obtain a sleep mutex and handle recursion. 243Since the 244.Va mtx_lock 245member of a 246.Li struct mtx 247is a pointer, the 248.Dq ptr 249type is used. 250.Bd -literal 251#define _obtain_lock(mp, tid) \\ 252 atomic_cmpset_acq_ptr(&(mp)->mtx_lock, (void *)MTX_UNOWNED, (tid)) 253 254/* Get a sleep lock, deal with recursion inline. */ 255#define _getlock_sleep(mp, tid, type) do { \\ 256 if (!_obtain_lock(mp, tid)) { \\ 257 if (((mp)->mtx_lock & MTX_FLAGMASK) != ((uintptr_t)(tid)))\\ 258 mtx_enter_hard(mp, (type) & MTX_HARDOPTS, 0); \\ 259 else { \\ 260 atomic_set_ptr(&(mp)->mtx_lock, MTX_RECURSE); \\ 261 (mp)->mtx_recurse++; \\ 262 } \\ 263 } \\ 264} while (0) 265.Ed 266.Sh HISTORY 267The 268.Fn atomic_add , 269.Fn atomic_clear , 270.Fn atomic_set , 271and 272.Fn atomic_subtract 273operations were first introduced in 274.Fx 3.0 . 275This first set only suppored the types char, short, int, and long. 276The 277.Fn atomic_cmpset , 278.Fn atomic_load , 279.Fn atomic_readandclear , 280and 281.Fn atomic_store 282operations were added in 283.Fx 5.0 . 284The types 8, 16, 32, 64, and ptr and all of the acquire and release variants 285were added in 286.Fx 5.0 287as well. 288