xref: /freebsd/share/man/man7/simd.7 (revision dd1c2e887c1fa087bf15cbf7f0bdc35b7875bdd6)
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3.\" This documentation was written by Robert Clausecker <fuz@FreeBSD.org>
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27.Dd October 12, 2023
28.Dt SIMD 7
29.Os
30.Sh NAME
31.Nm simd
32.Nd SIMD enhancements
33.
34.Sh DESCRIPTION
35On some architectures, the
36.Fx
37.Em libc
38provides enhanced implementations of commonly used functions, replacing
39the architecture-independent implementations used otherwise.
40Depending on architecture and function, an enhanced
41implementation of a function may either always be used or the
42.Em libc
43detects at runtime which SIMD instruction set extensions are
44supported and picks the most suitable implementation automatically.
45On
46.Cm amd64 ,
47the environment variable
48.Ev ARCHLEVEL
49can be used to override this mechanism.
50.Pp
51Enhanced functions are present in the following architectures:
52.Bl -column FUNCTION_________ aarch64_ arm_ amd64_ i386_ ppc64_ -offset indent
53.It Em FUNCTION          Ta Em AARCH64 Ta Em ARM Ta Em AMD64  Ta Em I386 Ta Em PPC64
54.It    bcmp              Ta            Ta        Ta    S1     Ta    S
55.It    bcopy             Ta            Ta    S   Ta    S      Ta    S    Ta    SV
56.It    bzero             Ta            Ta    S   Ta    S      Ta    S
57.It    div               Ta            Ta        Ta    S      Ta    S
58.It    index             Ta    S       Ta        Ta    S1
59.It    ldiv              Ta            Ta        Ta    S      Ta    S
60.It    lldiv             Ta            Ta        Ta    S
61.It    memchr            Ta            Ta        Ta    S1
62.It    memcmp            Ta            Ta    S   Ta    S1     Ta    S
63.It    memcpy            Ta    S       Ta    S   Ta    S      Ta    S    Ta    SV
64.It    memmove           Ta    S       Ta    S   Ta    S      Ta    S    Ta    SV
65.It    memset            Ta            Ta    S   Ta    S      Ta    S
66.It    rindex            Ta    S       Ta        Ta    S1     Ta    S
67.It    stpcpy            Ta            Ta        Ta    S1
68.It    strcat            Ta            Ta        Ta    S      Ta    S
69.It    strchr            Ta    S       Ta        Ta    S1     Ta    S
70.It    strchrnul         Ta            Ta        Ta    S1
71.It    strcmp            Ta            Ta    S   Ta    S1     Ta    S
72.It    strcpy            Ta            Ta        Ta    S1     Ta    S    Ta    S2
73.It    strcspn           Ta            Ta        Ta    S2
74.It    strlen            Ta            Ta    S   Ta    S1
75.It    strncmp           Ta            Ta    S   Ta    S1     Ta    S
76.It    strncpy           Ta            Ta        Ta           Ta         Ta    S2
77.It    strnlen           Ta            Ta        Ta    S1
78.It    strrchr           Ta    S       Ta        Ta    S1     Ta    S
79.It    strpbrk           Ta            Ta        Ta    S2
80.It    strspn            Ta            Ta        Ta    S2
81.It    swab              Ta            Ta        Ta           Ta    S
82.It    timingsafe_bcmp   Ta            Ta        Ta    S1
83.It    timingsafe_memcmp Ta            Ta        Ta    S
84.It    wcschr            Ta            Ta        Ta           Ta    S
85.It    wcscmp            Ta            Ta        Ta           Ta    S
86.It    wcslen            Ta            Ta        Ta           Ta    S
87.It    wmemchr           Ta            Ta        Ta           Ta    S
88.El
89.Pp
90.Sy S Ns :\ scalar (non-SIMD),
91.Sy 1 Ns :\ amd64 baseline,
92.Sy 2 Ns :\ x86-64-v2
93or PowerPC\ 2.05,
94.Sy 3 Ns :\ x86-64-v3,
95.Sy 4 Ns :\ x86-64-v4,
96.Sy V Ns :\ PowerPC\ VSX.
97.
98.Sh ENVIRONMENT
99.Bl -tag
100.It Ev ARCHLEVEL
101On
102.Em amd64 ,
103controls the level of SIMD enhancements used.
104If this variable is set to an architecture level from the list below
105and that architecture level is supported by the processor, SIMD
106enhancements up to
107.Ev ARCHLEVEL
108are used.
109If
110.Ev ARCHLEVEL
111is unset, not recognised, or not supported by the processor, the highest
112level of SIMD enhancements supported by the processor is used.
113.Pp
114A suffix beginning with
115.Sq ":"
116or
117.Sq "+"
118in
119.Ev ARCHLEVEL
120is ignored and may be used for future extensions.
121The architecture level can be prefixed with a
122.Sq "!"
123character to force use of the requested architecture level, even if the
124processor does not advertise that it is supported.
125This usually causes applications to crash and should only be used for
126testing purposes or if architecture level detection yields incorrect
127results.
128.Pp
129The architecture levels follow the AMD64 SysV ABI supplement:
130.Bl -tag -width x86-64-v2
131.It Cm scalar
132scalar enhancements only (no SIMD)
133.It Cm baseline
134cmov, cx8, x87 FPU, fxsr, MMX, osfxsr, SSE, SSE2
135.It Cm x86-64-v2
136cx16, lahf/sahf, popcnt, SSE3, SSSE3, SSE4.1, SSE4.2
137.It Cm x86-64-v3
138AVX, AVX2, BMI1, BMI2, F16C, FMA, lzcnt, movbe, osxsave
139.It Cm x86-64-v4
140AVX-512F/BW/CD/DQ/VL
141.El
142.El
143.
144.Sh DIAGNOSTICS
145.Bl -diag
146.It "Illegal Instruction"
147Printed by
148.Xr sh 1
149if a command is terminated through delivery of a
150.Dv SIGILL
151signal, see
152.Xr signal 3 .
153.Pp
154Use of an unsupported architecture level was forced by setting
155.Ev ARCHLEVEL
156to a string beginning with a
157.Sq "!"
158character, causing a process to crash due to use of an unsupported
159instruction.
160Unset
161.Ev ARCHLEVEL ,
162remove the
163.Sq "!"
164prefix or select a supported architecture level.
165.Pp
166Message may also appear for unrelated reasons.
167.El
168.
169.Sh SEE ALSO
170.Xr string 3 ,
171.Xr arch 7
172.Rs
173.%A H. J. Lu
174.%A Michael Matz
175.%A Milind Girkar
176.%A Jan Hubi\[u010D]ka \" \(vc
177.%A Andreas Jaeger
178.%A Mark Mitchell
179.%B System V Application Binary Interface
180.%D May 23, 2023
181.%T AMD64 Architecture Processor Supplement
182.%O Version 1.0
183.Re
184.
185.Sh HISTORY
186Architecture-specific enhanced
187.Em libc
188functions were added starting
189with
190.Fx 2.0
191for
192.Cm i386 ,
193.Fx 6.0
194for
195.Cm arm ,
196.Fx 6.1
197for
198.Cm amd64 ,
199.Fx 11.0
200for
201.Cm aarch64 ,
202and
203.Fx 12.0
204for
205.Cm powerpc64 .
206SIMD-enhanced functions were first added with
207.Fx 13.0
208for
209.Cm powerpc64
210and with
211.Fx 14.0
212for
213.Cm amd64 .
214.Pp
215A
216.Nm
217manual page appeared in
218.Fx 14.0 .
219.
220.Sh AUTHOR
221.An Robert Clausecker Aq Mt fuz@FreeBSD.org
222.
223.Sh CAVEATS
224Other parts of
225.Fx
226such as cryptographic routines in the kernel or in
227OpenSSL may also use SIMD enhancements.
228These enhancements are not subject to the
229.Ev ARCHLEVEL
230variable and may have their own configuration
231mechanism.
232.
233.Sh BUGS
234Use of SIMD enhancements cannot be configured on powerpc64.
235