xref: /freebsd/share/man/man7/simd.7 (revision c983825a77f276ab71a34baee0250d55a84f59fd)
1.\" Copyright (c) 2023 The FreeBSD Foundation
2.
3.\" This documentation was written by Robert Clausecker <fuz@FreeBSD.org>
4.\" under sponsorship from the FreeBSD Foundation.
5.
6.\" Redistribution and use in source and binary forms, with or without
7.\" modification, are permitted provided that the following conditions
8.\" are met:
9.\" 1. Redistributions of source code must retain the above copyright
10.\"    notice, this list of conditions and the following disclaimer.
11.\" 2. Redistributions in binary form must reproduce the above copyright
12.\"    notice, this list of conditions and the following disclaimer in the
13.\"    documentation and/or other materials provided with the distribution.
14.
15.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ''AS IS'' AND
16.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25.\" SUCH DAMAGE
26.
27.Dd November 14, 2023
28.Dt SIMD 7
29.Os
30.Sh NAME
31.Nm simd
32.Nd SIMD enhancements
33.
34.Sh DESCRIPTION
35On some architectures, the
36.Fx
37.Em libc
38provides enhanced implementations of commonly used functions, replacing
39the architecture-independent implementations used otherwise.
40Depending on architecture and function, an enhanced
41implementation of a function may either always be used or the
42.Em libc
43detects at runtime which SIMD instruction set extensions are
44supported and picks the most suitable implementation automatically.
45On
46.Cm amd64 ,
47the environment variable
48.Ev ARCHLEVEL
49can be used to override this mechanism.
50.Pp
51Enhanced functions are present for the following architectures:
52.Bl -column FUNCTION_________ aarch64_ arm_ amd64_ i386_ ppc64_ -offset indent
53.It Em FUNCTION          Ta Em AARCH64 Ta Em ARM Ta Em AMD64  Ta Em I386 Ta Em PPC64
54.It    bcmp              Ta            Ta        Ta    S1     Ta    S
55.It    bcopy             Ta            Ta    S   Ta    S      Ta    S    Ta    SV
56.It    bzero             Ta            Ta    S   Ta    S      Ta    S
57.It    div               Ta            Ta        Ta    S      Ta    S
58.It    index             Ta    S       Ta        Ta    S1
59.It    ldiv              Ta            Ta        Ta    S      Ta    S
60.It    lldiv             Ta            Ta        Ta    S
61.It    memchr            Ta            Ta        Ta    S1
62.It    memcmp            Ta            Ta    S   Ta    S1     Ta    S
63.It    memcpy            Ta    S       Ta    S   Ta    S      Ta    S    Ta    SV
64.It    memmove           Ta    S       Ta    S   Ta    S      Ta    S    Ta    SV
65.It    memset            Ta            Ta    S   Ta    S      Ta    S
66.It    rindex            Ta    S       Ta        Ta    S1     Ta    S
67.It    stpcpy            Ta            Ta        Ta    S1
68.It    stpncpy           Ta            Ta        Ta    S1
69.It    strcat            Ta            Ta        Ta    S1     Ta    S
70.It    strchr            Ta    S       Ta        Ta    S1     Ta    S
71.It    strchrnul         Ta            Ta        Ta    S1
72.It    strcmp            Ta            Ta    S   Ta    S1     Ta    S
73.It    strcpy            Ta            Ta        Ta    S1     Ta    S    Ta    S2
74.It    strcspn           Ta            Ta        Ta    S2
75.It    strlen            Ta            Ta    S   Ta    S1
76.It    strncmp           Ta            Ta    S   Ta    S1     Ta    S
77.It    strncpy           Ta            Ta        Ta    S1     Ta         Ta    S2
78.It    strnlen           Ta            Ta        Ta    S1
79.It    strrchr           Ta    S       Ta        Ta    S1     Ta    S
80.It    strpbrk           Ta            Ta        Ta    S2
81.It    strsep            Ta            Ta        Ta    S2
82.It    strspn            Ta            Ta        Ta    S2
83.It    swab              Ta            Ta        Ta           Ta    S
84.It    timingsafe_bcmp   Ta            Ta        Ta    S1
85.It    timingsafe_memcmp Ta            Ta        Ta    S
86.It    wcschr            Ta            Ta        Ta           Ta    S
87.It    wcscmp            Ta            Ta        Ta           Ta    S
88.It    wcslen            Ta            Ta        Ta           Ta    S
89.It    wmemchr           Ta            Ta        Ta           Ta    S
90.El
91.Pp
92.Sy S Ns :\ scalar (non-SIMD),
93.Sy 1 Ns :\ amd64 baseline,
94.Sy 2 Ns :\ x86-64-v2
95or PowerPC\ 2.05,
96.Sy 3 Ns :\ x86-64-v3,
97.Sy 4 Ns :\ x86-64-v4,
98.Sy V Ns :\ PowerPC\ VSX.
99.
100.Sh ENVIRONMENT
101.Bl -tag
102.It Ev ARCHLEVEL
103On
104.Em amd64 ,
105controls the level of SIMD enhancements used.
106If this variable is set to an architecture level from the list below
107and that architecture level is supported by the processor, SIMD
108enhancements up to
109.Ev ARCHLEVEL
110are used.
111If
112.Ev ARCHLEVEL
113is unset, not recognised, or not supported by the processor, the highest
114level of SIMD enhancements supported by the processor is used.
115.Pp
116A suffix beginning with
117.Sq ":"
118or
119.Sq "+"
120in
121.Ev ARCHLEVEL
122is ignored and may be used for future extensions.
123The architecture level can be prefixed with a
124.Sq "!"
125character to force use of the requested architecture level, even if the
126processor does not advertise that it is supported.
127This usually causes applications to crash and should only be used for
128testing purposes or if architecture level detection yields incorrect
129results.
130.Pp
131The architecture levels follow the AMD64 SysV ABI supplement:
132.Bl -tag -width x86-64-v2
133.It Cm scalar
134scalar enhancements only (no SIMD)
135.It Cm baseline
136cmov, cx8, x87 FPU, fxsr, MMX, osfxsr, SSE, SSE2
137.It Cm x86-64-v2
138cx16, lahf/sahf, popcnt, SSE3, SSSE3, SSE4.1, SSE4.2
139.It Cm x86-64-v3
140AVX, AVX2, BMI1, BMI2, F16C, FMA, lzcnt, movbe, osxsave
141.It Cm x86-64-v4
142AVX-512F/BW/CD/DQ/VL
143.El
144.El
145.
146.Sh DIAGNOSTICS
147.Bl -diag
148.It "Illegal Instruction"
149Printed by
150.Xr sh 1
151if a command is terminated through delivery of a
152.Dv SIGILL
153signal, see
154.Xr signal 3 .
155.Pp
156Use of an unsupported architecture level was forced by setting
157.Ev ARCHLEVEL
158to a string beginning with a
159.Sq "!"
160character, causing a process to crash due to use of an unsupported
161instruction.
162Unset
163.Ev ARCHLEVEL ,
164remove the
165.Sq "!"
166prefix or select a supported architecture level.
167.Pp
168Message may also appear for unrelated reasons.
169.El
170.
171.Sh SEE ALSO
172.Xr string 3 ,
173.Xr arch 7
174.Rs
175.%A H. J. Lu
176.%A Michael Matz
177.%A Milind Girkar
178.%A Jan Hubi\[u010D]ka \" \(vc
179.%A Andreas Jaeger
180.%A Mark Mitchell
181.%B System V Application Binary Interface
182.%D May 23, 2023
183.%T AMD64 Architecture Processor Supplement
184.%O Version 1.0
185.Re
186.
187.Sh HISTORY
188Architecture-specific enhanced
189.Em libc
190functions were added starting
191with
192.Fx 2.0
193for
194.Cm i386 ,
195.Fx 6.0
196for
197.Cm arm ,
198.Fx 6.1
199for
200.Cm amd64 ,
201.Fx 11.0
202for
203.Cm aarch64 ,
204and
205.Fx 12.0
206for
207.Cm powerpc64 .
208SIMD-enhanced functions were first added with
209.Fx 13.0
210for
211.Cm powerpc64
212and with
213.Fx 14.1
214for
215.Cm amd64 .
216.Pp
217A
218.Nm
219manual page appeared in
220.Fx 14.1 .
221.
222.Sh AUTHOR
223.An Robert Clausecker Aq Mt fuz@FreeBSD.org
224.
225.Sh CAVEATS
226Other parts of
227.Fx
228such as cryptographic routines in the kernel or in
229OpenSSL may also use SIMD enhancements.
230These enhancements are not subject to the
231.Ev ARCHLEVEL
232variable and may have their own configuration
233mechanism.
234.
235.Sh BUGS
236Use of SIMD enhancements cannot be configured on powerpc64.
237