1.\" Copyright (c) 2023 The FreeBSD Foundation 2. 3.\" This documentation was written by Robert Clausecker <fuz@FreeBSD.org> 4.\" under sponsorship from the FreeBSD Foundation. 5. 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14. 15.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ''AS IS'' AND 16.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25.\" SUCH DAMAGE 26. 27.Dd December 6, 2023 28.Dt SIMD 7 29.Os 30.Sh NAME 31.Nm simd 32.Nd SIMD enhancements 33. 34.Sh DESCRIPTION 35On some architectures, the 36.Fx 37.Em libc 38provides enhanced implementations of commonly used functions, replacing 39the architecture-independent implementations used otherwise. 40Depending on architecture and function, an enhanced 41implementation of a function may either always be used or the 42.Em libc 43detects at runtime which SIMD instruction set extensions are 44supported and picks the most suitable implementation automatically. 45On 46.Cm amd64 , 47the environment variable 48.Ev ARCHLEVEL 49can be used to override this mechanism. 50.Pp 51Enhanced functions are present for the following architectures: 52.Bl -column FUNCTION_________ aarch64_ arm_ amd64_ i386_ ppc64_ -offset indent 53.It Em FUNCTION Ta Em AARCH64 Ta Em ARM Ta Em AMD64 Ta Em I386 Ta Em PPC64 54.It bcmp Ta Ta Ta S1 Ta S 55.It bcopy Ta Ta S Ta S Ta S Ta SV 56.It bzero Ta Ta S Ta S Ta S 57.It div Ta Ta Ta S Ta S 58.It index Ta S Ta Ta S1 59.It ldiv Ta Ta Ta S Ta S 60.It lldiv Ta Ta Ta S 61.It memchr Ta S Ta Ta S1 62.It memcmp Ta S Ta S Ta S1 Ta S 63.It memccpy Ta Ta Ta S1 64.It memcpy Ta S Ta S Ta S Ta S Ta SV 65.It memmove Ta S Ta S Ta S Ta S Ta SV 66.It memrchr Ta Ta Ta S1 67.It memset Ta S Ta S Ta S Ta S 68.It rindex Ta S Ta Ta S1 Ta S 69.It stpcpy Ta S Ta Ta S1 70.It stpncpy Ta Ta Ta S1 71.It strcat Ta Ta Ta S1 Ta S 72.It strchr Ta S Ta Ta S1 Ta S 73.It strchrnul Ta S Ta Ta S1 74.It strcmp Ta S Ta S Ta S1 Ta S 75.It strcpy Ta S Ta Ta S1 Ta S Ta S2 76.It strcspn Ta Ta Ta S2 77.It strlcat Ta Ta Ta S1 78.It strlcpy Ta Ta Ta S1 79.It strlen Ta S Ta S Ta S1 80.It strncat Ta Ta Ta S1 81.It strncmp Ta S Ta S Ta S1 Ta S 82.It strncpy Ta Ta Ta S1 Ta Ta S2 83.It strnlen Ta S Ta Ta S1 84.It strrchr Ta S Ta Ta S1 Ta S 85.It strpbrk Ta Ta Ta S2 86.It strsep Ta Ta Ta S2 87.It strspn Ta Ta Ta S2 88.It swab Ta Ta Ta Ta S 89.It timingsafe_bcmp Ta Ta Ta S1 90.It timingsafe_memcmp Ta Ta Ta S 91.It wcschr Ta Ta Ta Ta S 92.It wcscmp Ta Ta Ta Ta S 93.It wcslen Ta Ta Ta Ta S 94.It wmemchr Ta Ta Ta Ta S 95.El 96.Pp 97.Sy S Ns :\ scalar (non-SIMD), 98.Sy 1 Ns :\ amd64 baseline, 99.Sy 2 Ns :\ x86-64-v2 100or PowerPC\ 2.05, 101.Sy 3 Ns :\ x86-64-v3, 102.Sy 4 Ns :\ x86-64-v4, 103.Sy V Ns :\ PowerPC\ VSX. 104. 105.Sh ENVIRONMENT 106.Bl -tag 107.It Ev ARCHLEVEL 108On 109.Em amd64 , 110controls the level of SIMD enhancements used. 111If this variable is set to an architecture level from the list below 112and that architecture level is supported by the processor, SIMD 113enhancements up to 114.Ev ARCHLEVEL 115are used. 116If 117.Ev ARCHLEVEL 118is unset, not recognised, or not supported by the processor, the highest 119level of SIMD enhancements supported by the processor is used. 120.Pp 121A suffix beginning with 122.Sq ":" 123or 124.Sq "+" 125in 126.Ev ARCHLEVEL 127is ignored and may be used for future extensions. 128The architecture level can be prefixed with a 129.Sq "!" 130character to force use of the requested architecture level, even if the 131processor does not advertise that it is supported. 132This usually causes applications to crash and should only be used for 133testing purposes or if architecture level detection yields incorrect 134results. 135.Pp 136The architecture levels follow the AMD64 SysV ABI supplement: 137.Bl -tag -width x86-64-v2 138.It Cm scalar 139scalar enhancements only (no SIMD) 140.It Cm baseline 141cmov, cx8, x87 FPU, fxsr, MMX, osfxsr, SSE, SSE2 142.It Cm x86-64-v2 143cx16, lahf/sahf, popcnt, SSE3, SSSE3, SSE4.1, SSE4.2 144.It Cm x86-64-v3 145AVX, AVX2, BMI1, BMI2, F16C, FMA, lzcnt, movbe, osxsave 146.It Cm x86-64-v4 147AVX-512F/BW/CD/DQ/VL 148.El 149.El 150. 151.Sh DIAGNOSTICS 152.Bl -diag 153.It "Illegal Instruction" 154Printed by 155.Xr sh 1 156if a command is terminated through delivery of a 157.Dv SIGILL 158signal, see 159.Xr signal 3 . 160.Pp 161Use of an unsupported architecture level was forced by setting 162.Ev ARCHLEVEL 163to a string beginning with a 164.Sq "!" 165character, causing a process to crash due to use of an unsupported 166instruction. 167Unset 168.Ev ARCHLEVEL , 169remove the 170.Sq "!" 171prefix or select a supported architecture level. 172.Pp 173Message may also appear for unrelated reasons. 174.El 175. 176.Sh SEE ALSO 177.Xr string 3 , 178.Xr arch 7 179.Rs 180.%A H. J. Lu 181.%A Michael Matz 182.%A Milind Girkar 183.%A Jan Hubi\[u010D]ka \" \(vc 184.%A Andreas Jaeger 185.%A Mark Mitchell 186.%B System V Application Binary Interface 187.%D May 23, 2023 188.%T AMD64 Architecture Processor Supplement 189.%O Version 1.0 190.Re 191. 192.Sh HISTORY 193Architecture-specific enhanced 194.Em libc 195functions were added starting 196with 197.Fx 2.0 198for 199.Cm i386 , 200.Fx 6.0 201for 202.Cm arm , 203.Fx 6.1 204for 205.Cm amd64 , 206.Fx 11.0 207for 208.Cm aarch64 , 209and 210.Fx 12.0 211for 212.Cm powerpc64 . 213SIMD-enhanced functions were first added with 214.Fx 13.0 215for 216.Cm powerpc64 217and with 218.Fx 14.1 219for 220.Cm amd64 . 221.Pp 222A 223.Nm 224manual page appeared in 225.Fx 14.1 . 226. 227.Sh AUTHOR 228.An Robert Clausecker Aq Mt fuz@FreeBSD.org 229. 230.Sh CAVEATS 231Other parts of 232.Fx 233such as cryptographic routines in the kernel or in 234OpenSSL may also use SIMD enhancements. 235These enhancements are not subject to the 236.Ev ARCHLEVEL 237variable and may have their own configuration 238mechanism. 239. 240.Sh BUGS 241Use of SIMD enhancements cannot be configured on powerpc64. 242