1.\" Copyright (c) 2016 The FreeBSD Foundation. All rights reserved. 2.\" 3.\" This documentation was created by Ed Maste under sponsorship of 4.\" The FreeBSD Foundation. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 15.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND 16.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18.\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE 19.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25.\" SUCH DAMAGE. 26.\" 27.\" $FreeBSD$ 28.\" 29.Dd October 20, 2016 30.Dt ARCH 7 31.Os 32.Sh NAME 33.Nm arch 34.Nd Architecture-specific details 35.Sh DESCRIPTION 36Differences between CPU architectures and platforms supported by 37.Fx . 38.Pp 39.Ss Type sizes 40On all supported architectures, 41.Bl -column -offset -indent "long long" "Size" 42.It Sy Type Ta Sy Size 43.It short Ta 2 44.It int Ta 4 45.It long Ta sizeof(void*) 46.It long long Ta 8 47.It float Ta 4 48.It double Ta 8 49.El 50.Bl -column -offset indent "Sy Architecture" "Sy sizeof(void *)" "Sy sizeof(long double)" 51.It Sy Architecture Ta Sy sizeof(void *) Ta Sy sizeof(long double) 52.It amd64 Ta 8 Ta 16 53.It arm Ta 4 Ta 8 54.It armeb Ta 4 Ta 8 55.It armv6 Ta 4 Ta 8 56.It arm64 Ta 8 Ta 16 57.It i386 Ta 4 Ta 12 58.It mips Ta 4 Ta 8 59.It mipsel Ta 4 Ta 8 60.It mipselhf Ta 4 Ta 8 61.It mipshf Ta 4 Ta 8 62.It mipsn32 Ta 4 Ta 8 63.It mips64 Ta 8 Ta 8 64.It mips64el Ta 8 Ta 8 65.It mips64elhf Ta 8 Ta 8 66.It mips64hf Ta 8 Ta 8 67.It powerpc Ta 4 Ta 8 68.It powerpc64 Ta 8 Ta 8 69.It riscv Ta 8 Ta 16 70.It sparc64 Ta 8 Ta 16 71.El 72.Ss Endianness and Char Signedness 73.Bl -column -offset indent "Sy Architecture" "Sy Endianness" "Sy char Signedness" 74.It Sy Architecture Ta Sy Endianness Ta Sy char Signedness 75.It amd64 Ta little Ta signed 76.It arm Ta little Ta unsigned 77.It armeb Ta big Ta unsigned 78.It armv6 Ta little Ta unsigned 79.It arm64 Ta little Ta unsigned 80.It i386 Ta little Ta signed 81.It mips Ta big Ta signed 82.It mipsel Ta little Ta signed 83.It mipselhf Ta little Ta signed 84.It mipshf Ta big Ta signed 85.It mipsn32 Ta big Ta signed 86.It mips64 Ta big Ta signed 87.It mips64el Ta little Ta signed 88.It mips64elhf Ta little Ta signed 89.It mips64hf Ta big Ta signed 90.It powerpc Ta big Ta unsigned 91.It powerpc64 Ta big Ta unsigned 92.It riscv Ta little Ta signed 93.It sparc64 Ta big Ta signed 94.El 95.Ss Page Size 96.Bl -column -offset indent "Sy Architecture" "Sy Page Sizes" 97.It Sy Architecture Ta Sy Page Sizes 98.It amd64 Ta 4K, 2M, 1G 99.It arm Ta 4K 100.It armeb Ta 4K 101.It armv6 Ta 4K, 1M 102.It arm64 Ta 4K, 2M, 1G 103.It i386 Ta 4K, 2M (PAE), 4M 104.It mips Ta 4K 105.It mipsel Ta 4K 106.It mipselhf Ta 4K 107.It mipshf Ta 4K 108.It mipsn32 Ta 4K 109.It mips64 Ta 4K 110.It mips64el Ta 4K 111.It mips64elhf Ta 4K 112.It mips64hf Ta 4K 113.It powerpc Ta 4K 114.It powerpc64 Ta 4K 115.It riscv Ta 4K 116.It sparc64 Ta 8K 117.El 118.Ss Floating Point 119.Bl -column -offset indent "Sy Architecture" "Sy float, double" "Sy long double" 120.It Sy Architecture Ta Sy float, double Ta Sy long double 121.It amd64 Ta hard Ta hard, 80 bit 122.It arm Ta soft Ta soft, double precision 123.It armeb Ta soft Ta soft, double precision 124.It armv6 Ta hard Ta hard, double precision 125.It arm64 Ta hard Ta soft, quad precision 126.It i386 Ta hard Ta hard, 80 bit 127.It mips Ta soft Ta identical to double 128.It mipsel Ta soft Ta identical to double 129.It mipselhf Ta hard Ta identical to double 130.It mipshf Ta hard Ta identical to double 131.It mipsn32 Ta soft Ta identical to double 132.It mips64 Ta soft Ta identical to double 133.It mips64el Ta soft Ta identical to double 134.It mips64elhf Ta hard Ta identical to double 135.It mips64hf Ta hard Ta identical to double 136.It powerpc Ta hard Ta hard, double precision 137.It powerpc64 Ta hard Ta hard, double precision 138.It riscv Ta 139.It sparc64 Ta hard Ta hard, quad precision 140.El 141.Ss Predefined Macros 142The compiler provides a number of predefined macros. 143Some of these provide architecture-specific details and are explained below. 144Other macros, including those required by the language standard, are not 145included here. 146.Pp 147The full set of predefined macros can be obtained with this command: 148.Bd -literal -offset indent 149cc -x c -dM -E /dev/null 150.Ed 151.Pp 152Common type size and endianness macros: 153.Bl -column -offset indent "BYTE_ORDER" "Sy Meaning" 154.It Sy Macro Ta Sy Meaning 155.It Dv __LP64__ Ta 64-bit (8-byte) long and pointer, 32-bit (4-byte) int 156.It Dv __ILP32__ Ta 32-bit (4-byte) int, long and pointer 157.It Dv BYTE_ORDER Ta Either Dv BIG_ENDIAN or Dv LITTLE_ENDIAN . 158.Dv PDP11_ENDIAN 159is not used on 160.Fx . 161.El 162.Pp 163Architecture-specific macros: 164.Bl -column -offset indent "Sy Architecture" "Sy Predefined macros" 165.It Sy Architecture Ta Sy Predefined macros 166.It amd64 Ta Dv __amd64__, Dv __x86_64__ 167.It arm Ta Dv __arm__ 168.It armeb Ta Dv __arm__ 169.It armv6 Ta Dv __arm__, Dv __ARM_ARCH >= 6 170.It arm64 Ta Dv __aarch64__ 171.It i386 Ta Dv __i386__ 172.It mips Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32 173.It mipsel Ta Dv __mips__, Dv __mips_o32 174.It mipselhf Ta Dv __mips__, Dv __mips_o32 175.It mipshf Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32 176.It mipsn32 Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n32 177.It mips64 Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n64 178.It mips64el Ta Dv __mips__, Dv __mips_n64 179.It mips64elhf Ta Dv __mips__, Dv __mips_n64 180.It mips64hf Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n64 181.It powerpc Ta Dv __powerpc__ 182.It powerpc64 Ta Dv __powerpc__, Dv __powerpc64__ 183.It riscv Ta Dv __riscv__, Dv __riscv64 184.It sparc64 Ta Dv __sparc64__ 185.El 186.Sh SEE ALSO 187.Xr src.conf 5 , 188.Xr build 7 189.Sh HISTORY 190An 191.Nm 192manual page appeared in 193.Fx 12 . 194