1df9330b5SEd Maste.\" Copyright (c) 2016 The FreeBSD Foundation. All rights reserved. 2df9330b5SEd Maste.\" 3df9330b5SEd Maste.\" This documentation was created by Ed Maste under sponsorship of 4df9330b5SEd Maste.\" The FreeBSD Foundation. 5df9330b5SEd Maste.\" 6df9330b5SEd Maste.\" Redistribution and use in source and binary forms, with or without 7df9330b5SEd Maste.\" modification, are permitted provided that the following conditions 8df9330b5SEd Maste.\" are met: 9df9330b5SEd Maste.\" 1. Redistributions of source code must retain the above copyright 10df9330b5SEd Maste.\" notice, this list of conditions and the following disclaimer. 11df9330b5SEd Maste.\" 2. Redistributions in binary form must reproduce the above copyright 12df9330b5SEd Maste.\" notice, this list of conditions and the following disclaimer in the 13df9330b5SEd Maste.\" documentation and/or other materials provided with the distribution. 14df9330b5SEd Maste.\" 15df9330b5SEd Maste.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND 16df9330b5SEd Maste.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17df9330b5SEd Maste.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18df9330b5SEd Maste.\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE 19df9330b5SEd Maste.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20df9330b5SEd Maste.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21df9330b5SEd Maste.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22df9330b5SEd Maste.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23df9330b5SEd Maste.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24df9330b5SEd Maste.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25df9330b5SEd Maste.\" SUCH DAMAGE. 26df9330b5SEd Maste.\" 27df9330b5SEd Maste.\" $FreeBSD$ 28df9330b5SEd Maste.\" 29df9330b5SEd Maste.Dd July 19, 2016 30df9330b5SEd Maste.Dt ARCH 7 31df9330b5SEd Maste.Os 32df9330b5SEd Maste.Sh NAME 33df9330b5SEd Maste.Nm arch 34df9330b5SEd Maste.Nd Architecture-specific details 35df9330b5SEd Maste.Sh DESCRIPTION 36df9330b5SEd MasteDifferences between CPU architectures and platforms supported by 37df9330b5SEd Maste.Fx . 38df9330b5SEd Maste.Pp 39df9330b5SEd Maste.Ss Type sizes 40df9330b5SEd MasteOn all supported architectures, 41df9330b5SEd Maste.Bl -column -offset -indent "long long" "Size" 42df9330b5SEd Maste.It Sy Type Ta Sy Size 43df9330b5SEd Maste.It short Ta 2 44df9330b5SEd Maste.It int Ta 4 45df9330b5SEd Maste.It long Ta sizeof(void*) 46df9330b5SEd Maste.It long long Ta 8 47df9330b5SEd Maste.It float Ta 4 48df9330b5SEd Maste.It double Ta 8 49df9330b5SEd Maste.El 50*1859c867SKonstantin Belousov.Bl -column -offset indent "Sy Architecture" "Sy sizeof(void *)" "Sy "sizeof(long double)" 51df9330b5SEd Maste.It Sy Architecture Ta Sy sizeof(void *) Ta Sy sizeof(long double) 52df9330b5SEd Maste.It amd64 Ta 8 Ta 16 53df9330b5SEd Maste.It arm Ta 4 Ta 8 54df9330b5SEd Maste.It armeb Ta 4 Ta 8 55df9330b5SEd Maste.It armv6 Ta 4 Ta 8 56df9330b5SEd Maste.It arm64 Ta 8 Ta 16 57df9330b5SEd Maste.It i386 Ta 4 Ta 12 58df9330b5SEd Maste.It mips Ta 4 Ta 8 59df9330b5SEd Maste.It mipsel Ta 4 Ta 8 60df9330b5SEd Maste.It mipsn32 Ta 4 Ta 8 61df9330b5SEd Maste.It mips64 Ta 8 Ta 8 62df9330b5SEd Maste.It mips64el Ta 8 Ta 8 63df9330b5SEd Maste.It powerpc Ta 4 Ta 8 64df9330b5SEd Maste.It powerpc64 Ta 8 Ta 8 65df9330b5SEd Maste.It riscv Ta 8 Ta 66df9330b5SEd Maste.It sparc64 Ta 8 Ta 16 67df9330b5SEd Maste.El 68df9330b5SEd Maste.Ss Endianness and Char Signedness 69*1859c867SKonstantin Belousov.Bl -column -offset indent "Sy Architecture" "Sy Endianness" "Sy "char Signedness" 70df9330b5SEd Maste.It Sy Architecture Ta Sy Endianness Ta Sy char Signedness 71df9330b5SEd Maste.It amd64 Ta little Ta signed 72df9330b5SEd Maste.It arm Ta little Ta unsigned 73df9330b5SEd Maste.It armeb Ta big Ta unsigned 74df9330b5SEd Maste.It armv6 Ta little Ta unsigned 75df9330b5SEd Maste.It arm64 Ta little Ta unsigned 76df9330b5SEd Maste.It i386 Ta little Ta signed 778395cdc1SEd Maste.It mips Ta big Ta signed 788395cdc1SEd Maste.It mipsel Ta little Ta signed 798395cdc1SEd Maste.It mipsn32 Ta big Ta signed 808395cdc1SEd Maste.It mips64 Ta big Ta signed 81df9330b5SEd Maste.It mips64el Ta little Ta signed 82df9330b5SEd Maste.It powerpc Ta big Ta unsigned 83df9330b5SEd Maste.It powerpc64 Ta big Ta unsigned 84df9330b5SEd Maste.It riscv Ta little Ta signed 85df9330b5SEd Maste.It sparc64 Ta big Ta signed 86df9330b5SEd Maste.El 87df9330b5SEd Maste.Ss Page Size 88*1859c867SKonstantin Belousov.Bl -column -offset indent "Sy Architecture" "Sy Page Sizes" 89df9330b5SEd Maste.It Sy Architecture Ta Sy Page Sizes 90df9330b5SEd Maste.It amd64 Ta 4K, 2M, 1G 91df9330b5SEd Maste.It arm Ta 4K 92df9330b5SEd Maste.It armeb Ta 4K 93780586e8SEd Maste.It armv6 Ta 4K, 1M 94df9330b5SEd Maste.It arm64 Ta 4K, 2M, 1G 95df9330b5SEd Maste.It i386 Ta 4K, 2M (PAE), 4M 96df9330b5SEd Maste.It mips Ta 4K 97df9330b5SEd Maste.It mipsel Ta 4K 98df9330b5SEd Maste.It mipsn32 Ta 4K 99df9330b5SEd Maste.It mips64 Ta 4K 100df9330b5SEd Maste.It mips64el Ta 4K 101df9330b5SEd Maste.It powerpc Ta 4K 102df9330b5SEd Maste.It powerpc64 Ta 4K 103df9330b5SEd Maste.It riscv Ta 4K 104df9330b5SEd Maste.It sparc64 Ta 8K 105df9330b5SEd Maste.El 106df9330b5SEd Maste.Ss Floating Point 107*1859c867SKonstantin Belousov.Bl -column -offset indent "Sy Architecture" "Sy float, double" "Sy long double" 108df9330b5SEd Maste.It Sy Architecture Ta Sy float, double Ta Sy long double 109df9330b5SEd Maste.It amd64 Ta hard Ta hard, 80 bit 110df9330b5SEd Maste.It arm Ta soft Ta soft, double precision 111df9330b5SEd Maste.It armeb Ta soft Ta soft, double precision 112df9330b5SEd Maste.It armv6 Ta hard Ta hard, double precision 113df9330b5SEd Maste.It arm64 Ta hard Ta soft, quad precision 114df9330b5SEd Maste.It i386 Ta hard Ta hard, 80 bit 115df9330b5SEd Maste.It mips Ta soft Ta identical to double 116df9330b5SEd Maste.It mipsel Ta soft Ta identical to double 117df9330b5SEd Maste.It mipsn32 Ta soft Ta identical to double 118df9330b5SEd Maste.It mips64 Ta soft Ta identical to double 119df9330b5SEd Maste.It mips64el Ta soft Ta identical to double 120df9330b5SEd Maste.It powerpc Ta hard Ta hard, double precision 121df9330b5SEd Maste.It powerpc64 Ta hard Ta hard, double precision 122df9330b5SEd Maste.It riscv Ta 123df9330b5SEd Maste.It sparc64 Ta hard Ta hard, quad precision 124df9330b5SEd Maste.El 125df9330b5SEd Maste.Ss Predefined Macros 126df9330b5SEd MasteThe compiler provides a number of predefined macros. 127df9330b5SEd MasteSome of these provide architecture-specific details and are explained below. 128df9330b5SEd MasteOther macros, including those required by the language standard, are not 129df9330b5SEd Masteincluded here. 130df9330b5SEd Maste.Pp 131df9330b5SEd MasteThe full set of predefined macros can be obtained with this command: 132df9330b5SEd Maste.Bd -literal -offset indent 133df9330b5SEd Mastecc -x c -Dm -E /dev/null 134df9330b5SEd Maste.Ed 135df9330b5SEd Maste.Pp 136df9330b5SEd MasteCommon type size and endianness macros: 137*1859c867SKonstantin Belousov.Bl -column -offset indent "BYTE_ORDER" "Sy Meaning" 138df9330b5SEd Maste.It Sy Macro Ta Sy Meaning 139df9330b5SEd Maste.It Dv __LP64__ Ta 64-bit (8-byte) long and pointer, 32-bit (4-byte) int 140df9330b5SEd Maste.It Dv __ILP32__ Ta 32-bit (4-byte) int, long and pointer 141df9330b5SEd Maste.It Dv BYTE_ORDER Ta Either Dv BIG_ENDIAN or Dv LITTLE_ENDIAN . 142*1859c867SKonstantin Belousov.Dv PDP11_ENDIAN 143*1859c867SKonstantin Belousovis not used on 144*1859c867SKonstantin Belousov.Fx . 145df9330b5SEd Maste.El 146df9330b5SEd Maste.Pp 147df9330b5SEd MasteArchitecture-specific macros: 148*1859c867SKonstantin Belousov.Bl -column -offset indent "Sy Architecture" "Sy Predefined macros" 149df9330b5SEd Maste.It Sy Architecture Ta Sy Predefined macros 150df9330b5SEd Maste.It amd64 Ta Dv __amd64__, Dv __x86_64__ 151df9330b5SEd Maste.It arm Ta Dv __arm__ 152df9330b5SEd Maste.It armeb Ta Dv __arm__ 153df9330b5SEd Maste.It armv6 Ta Dv __arm__, Dv __ARM_ARCH >= 6 154df9330b5SEd Maste.It arm64 Ta Dv __aarch64__ 155df9330b5SEd Maste.It i386 Ta Dv __i386__ 156df9330b5SEd Maste.It mips Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32 157df9330b5SEd Maste.It mipsel Ta Dv __mips__, Dv __mips_o32 158df9330b5SEd Maste.It mipsn32 Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n32 159df9330b5SEd Maste.It mips64 Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n64 160df9330b5SEd Maste.It mips64el Ta Dv __mips__, Dv __mips_n64 161df9330b5SEd Maste.It powerpc Ta Dv __powerpc__ 162df9330b5SEd Maste.It powerpc64 Ta Dv __powerpc__, Dv __powerpc64__ 163df9330b5SEd Maste.It riscv Ta Dv __riscv__, Dv __riscv64 164df9330b5SEd Maste.It sparc64 Ta Dv __sparc64__ 165df9330b5SEd Maste.El 166df9330b5SEd Maste.Sh SEE ALSO 167df9330b5SEd Maste.Xr src.conf 5 , 168df9330b5SEd Maste.Xr build 7 169df9330b5SEd Maste.Sh HISTORY 170df9330b5SEd MasteAn 171df9330b5SEd Maste.Nm 172df9330b5SEd Mastemanual page appeared in 173df9330b5SEd Maste.Fx 12 . 174