1.\" Copyright (c) 1997, 1998 2.\" Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 3. All advertising materials mentioning features or use of this software 13.\" must display the following acknowledgement: 14.\" This product includes software developed by Bill Paul. 15.\" 4. Neither the name of the author nor the names of any co-contributors 16.\" may be used to endorse or promote products derived from this software 17.\" without specific prior written permission. 18.\" 19.\" THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 20.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22.\" ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 23.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29.\" THE POSSIBILITY OF SUCH DAMAGE. 30.\" 31.\" $FreeBSD$ 32.\" 33.Dd November 22, 1998 34.Dt VR 4 35.Os 36.Sh NAME 37.Nm vr 38.Nd "VIA Technologies VT3043 and VT86C100A ethernet device driver" 39.Sh SYNOPSIS 40.Cd "device miibus" 41.Cd "device vr" 42.Sh DESCRIPTION 43The 44.Nm 45driver provides support for PCI ethernet adapters and embedded 46controllers based on the VIA Technologies VT3043 Rhine I and 47VT86C100A Rhine II fast ethernet controller chips. 48This includes 49the D-Link DFE530-TX, the Hawking Technologies PN102TX, the 50AOpen/Acer ALN-320, and various other commodity fast ethernet 51cards. 52.Pp 53The VIA Rhine chips use bus master DMA and have a descriptor layout 54designed to resemble that of the DEC 21x4x "tulip" chips. 55The register 56layout is different however and the receive filter in the Rhine chips 57is much simpler and is programmed through registers rather than by 58downloading a special setup frame through the transmit DMA engine. 59Transmit and receive DMA buffers must be longword 60aligned. 61The Rhine chips are meant to be interfaced with external 62physical layer devices via an MII bus. 63They support both 6410 and 100Mbps speeds in either full or half duplex. 65.Pp 66The 67.Nm 68driver supports the following media types: 69.Pp 70.Bl -tag -width xxxxxxxxxxxxxxxxxxxx 71.It autoselect 72Enable autoselection of the media type and options. 73The user can manually override 74the autoselected mode by adding media options to the 75.Pa /etc/rc.conf 76file. 77.It 10baseT/UTP 78Set 10Mbps operation. 79The 80.Ar mediaopt 81option can also be used to select either 82.Ar full-duplex 83or 84.Ar half-duplex 85modes. 86.It 100baseTX 87Set 100Mbps (fast ethernet) operation. 88The 89.Ar mediaopt 90option can also be used to select either 91.Ar full-duplex 92or 93.Ar half-duplex 94modes. 95.El 96.Pp 97The 98.Nm 99driver supports the following media options: 100.Pp 101.Bl -tag -width xxxxxxxxxxxxxxxxxxxx 102.It full-duplex 103Force full duplex operation 104.It half-duplex 105Force half duplex operation. 106.El 107.Pp 108Note that the 100baseTX media type is only available if supported 109by the adapter. 110For more information on configuring this device, see 111.Xr ifconfig 8 . 112.Sh DIAGNOSTICS 113.Bl -diag 114.It "vr%d: couldn't map memory" 115A fatal initialization error has occurred. 116.It "vr%d: couldn't map interrupt" 117A fatal initialization error has occurred. 118.It "vr%d: watchdog timeout" 119The device has stopped responding to the network, or there is a problem with 120the network connection (cable). 121.It "vr%d: no memory for rx list" 122The driver failed to allocate an mbuf for the receiver ring. 123.It "vr%d: no memory for tx list" 124The driver failed to allocate an mbuf for the transmitter ring when 125allocating a pad buffer or collapsing an mbuf chain into a cluster. 126.It "vr%d: chip is in D3 power state -- setting to D0" 127This message applies only to adapters which support power 128management. 129Some operating systems place the controller in low power 130mode when shutting down, and some PCI BIOSes fail to bring the chip 131out of this state before configuring it. 132The controller loses all of 133its PCI configuration in the D3 state, so if the BIOS does not set 134it back to full power mode in time, it won't be able to configure it 135correctly. 136The driver tries to detect this condition and bring 137the adapter back to the D0 (full power) state, but this may not be 138enough to return the driver to a fully operational condition. 139If 140you see this message at boot time and the driver fails to attach 141the device as a network interface, you will have to perform second 142warm boot to have the device properly configured. 143.Pp 144Note that this condition only occurs when warm booting from another 145operating system. 146If you power down your system prior to booting 147.Fx , 148the card should be configured correctly. 149.El 150.Sh SEE ALSO 151.Xr arp 4 , 152.Xr miibus 4 , 153.Xr netintro 4 , 154.Xr ng_ether 4 , 155.Xr ifconfig 8 156.Rs 157.%T The VIA Technologies VT86C100A data sheet 158.%O http://www.via.com.tw 159.Re 160.Sh HISTORY 161The 162.Nm 163device driver first appeared in 164.Fx 3.0 . 165.Sh AUTHORS 166The 167.Nm 168driver was written by 169.An Bill Paul Aq wpaul@ctr.columbia.edu . 170.Sh BUGS 171The 172.Nm 173driver always copies transmit mbuf chains into longword-aligned 174buffers prior to transmission in order to pacify the Rhine chips. 175If buffers are not aligned correctly, the chip will round the 176supplied buffer address and begin DMAing from the wrong location. 177This buffer copying impairs transmit performance on slower systems but can't 178be avoided. 179On faster machines (e.g. a Pentium II), the performance 180impact is much less noticeable. 181