1.\" Copyright (c) 1997, 1998 2.\" Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 3. All advertising materials mentioning features or use of this software 13.\" must display the following acknowledgement: 14.\" This product includes software developed by Bill Paul. 15.\" 4. Neither the name of the author nor the names of any co-contributors 16.\" may be used to endorse or promote products derived from this software 17.\" without specific prior written permission. 18.\" 19.\" THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 20.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22.\" ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 23.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29.\" THE POSSIBILITY OF SUCH DAMAGE. 30.\" 31.\" $FreeBSD$ 32.\" 33.Dd November 22, 1998 34.Dt VR 4 35.Os FreeBSD 36.Sh NAME 37.Nm vr 38.Nd 39VIA Technologies VT3043 and VT86C100A ethernet device driver 40.Sh SYNOPSIS 41.Cd "device miibus" 42.Cd "device vr" 43.Sh DESCRIPTION 44The 45.Nm 46driver provides support for PCI ethernet adapters and embedded 47controllers based on the VIA Technologies VT3043 Rhine I and 48VT86C100A Rhine II fast ethernet controller chips. 49This includes 50the D-Link DFE530-TX, the Hawking Technologies PN102TX, the 51AOpen/Acer ALN-320, and various other commodity fast ethernet 52cards. 53.Pp 54The VIA Rhine chips use bus master DMA and have a descriptor layout 55designed to resemble that of the DEC 21x4x "tulip" chips. 56The register 57layout is different however and the receive filter in the Rhine chips 58is much simpler and is programmed through registers rather than by 59downloading a special setup frame through the transmit DMA engine. 60Transmit and receive DMA buffers must be longword 61aligned. 62The Rhine chips are meant to be interfaced with external 63physical layer devices via an MII bus. 64They support both 6510 and 100Mbps speeds in either full or half duplex. 66.Pp 67The 68.Nm 69driver supports the following media types: 70.Pp 71.Bl -tag -width xxxxxxxxxxxxxxxxxxxx 72.It autoselect 73Enable autoselection of the media type and options. 74The user can manually override 75the autoselected mode by adding media options to the 76.Pa /etc/rc.conf 77file. 78.It 10baseT/UTP 79Set 10Mbps operation. 80The 81.Ar mediaopt 82option can also be used to select either 83.Ar full-duplex 84or 85.Ar half-duplex modes. 86.It 100baseTX 87Set 100Mbps (fast ethernet) operation. 88The 89.Ar mediaopt 90option can also be used to select either 91.Ar full-duplex 92or 93.Ar half-duplex 94modes. 95.El 96.Pp 97The 98.Nm 99driver supports the following media options: 100.Pp 101.Bl -tag -width xxxxxxxxxxxxxxxxxxxx 102.It full-duplex 103Force full duplex operation 104.It half-duplex 105Force half duplex operation. 106.El 107.Pp 108Note that the 100baseTX media type is only available if supported 109by the adapter. 110For more information on configuring this device, see 111.Xr ifconfig 8 . 112.Sh DIAGNOSTICS 113.Bl -diag 114.It "vr%d: couldn't map memory" 115A fatal initialization error has occurred. 116.It "vr%d: couldn't map interrupt" 117A fatal initialization error has occurred. 118.It "vr%d: watchdog timeout" 119The device has stopped responding to the network, or there is a problem with 120the network connection (cable). 121.It "vr%d: no memory for rx list" 122The driver failed to allocate an mbuf for the receiver ring. 123.It "vr%d: no memory for tx list" 124The driver failed to allocate an mbuf for the transmitter ring when 125allocating a pad buffer or collapsing an mbuf chain into a cluster. 126.It "vr%d: chip is in D3 power state -- setting to D0" 127This message applies only to adapters which support power 128management. 129Some operating systems place the controller in low power 130mode when shutting down, and some PCI BIOSes fail to bring the chip 131out of this state before configuring it. 132The controller loses all of 133its PCI configuration in the D3 state, so if the BIOS does not set 134it back to full power mode in time, it won't be able to configure it 135correctly. 136The driver tries to detect this condition and bring 137the adapter back to the D0 (full power) state, but this may not be 138enough to return the driver to a fully operational condition. 139If 140you see this message at boot time and the driver fails to attach 141the device as a network interface, you will have to perform second 142warm boot to have the device properly configured. 143.Pp 144Note that this condition only occurs when warm booting from another 145operating system. 146If you power down your system prior to booting 147.Fx , 148the card should be configured correctly. 149.El 150.Sh SEE ALSO 151.Xr arp 4 , 152.Xr netintro 4 , 153.Xr ifconfig 8 , 154.Xr ng_ether 8 155.Rs 156.%T The VIA Technologies VT86C100A data sheet 157.%O http://www.via.com.tw 158.Re 159.Sh HISTORY 160The 161.Nm 162device driver first appeared in 163.Fx 3.0 . 164.Sh AUTHORS 165The 166.Nm 167driver was written by 168.An Bill Paul Aq wpaul@ctr.columbia.edu . 169.Sh BUGS 170The 171.Nm 172driver always copies transmit mbuf chains into longword-aligned 173buffers prior to transmission in order to pacify the Rhine chips. 174If buffers are not aligned correctly, the chip will round the 175supplied buffer address and begin DMAing from the wrong location. 176This buffer copying impairs transmit performance on slower systems but can't 177be avoided. 178On faster machines (e.g. a Pentium II), the performance 179impact is much less noticable. 180