xref: /freebsd/share/man/man4/uftdi.4 (revision d0ff5773cefaf3fa41b1be3e44ca35bd9d5f68ee)
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33.Dd June 25, 2025
34.Dt UFTDI 4
35.Os
36.Sh NAME
37.Nm uftdi
38.Nd Future Technology Devices International USB to serial UART driver
39.Sh SYNOPSIS
40.Cd "device usb"
41.Cd "device ucom"
42.Cd "device uftdi"
43.Pp
44In
45.Xr rc.conf 5 :
46.Cd kld_list="uftdi"
47.Pp
48In
49.Xr sysctl.conf 5 :
50.Cd hw.usb.uftdi.debug=1
51.Cd hw.usb.uftdi.skip_jtag_interfaces=0
52.Sh DESCRIPTION
53The
54.Nm
55driver supports FTDI USB to serial UART devices.
56If the appropriate hardware is detected,
57the driver will be loaded automatically by
58.Xr devmatch 8 .
59To load the driver manually, add it to the
60.Ic kld_list
61in
62.Xr rc.conf 5 ,
63or use
64.Xr kldload 8
65at runtime.
66The device is accessed through the
67.Xr ucom 4
68driver which makes it behave like a
69.Xr tty 4 .
70.Pp
71Call out through this interface with applications like
72.Xr cu 1
73or
74.Xr tip 1 .
75.Sh HARDWARE
76The
77.Nm
78driver supports the following USB to serial UART controllers:
79.Pp
80.Bl -bullet -compact
81.It
82FTDI FT4232H
83.It
84FTDI FT232R
85.It
86FTDI FT230X
87.It
88FTDI FT2232H
89.It
90FTDI FT2232D
91.It
92FTDI FT2232C
93.It
94FTDI FT8U232BM
95.It
96FTDI FT8U232AM
97.It
98FTDI FT8U100AX
99.El
100.Sh SYSCTL VARIABLES
101These settings can be entered in the
102.Xr loader 8
103prompt, set in
104.Xr loader.conf 5 ,
105.Xr sysctl.conf 5 ,
106or changed at runtime with
107.Xr sysctl 8 :
108.Bl -tag -width "hw.usb.uftdi.skip_jtag_interfaces"
109.It Va hw.usb.uftdi.debug
110Enable debugging messages, default
111.Ql 0
112.It Va hw.usb.uftdi.skip_jtag_interfaces
113Ignore JTAG interfaces, default
114.Ql 1
115.El
116.Sh IOCTLS
117Many of the supported chips provide additional functionality
118such as bitbang mode and the MPSSE engine for serial bus emulation.
119The
120.Nm
121driver provides access to that functionality with the following
122.Xr ioctl 2
123calls, defined in
124.In dev/usb/uftdiio.h :
125.Bl -tag -width indent
126.It Dv UFTDIIOC_RESET_IO Pq Vt int
127Reset the channel to its default configuration, flush RX and TX FIFOs.
128.It Dv UFTDIIOC_RESET_RX Pq Vt int
129Flush the RX FIFO.
130.It Dv UFTDIIOC_RESET_TX Pq Vt int
131Flush the TX FIFO.
132.It Dv UFTDIIOC_SET_BITMODE Pq Vt "struct uftdi_bitmode"
133Put the channel into the operating mode specified in
134.Va mode ,
135and set the pins indicated by ones in
136.Va iomask
137to output mode.
138The
139.Va mode
140must be one of the
141.Va uftdi_bitmodes
142values.
143Setting
144.Va mode
145to
146.Dv UFTDI_BITMODE_NONE
147returns the channel to standard UART mode.
148.Bd -literal
149enum uftdi_bitmodes
150{
151	UFTDI_BITMODE_ASYNC = 0,
152	UFTDI_BITMODE_MPSSE = 1,
153	UFTDI_BITMODE_SYNC = 2,
154	UFTDI_BITMODE_CPU_EMUL = 3,
155	UFTDI_BITMODE_FAST_SERIAL = 4,
156	UFTDI_BITMODE_CBUS = 5,
157	UFTDI_BITMODE_NONE = 0xff,
158};
159
160struct uftdi_bitmode
161{
162	uint8_t mode;
163	uint8_t iomask;
164};
165.Ed
166.Pp
167Manuals and application notes published by FTDI describe these
168modes in detail.
169To use most of these modes, you first put the channel into
170the desired mode, then you
171.Xr read 2
172and
173.Xr write 2
174data which either reflects pin state or is interpreted
175as MPSSE commands and parameters, depending on the mode.
176.It Dv UFTDIIOC_GET_BITMODE Pq Vt "struct uftdi_bitmode"
177Return the current bitbang mode in the
178.Va mode
179member, and the state of the DBUS0..DBUS7 pins at the time
180of the call in the
181.Va iomask
182member.
183The pin state can be read while the chip is in any mode, including
184.Dv UFTDI_BITMODE_NONE
185(UART) mode.
186.It Dv UFTDIIOC_SET_ERROR_CHAR Pq Vt int
187Set the character which is inserted into the buffer to mark
188the point of an error such as FIFO overflow.
189.It Dv UFTDIIOC_SET_EVENT_CHAR Pq Vt int
190Set the character which causes a partial FIFO full of data
191to be returned immediately even if the FIFO is not full.
192.It Dv UFTDIIOC_SET_LATENCY Pq Vt int
193Set the amount of time to wait for a full FIFO,
194in milliseconds.
195If more than this much time elapses without receiving a new
196character, any characters in the FIFO are returned.
197.It Dv UFTDIIOC_GET_LATENCY Pq Vt int
198Get the current value of the latency timer.
199.It Dv UFTDIIOC_GET_HWREV Pq Vt int
200Get the hardware revision number.
201This is the
202.Va bcdDevice
203value from the
204.Va usb_device_descriptor .
205.It Dv UFTDIIOC_READ_EEPROM Pq Vt "struct uftdi_eeio"
206Read one or more words from the configuration eeprom.
207The FTDI chip performs eeprom I/O in 16-bit words.
208Set
209.Va offset
210and
211.Va length
212to values evenly divisible by two before the call, and the
213.Va data
214array will contain the requested values from eeprom after the call.
215.Bd -literal
216struct uftdi_eeio
217{
218	uint16_t offset;
219	uint16_t length;
220	uint16_t data[64];
221};
222.Ed
223.Pp
224The FT232R chip has an internal eeprom.
225An external serial eeprom is optional on other FTDI chips.
226The eeprom may contain 64, 128, or 256 words,
227depending on the part used.
228Multiple calls may be needed to read or write the larger parts.
229When no eeprom is present, all words in the returned data are 0xffff.
230An erased eeprom also reads as all 0xffff.
231.It Dv UFTDIIOC_WRITE_EEPROM Pq Vt "struct uftdi_eeio"
232Write one or more words to the configuration eeprom.
233The
234.Va uftdi_eeio
235values are as described for
236.Dv UFTDIIOC_READ_EEPROM .
237.Pp
238The FTDI chip does a blind write to the eeprom, and it will appear
239to succeed even when no eeprom is present.
240To ensure a good write you must read back and verify the data.
241It is
242.Em not
243necessary to erase before writing.
244Any position within the eeprom can be overwritten at any time.
245.It Dv UFTDIIOC_ERASE_EEPROM Pq Vt int
246Erase the entire eeprom.
247This is useful primarily for test and debugging, as there is no
248need to erase before writing.
249To help prevent accidental erasure caused by calling the wrong
250ioctl, you must pass the special value
251.Dv UFTDI_CONFIRM_ERASE
252as the argument to this ioctl.
253.El
254.Sh FILES
255.Bl -tag -width "/dev/ttyU*.init" -compact
256.It Pa /dev/ttyU*
257for callin ports
258.It Pa /dev/ttyU*.init
259.It Pa /dev/ttyU*.lock
260corresponding callin initial-state and lock-state devices
261.Pp
262.It Pa /dev/cuaU*
263for callout ports
264.It Pa /dev/cuaU*.init
265.It Pa /dev/cuaU*.lock
266corresponding callout initial-state and lock-state devices
267.El
268.Sh SEE ALSO
269.Xr cu 1 ,
270.Xr tty 4 ,
271.Xr ucom 4 ,
272.Xr usb 4
273.Sh HISTORY
274The
275.Nm
276driver appeared in
277.Fx 4.8
278from
279.Nx 1.5 .
280