1.\" Copyright (c) 1998, Nicolas Souchu 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.\" 26.Dd March 5, 1998 27.Dt PPC 4 28.Os FreeBSD 29.Sh NAME 30.Nm ppc 31.Nd 32Parallel port chipset driver 33.Sh SYNOPSIS 34.Cd "controller ppc0 at isa? port? tty irq 7" 35.Pp 36For one or more PPBUS busses: 37.Cd "controller ppbus at ppc0" 38.Sh DESCRIPTION 39The 40.Em ppc 41driver provides low level support to various parallel port chipsets for the 42.Xr ppbus 4 43system. 44.Pp 45During the probe phasis, ppc detects parallel port chipsets and initialize 46private data according to their operating mode: COMPATIBLE, 47NIBBLE, PS/2, EPP, ECP and other mixed modes. If a mode is provided at startup 48throw the flags variable of the boot interface, the operating mode of the 49chipset is forced according to 'flags' and its available modes. 50.Pp 51During attach phasis, ppc allocates a ppbus structure, initializes it and 52calls ppbus attach function. 53.Ss Supported flags 54.Bl -item -offset indent 55.It 56bits 0-4: chipset forced mode(s) 57.Bd -literal 58PPB_COMPATIBLE 0x0 /* Centronics compatible mode */ 59PPB_NIBBLE 0x1 /* reverse 4 bit mode */ 60PPB_PS2 0x2 /* PS/2 byte mode */ 61PPB_EPP 0x4 /* EPP mode, 32 bit */ 62PPB_ECP 0x8 /* ECP mode */ 63.Ed 64.Pp 65And any mixed values. 66.It 67bit 5: EPP protocol (0 EPP 1.9, 1 EPP 1.7) 68.It 69bit 6: activate IRQ (1 IRQ disabled, 0 IRQ enabled) 70.El 71.Ss Supported chipsets 72Some parallel port chipsets are explicitly supported by ppc: detection and 73initialisation code has been written according to specs datasheets. 74.Bl -bullet -offset indent 75.It 76SMC FDC37C665GT and FDC37C666GT chipsets 77.It 78Natsemi PC873xx-family (PC87332 and PC87306) 79.It 80Winbond W83877xx-family (W83877F and W83877AF) 81.It 82SMC-like chipsets with mixed modes (see 83.Xr ppbus 4 ) 84.El 85.Ss Adding support to a new chipset 86You may want to add support for the newest chipset your last motherboard was 87sold with? For the ISA bus, just retrieve the specs of the chipset and 88write the corresponding 89.Fn ppc_mychipset_detect "" 90function. 91Then add an entry to the general purpose 92.Fn ppc_detect "" 93function. 94.Pp 95Your 96.Fn ppc_mychipset_detect "" 97function should ensure that: if the mode field of the 98.Va flags 99boot variable is not null, then the operating 100mode is forced to the given mode and no other mode is available and 101ppb->ppb_avm field contains the available modes of the chipset 102.Sh SEE ALSO 103.Xr ppbus 4 104.Sh HISTORY 105The 106.Nm 107manual page first appeared in 108.Fx 3.0 . 109.Sh AUTHOR 110This 111manual page was written by 112.An Nicolas Souchu . 113