1.\" Copyright (c) 2005 Christian Brueffer 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.\" $FreeBSD$ 26.\" 27.Dd July 29, 2020 28.Dt PADLOCK 4 29.Os 30.Sh NAME 31.Nm padlock 32.Nd "driver for the cryptographic functions and RNG in VIA C3, C7 and Eden processors" 33.Sh SYNOPSIS 34To compile this driver into the kernel, 35place the following lines in your 36kernel configuration file: 37.Bd -ragged -offset indent 38.Cd "device crypto" 39.Cd "device padlock" 40.Ed 41.Pp 42Alternatively, to load the driver as a 43module at boot time, place the following line in 44.Xr loader.conf 5 : 45.Bd -literal -offset indent 46padlock_load="YES" 47.Ed 48.Sh DESCRIPTION 49The C3 and Eden processor series from VIA include hardware acceleration for 50AES. 51The C7 series includes hardware acceleration for AES, SHA1, SHA256 and RSA. 52All of the above processor series include a hardware random number generator. 53.Pp 54The 55.Nm 56driver registers itself to accelerate AES operations and, if available, HMAC/SHA1 57and HMAC/SHA256 for 58.Xr crypto 4 . 59It also registers itself to accelerate other HMAC algorithms, although 60there is no hardware acceleration for those algorithms. 61This is only needed so 62.Nm 63can work with 64.Xr ipsec 4 . 65.Pp 66The hardware random number generator supplies data for the kernel 67.Xr random 4 68subsystem. 69.Sh SEE ALSO 70.Xr crypt 3 , 71.Xr crypto 4 , 72.Xr intro 4 , 73.Xr ipsec 4 , 74.Xr random 4 , 75.Xr crypto 7 , 76.Xr crypto 9 77.Sh HISTORY 78The 79.Nm 80driver first appeared in 81.Ox . 82The first 83.Fx 84release to include it was 85.Fx 6.0 . 86.Sh AUTHORS 87.An -nosplit 88The 89.Nm 90driver with AES encryption support was written by 91.An Jason Wright Aq Mt jason@OpenBSD.org . 92It was ported to 93.Fx 94and then extended to support SHA1 and SHA256 95by 96.An Pawel Jakub Dawidek Aq Mt pjd@FreeBSD.org . 97This manual page was written by 98.An Christian Brueffer Aq Mt brueffer@FreeBSD.org . 99