1.\" 2.\" Copyright (c) 2012-2016 Intel Corporation 3.\" All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions, and the following disclaimer, 10.\" without modification. 11.\" 2. Redistributions in binary form must reproduce at minimum a disclaimer 12.\" substantially similar to the "NO WARRANTY" disclaimer below 13.\" ("Disclaimer") and any redistribution must be conditioned upon 14.\" including a substantially similar Disclaimer requirement for further 15.\" binary redistribution. 16.\" 17.\" NO WARRANTY 18.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19.\" "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20.\" LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 21.\" A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22.\" HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27.\" IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGES. 29.\" 30.\" nvme driver man page. 31.\" 32.\" Author: Jim Harris <jimharris@FreeBSD.org> 33.\" 34.\" $FreeBSD$ 35.\" 36.Dd January 7, 2016 37.Dt NVME 4 38.Os 39.Sh NAME 40.Nm nvme 41.Nd NVM Express core driver 42.Sh SYNOPSIS 43To compile this driver into your kernel, 44place the following line in your kernel configuration file: 45.Bd -ragged -offset indent 46.Cd "device nvme" 47.Ed 48.Pp 49Or, to load the driver as a module at boot, place the following line in 50.Xr loader.conf 5 : 51.Bd -literal -offset indent 52nvme_load="YES" 53.Ed 54.Pp 55Most users will also want to enable 56.Xr nvd 4 57to surface NVM Express namespaces as disk devices which can be 58partitioned. 59Note that in NVM Express terms, a namespace is roughly equivalent to a 60SCSI LUN. 61.Sh DESCRIPTION 62The 63.Nm 64driver provides support for NVM Express (NVMe) controllers, such as: 65.Bl -bullet 66.It 67Hardware initialization 68.It 69Per-CPU IO queue pairs 70.It 71API for registering NVMe namespace consumers such as 72.Xr nvd 4 73.It 74API for submitting NVM commands to namespaces 75.It 76Ioctls for controller and namespace configuration and management 77.El 78.Pp 79The 80.Nm 81driver creates controller device nodes in the format 82.Pa /dev/nvmeX 83and namespace device nodes in 84the format 85.Pa /dev/nvmeXnsY . 86Note that the NVM Express specification starts numbering namespaces at 1, 87not 0, and this driver follows that convention. 88.Sh CONFIGURATION 89By default, 90.Nm 91will create an I/O queue pair for each CPU, provided enough MSI-X vectors 92and NVMe queue pairs can be allocated. 93If not enough vectors or queue 94pairs are available, nvme(4) will use a smaller number of queue pairs and 95assign multiple CPUs per queue pair. 96.Pp 97To force a single I/O queue pair shared by all CPUs, set the following 98tunable value in 99.Xr loader.conf 5 : 100.Bd -literal -offset indent 101hw.nvme.per_cpu_io_queues=0 102.Ed 103.Pp 104To assign more than one CPU per I/O queue pair, thereby reducing the number 105of MSI-X vectors consumed by the device, set the following tunable value in 106.Xr loader.conf 5 : 107.Bd -literal -offset indent 108hw.nvme.min_cpus_per_ioq=X 109.Ed 110.Pp 111To force legacy interrupts for all 112.Nm 113driver instances, set the following tunable value in 114.Xr loader.conf 5 : 115.Bd -literal -offset indent 116hw.nvme.force_intx=1 117.Ed 118.Pp 119Note that use of INTx implies disabling of per-CPU I/O queue pairs. 120.Sh SYSCTL VARIABLES 121The following controller-level sysctls are currently implemented: 122.Bl -tag -width indent 123.It Va dev.nvme.0.num_cpus_per_ioq 124(R) Number of CPUs associated with each I/O queue pair. 125.It Va dev.nvme.0.int_coal_time 126(R/W) Interrupt coalescing timer period in microseconds. 127Set to 0 to disable. 128.It Va dev.nvme.0.int_coal_threshold 129(R/W) Interrupt coalescing threshold in number of command completions. 130Set to 0 to disable. 131.El 132.Pp 133The following queue pair-level sysctls are currently implemented. 134Admin queue sysctls take the format of dev.nvme.0.adminq and I/O queue sysctls 135take the format of dev.nvme.0.ioq0. 136.Bl -tag -width indent 137.It Va dev.nvme.0.ioq0.num_entries 138(R) Number of entries in this queue pair's command and completion queue. 139.It Va dev.nvme.0.ioq0.num_tr 140(R) Number of nvme_tracker structures currently allocated for this queue pair. 141.It Va dev.nvme.0.ioq0.num_prp_list 142(R) Number of nvme_prp_list structures currently allocated for this queue pair. 143.It Va dev.nvme.0.ioq0.sq_head 144(R) Current location of the submission queue head pointer as observed by 145the driver. 146The head pointer is incremented by the controller as it takes commands off 147of the submission queue. 148.It Va dev.nvme.0.ioq0.sq_tail 149(R) Current location of the submission queue tail pointer as observed by 150the driver. 151The driver increments the tail pointer after writing a command 152into the submission queue to signal that a new command is ready to be 153processed. 154.It Va dev.nvme.0.ioq0.cq_head 155(R) Current location of the completion queue head pointer as observed by 156the driver. 157The driver increments the head pointer after finishing 158with a completion entry that was posted by the controller. 159.It Va dev.nvme.0.ioq0.num_cmds 160(R) Number of commands that have been submitted on this queue pair. 161.It Va dev.nvme.0.ioq0.dump_debug 162(W) Writing 1 to this sysctl will dump the full contents of the submission 163and completion queues to the console. 164.El 165.Sh SEE ALSO 166.Xr nvd 4 , 167.Xr pci 4 , 168.Xr nvmecontrol 8 , 169.Xr disk 9 170.Sh HISTORY 171The 172.Nm 173driver first appeared in 174.Fx 9.2 . 175.Sh AUTHORS 176.An -nosplit 177The 178.Nm 179driver was developed by Intel and originally written by 180.An Jim Harris Aq Mt jimharris@FreeBSD.org , 181with contributions from 182.An Joe Golio 183at EMC. 184.Pp 185This man page was written by 186.An Jim Harris Aq Mt jimharris@FreeBSD.org . 187