xref: /freebsd/share/man/man4/mvs.4 (revision 3f0164abf32b9b761e0a2cb4bdca3a8b84f156d4)
1.\" Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org>
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25.\" $FreeBSD$
26.\"
27.Dd March 3, 2013
28.Dt MVS 4
29.Os
30.Sh NAME
31.Nm mvs
32.Nd Marvell Serial ATA Host Controller driver
33.Sh SYNOPSIS
34To compile this driver into the kernel,
35place the following lines in your
36kernel configuration file:
37.Bd -ragged -offset indent
38.Cd "device pci"
39.Cd "device scbus"
40.Cd "device mvs"
41.Ed
42.Pp
43Alternatively, to load the driver as a
44module at boot time, place the following line in
45.Xr loader.conf 5 :
46.Bd -literal -offset indent
47mvs_load="YES"
48.Ed
49.Pp
50The following tunables are settable from the
51.Xr loader 8 :
52.Bl -ohang
53.It Va hint.mvs. Ns Ar X Ns Va .msi
54controls Message Signaled Interrupts (MSI) usage by the specified controller.
55.It Va hint.mvs. Ns Ar X Ns Va .ccc
56controls Command Completion Coalescing (CCC) usage by the specified controller.
57Non-zero value enables CCC and defines maximum time (in us), request can wait
58for interrupt.
59CCC reduces number of context switches on systems with many parallel requests,
60but it can decrease disk performance on some workloads due to additional
61command latency.
62.It Va hint.mvs. Ns Ar X Ns Va .cccc
63defines number of completed commands for CCC, which trigger interrupt without
64waiting for specified coalescing timeout.
65.It Va hint.mvsch. Ns Ar X Ns Va .pm_level
66controls SATA interface Power Management for the specified channel,
67allowing some power to be saved at the cost of additional command
68latency.
69Possible values:
70.Pp
71.Bl -tag -width 4n -offset indent -compact
72.It 0
73interface Power Management is disabled (default);
74.It 1
75device is allowed to initiate PM state change, host is passive;
76.It 4
77driver initiates PARTIAL PM state transition 1ms after port becomes idle;
78.It 5
79driver initiates SLUMBER PM state transition 125ms after port becomes idle.
80.El
81.Pp
82Note that interface Power Management is not compatible with
83device presence detection.
84A manual bus reset is needed on device hot-plug.
85.It Va hint.mvsch. Ns Ar X Ns Va .sata_rev
86setting to nonzero value limits maximum SATA revision (speed).
87Values 1, 2 and 3 are respectively 1.5, 3 and 6Gbps.
88.El
89.Sh DESCRIPTION
90This driver provides the
91.Xr CAM 4
92subsystem with native access to the
93.Tn SATA
94ports of several generations (Gen-I/II/IIe) of Marvell SATA controllers.
95Each SATA port found is represented to CAM as a separate bus with one
96target, or, if HBA supports Port Multipliers (Gen-II/IIe), 16 targets.
97Most of the bus-management details are handled by the SATA-specific
98transport of CAM.
99Connected ATA disks are handled by the ATA protocol disk peripheral driver
100.Xr ada 4 .
101ATAPI devices are handled by the SCSI protocol peripheral drivers
102.Xr cd 4 ,
103.Xr da 4 ,
104.Xr sa 4 ,
105etc.
106.Pp
107Driver features include support for Serial ATA and ATAPI devices,
108Port Multipliers (including FIS-based switching, when supported),
109hardware command queues (up to 31 command per port),
110Native Command Queuing, SATA interface Power Management, device hot-plug
111and Message Signaled Interrupts.
112.Pp
113The same hardware is also supported by the atamarvell and ataadaptec
114drivers from the
115.Xr ata 4
116subsystem.
117If both drivers are loaded at the same time, this one will be
118given precedence as the more functional of the two.
119.Sh HARDWARE
120The
121.Nm
122driver supports the following controllers:
123.Pp
124Gen-I (SATA 1.5Gbps):
125.Bl -bullet -compact -offset "xxxxxx"
126.It
12788SX5040
128.It
12988SX5041
130.It
13188SX5080
132.It
13388SX5081
134.El
135.Pp
136Gen-II (SATA 3Gbps, NCQ, PMP):
137.Bl -bullet -compact -offset "xxxxxx"
138.It
13988SX6040
140.It
14188SX6041 (including Adaptec 1420SA)
142.It
14388SX6080
144.It
14588SX6081
146.El
147.Pp
148Gen-IIe (SATA 3Gbps, NCQ, PMP with FBS):
149.Bl -bullet -compact -offset "xxxxxx"
150.It
15188SX6042
152.It
15388SX7042 (including Adaptec 1430SA)
154.It
15588F5182 SoC
156.It
15788F6281 SoC
158.It
159MV78100 SoC
160.El
161.Pp
162Note, that this hardware supports command queueing and FIS-based switching
163only for ATA DMA commands.
164ATAPI and non-DMA ATA commands executed one by one for each port.
165.Sh SEE ALSO
166.Xr ada 4 ,
167.Xr ata 4 ,
168.Xr cam 4 ,
169.Xr cd 4 ,
170.Xr da 4 ,
171.Xr sa 4
172.Sh HISTORY
173The
174.Nm
175driver first appeared in
176.Fx 8.1 .
177.Sh AUTHORS
178.An Alexander Motin Aq mav@FreeBSD.org
179