1.\" Copyright (c) 2000-2002 2.\" Diomidis D. Spinellis, Athens, Greece 3.\" All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer as 10.\" the first lines of this file unmodified. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 15.\" THIS SOFTWARE IS PROVIDED BY Diomidis D. Spinellis ``AS IS'' AND ANY 16.\" EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Diomidis D. Spinellis BE 19.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 22.\" BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23.\" WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 24.\" OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 25.\" EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26.\" 27.Dd January 14, 2005 28.Dt PBIO 4 i386 29.Os 30.Sh NAME 31.Nm pbio 32.Nd 8255 parallel peripheral interface basic 33.Tn I/O 34driver 35.Sh SYNOPSIS 36.Cd "device pbio" 37.Pp 38In 39.Pa /boot/device.hints : 40.Cd hint.pbio.0.at="isa" 41.Cd hint.pbio.0.port="0x360" 42.Pp 43.In dev/pbio/pbioio.h 44.Sh DESCRIPTION 45The 46.Nm 47driver supports direct access to the Intel 8255A programmable 48peripheral interface (PPI) chip running in mode 0 (simple 49.Tn I/O ) . 50Such an interface provides 24 digital 51.Tn I/O 52lines. 53The driver is designed for performing 54.Tn I/O 55under program control using 56peripherals such as the 57.Tn Advantech 58.Tn PCL-724 59card, which emulates the Intel 8255A PPI in mode 0. 60Other 8255A-based peripherals such as the 61.Tn BMC 62Messsysteme 63.Tn PIO24II 64card have also been reported to work. 65.Pp 66The PPI provides two 8-bit ports (port A and port B) and 67two 4-bit ports (port C upper, port C lower). 68Each port can be individually programmed for input and 69(latched) output, 70and appears at a different offset of the device's base 71.Tn I/O 72address. 73.Pp 74A separate register allows the configuration of ports for input 75or output. 76The device is so simple, that reliably probing for it when 77input data arrives at its terminals is impossible; 78therefore the kernel configuration has to specify the 79device's base address. 80The device driver provides four character devices that 81correspond to the peripheral's 82.Tn I/O 83ports. 84Opening a device for read or write automatically configures 85the corresponding hardware port for input or output. 86At boot time all ports are set configured for input to avoid damaging 87external circuitry. 88.Pp 89A set of 90.Xr ioctl 2 91requests allow polled input and paced output to be 92efficiently performed at the driver level without expensive 93user/kernel context switching. 94The driver can perform 95.Tn I/O 96in three different ways: 97.Bl -tag -width ".No Differential" 98.It Basic 99The read or write operation returns immediately after reading 100or writing the data to the port at bus speed. 101.It Paced 102Data is transferred from or to the port at intervals specified 103by a separate 104.Xr ioctl 2 105call. 106.It Differential 107(Input only.) 108Only port values that differ from the previous port value are returned. 109.El 110.Pp 111The pacing interval is specified in 112.Em Hz 113unit increments. 114Setting a pace of 115.Ar n 116seconds 117will result in no more than one value being read or written every 118.Ar n 119seconds. 120Single byte read/write operations will take at least 121.Ar n 122seconds to complete. 123.Pp 124The following 125.Xr ioctl 2 126calls are supported: 127.Bl -tag -width ".Dv PBIO_SETIPACE" 128.It Dv PBIO_SETDIFF 129accepts a pointer to an integer as the third argument, 130and sets the driver for differential input if the integer is non-zero. 131The input pace speed determines the periodic interval the driver will use to 132examine the port for a changed value. 133.It Dv PBIO_GETDIFF 134accepts a pointer to an integer as the third argument, 135and sets the integer to the last set value for differential input. 136.It Dv PBIO_SETIPACE 137accepts a pointer to an integer as the third argument, 138and sets the driver's input pacing speed to the value of that integer. 139.It Dv PBIO_GETIPACE 140accepts a pointer to an integer as the third argument, 141and sets the integer to the last set value for the input pace. 142.It Dv PBIO_SETOPACE 143accepts a pointer to an integer as the third argument, 144and sets the driver's output pacing speed to the value of that integer. 145.It Dv PBIO_GETOPACE 146accepts a pointer to an integer as the third argument, 147and sets the integer to the last set value for the output pace. 148.El 149.Sh FILES 150.Bl -tag -width ".Pa /dev/pbio0ch" -compact 151.It Pa /dev/pbio0a 152Port A (8 bit 153.Tn I/O ) . 154.It Pa /dev/pbio0b 155Port B (8 bit 156.Tn I/O ) . 157.It Pa /dev/pbio0ch 158Port C upper (4 bit 159.Tn I/O ) . 160.It Pa /dev/pbio0cl 161Port C lower (4 bit 162.Tn I/O ) . 163.El 164.Sh SEE ALSO 165.Rs 166.%A "Diomidis Spinellis" 167.%T "The information furnace: Consolidated home control" 168.%D "2003" 169.%J "Personal and Ubiquitous Computing" 170.%N 1 171.%V 7 172.%P "53-69" 173.Re 174.Sh HISTORY 175The 176.Nm 177device was first used under 178.Fx 4.1 . 179.Sh AUTHORS 180.An Diomidis D. Spinellis Aq Mt dds@aueb.gr 181.Sh BUGS 182One of the 183.Tn PCL-724 184card's inputs can optionally be wired to generate an interrupt. 185This feature is not supported. 186