1085a2b40SWarner Losh.\" Copyright (c) 2000-2002 2085a2b40SWarner Losh.\" Diomidis D. Spinellis, Athens, Greece 3085a2b40SWarner Losh.\" All rights reserved. 4085a2b40SWarner Losh.\" 5085a2b40SWarner Losh.\" Redistribution and use in source and binary forms, with or without 6085a2b40SWarner Losh.\" modification, are permitted provided that the following conditions 7085a2b40SWarner Losh.\" are met: 8085a2b40SWarner Losh.\" 1. Redistributions of source code must retain the above copyright 9085a2b40SWarner Losh.\" notice, this list of conditions and the following disclaimer as 10085a2b40SWarner Losh.\" the first lines of this file unmodified. 11085a2b40SWarner Losh.\" 2. Redistributions in binary form must reproduce the above copyright 12085a2b40SWarner Losh.\" notice, this list of conditions and the following disclaimer in the 13085a2b40SWarner Losh.\" documentation and/or other materials provided with the distribution. 14085a2b40SWarner Losh.\" 15085a2b40SWarner Losh.\" THIS SOFTWARE IS PROVIDED BY Diomidis D. Spinellis ``AS IS'' AND ANY 16085a2b40SWarner Losh.\" EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17085a2b40SWarner Losh.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18085a2b40SWarner Losh.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Diomidis D. Spinellis BE 19085a2b40SWarner Losh.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20085a2b40SWarner Losh.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21085a2b40SWarner Losh.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 22085a2b40SWarner Losh.\" BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23085a2b40SWarner Losh.\" WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 24085a2b40SWarner Losh.\" OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 25085a2b40SWarner Losh.\" EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26085a2b40SWarner Losh.\" 27085a2b40SWarner Losh.\" $FreeBSD$ 28085a2b40SWarner Losh.\" 29085a2b40SWarner Losh.Dd February 19, 2003 30085a2b40SWarner Losh.Dt PBIO 4 i386 31085a2b40SWarner Losh.Os 32085a2b40SWarner Losh.Sh NAME 33085a2b40SWarner Losh.Nm pbio 34085a2b40SWarner Losh.Nd 8255 parallel peripheral interface basic 35085a2b40SWarner Losh.Tn I/O 36085a2b40SWarner Loshdriver 37085a2b40SWarner Losh.Sh SYNOPSIS 38085a2b40SWarner Losh.Cd "device pbio0 at isa? port 0x360" 39085a2b40SWarner Losh.In machine/pbioio.h 40085a2b40SWarner Losh.Sh DESCRIPTION 41085a2b40SWarner LoshThe 42085a2b40SWarner Losh.Xr pbio 4 43085a2b40SWarner Loshdriver supports direct access to the Intel 8255A programmable 44085a2b40SWarner Loshperipheral interface (PPI) chip running in mode 0 (simple 45085a2b40SWarner Losh.Tn I/O ) . 46085a2b40SWarner LoshSuch an interface provides 24 digital 47085a2b40SWarner Losh.Tn I/O 48085a2b40SWarner Loshlines. 49085a2b40SWarner LoshThe driver is designed for performing 50085a2b40SWarner Losh.Tn I/O 51085a2b40SWarner Loshunder program control using 52085a2b40SWarner Loshperipherals such as the 53085a2b40SWarner Losh.Tn Advantech 54085a2b40SWarner Losh.Tn PCL-724 55085a2b40SWarner Loshcard, which emulates the Intel 8255A PPI in mode 0. 56085a2b40SWarner LoshOther 8255A-based peripherals such as the 57085a2b40SWarner Losh.Tn BMC 58085a2b40SWarner LoshMesssysteme 59085a2b40SWarner Losh.Tn PIO24II 60085a2b40SWarner Loshcard have also been reported to work. 61085a2b40SWarner Losh.Pp 62085a2b40SWarner LoshThe PPI provides two 8-bit ports (port A and port B) and 63085a2b40SWarner Loshtwo 4-bit ports (port C upper, port C lower). 64085a2b40SWarner LoshEach port can be individually programmed for input and 65085a2b40SWarner Losh(latched) output, 66085a2b40SWarner Loshand appears at a different offset of the device's base 67085a2b40SWarner Losh.Tn I/O 68085a2b40SWarner Loshaddress. 69085a2b40SWarner Losh.Pp 70085a2b40SWarner LoshA separate register allows the configuration of ports for input 71085a2b40SWarner Loshor output. 72085a2b40SWarner LoshThe device is so simple, that reliably probing for it when 73085a2b40SWarner Loshinput data arrives at its terminals is impossible; 74085a2b40SWarner Loshtherefore the kernel configuration has to specify the 75085a2b40SWarner Loshdevice's base address. 76085a2b40SWarner LoshThe device driver provides four character devices that 77085a2b40SWarner Loshcorrespond to the peripheral's 78085a2b40SWarner Losh.Tn I/O 79085a2b40SWarner Loshports. 80085a2b40SWarner LoshOpening a device for read or write, automatically configures 81085a2b40SWarner Loshthe corresponding hardware port for input or output. 82085a2b40SWarner LoshAt boot time all ports are set configured for input to avoid damaging 83085a2b40SWarner Loshexternal circuitry. 84085a2b40SWarner Losh.Pp 85085a2b40SWarner LoshA set of 86085a2b40SWarner Losh.Xr ioctl 2 87085a2b40SWarner Loshrequests allow polled input and paced output to be 88085a2b40SWarner Loshefficiently performed at the driver level without expensive 89085a2b40SWarner Loshuser/kernel context switching. 90085a2b40SWarner LoshThe driver can perform 91085a2b40SWarner Losh.Tn I/O 92085a2b40SWarner Loshin three different ways: 93085a2b40SWarner Losh.Bl -tag -width Differential 94085a2b40SWarner Losh.It Basic 95085a2b40SWarner LoshThe read or write operation returns immediately after reading 96085a2b40SWarner Loshor writing the data to the port at bus speed. 97085a2b40SWarner Losh.It Paced 98085a2b40SWarner LoshData is transferred from or to the port at intervals specified 99085a2b40SWarner Loshby a separate 100085a2b40SWarner Losh.Xr ioctl 2 101085a2b40SWarner Loshcall. 102085a2b40SWarner Losh.It Differential 103085a2b40SWarner Losh(Input only.) 104085a2b40SWarner LoshOnly port values that differ from the previous port value are returned. 105085a2b40SWarner Losh.El 106085a2b40SWarner Losh.Pp 107085a2b40SWarner LoshThe pacing interval is specified in 108085a2b40SWarner Losh.Em Hz 109085a2b40SWarner Loshunit increments. 110085a2b40SWarner LoshSetting a pace of 111085a2b40SWarner Losh.Sy n 112085a2b40SWarner Loshseconds 113085a2b40SWarner Loshwill result in no more than one value being read or written every 114085a2b40SWarner Losh.Sy n 115085a2b40SWarner Loshseconds. 116085a2b40SWarner LoshSingle byte read/write opeations will take at least 117085a2b40SWarner Losh.Sy n 118085a2b40SWarner Loshseconds to complete. 119085a2b40SWarner Losh.Pp 120085a2b40SWarner LoshThe following 121085a2b40SWarner Losh.Xr ioctl 2 122085a2b40SWarner Loshcalls are supported: 123085a2b40SWarner Losh.Bl -tag -width "PBIO_SETIPACE" 124085a2b40SWarner Losh.It Dv PBIO_SETDIFF 125085a2b40SWarner Loshaccepts a pointer to an integer as the third argument, 126085a2b40SWarner Loshand sets the driver for differential input if the integer is non-zero. 127085a2b40SWarner LoshThe input pace speed determines the periodic interval the driver will use to 128085a2b40SWarner Loshexamine the port for a changed value. 129085a2b40SWarner Losh.It Dv PBIO_GETDIFF 130085a2b40SWarner Loshaccepts a pointer to an integer as the third argument, 131085a2b40SWarner Loshand sets the integer to the last set value for differential input. 132085a2b40SWarner Losh.It Dv PBIO_SETIPACE 133085a2b40SWarner Loshaccepts a pointer to an integer as the third argument, 134085a2b40SWarner Loshand sets the driver's input pacing speed to the value of that integer. 135085a2b40SWarner Losh.It Dv PBIO_GETIPACE 136085a2b40SWarner Loshaccepts a pointer to an integer as the third argument, 137085a2b40SWarner Loshand sets the integer to the last set value for the input pace. 138085a2b40SWarner Losh.It Dv PBIO_SETOPACE 139085a2b40SWarner Loshaccepts a pointer to an integer as the third argument, 140085a2b40SWarner Loshand sets the driver's output pacing speed to the value of that integer. 141085a2b40SWarner Losh.It Dv PBIO_GETOPACE 142085a2b40SWarner Loshaccepts a pointer to an integer as the third argument, 143085a2b40SWarner Loshand sets the integer to the last set value for the output pace. 144085a2b40SWarner Losh.El 145085a2b40SWarner Losh.Sh FILES 146085a2b40SWarner Losh.Bl -tag -width "/dev/pbioxxx" 147085a2b40SWarner Losh.It Pa /dev/pbio0a 148085a2b40SWarner LoshPort A (8 bit 149085a2b40SWarner Losh.Tn I/O ) . 150085a2b40SWarner Losh.It Pa /dev/pbio0b 151085a2b40SWarner LoshPort B (8 bit 152085a2b40SWarner Losh.Tn I/O ) . 153085a2b40SWarner Losh.It Pa /dev/pbio0ch 154085a2b40SWarner LoshPort C upper (4 bit 155085a2b40SWarner Losh.Tn I/O ) . 156085a2b40SWarner Losh.It Pa /dev/pbio0cl 157085a2b40SWarner LoshPort C lower (4 bit 158085a2b40SWarner Losh.Tn I/O ) . 159085a2b40SWarner Losh.El 160085a2b40SWarner Losh.Sh SEE ALSO 161085a2b40SWarner Losh.Rs 162085a2b40SWarner Losh.%A "Diomidis Spinellis" 163085a2b40SWarner Losh.%T "The information furnace: Consolidated home control" 164085a2b40SWarner Losh.%D "2003" 165085a2b40SWarner Losh.%J "Personal and Ubiquitous Computing" 166085a2b40SWarner Losh.%N 1 167085a2b40SWarner Losh.%V 7 168085a2b40SWarner Losh.%P "53-69" 169085a2b40SWarner Losh.Re 170085a2b40SWarner Losh.Sh HISTORY 171085a2b40SWarner LoshThe 172085a2b40SWarner Losh.Nm 173085a2b40SWarner Loshdevice was first used under 174085a2b40SWarner Losh.Fx 4.1 . 175085a2b40SWarner Losh.Sh AUTHOR 176085a2b40SWarner Losh.An "Diomidis D. Spinellis" Aq dds@aueb.gr 177085a2b40SWarner Losh.Sh BUGS 178085a2b40SWarner LoshOne of the 179085a2b40SWarner Losh.Tn PCL-724 180085a2b40SWarner Loshcard's inputs can optionally be wired to generate an interrupt. 181085a2b40SWarner LoshThis feature is not supported. 182