1.\" Copyright (c) 2003 Poul-Henning Kamp <phk@FreeBSD.org> 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.Dd November 23, 2003 26.Dt CPU_ELAN 4 i386 27.Os 28.Sh NAME 29.Nm CPU_ELAN 30.Nd AMD Elan 520 CPU support 31.Sh SYNOPSIS 32.Cd "options CPU_ELAN" 33.Cd "options CPU_ELAN_PPS" 34.Cd "options CPU_ELAN_XTAL" 35.Bl -item -compact 36.It 37.Va machdep.elan_gpio_config 38.It 39.Va machdep.elan_freq 40.El 41.Cd "options CPU_SOEKRIS" 42.Sh DESCRIPTION 43The 44.Cd "options CPU_ELAN" 45enables support for the AMD Elan 520 CPU. 46.Pp 47A device 48.Pa /dev/elan-mmcr 49exports the MMCR register bank to userland 50using 51.Xr mmap 2 . 52.Pp 53The 54.Tn i8254 55timer will be adjusted to the slightly unorthodox 56frequency 1189161 Hz (32768 * 45 * 25 / 31) employed by the Elan. 57.Pp 58A timecounter named 59.Dq Li ELAN 60is implemented using the general purpose timer 2, 61but it will not be usable unless HZ is configured at 150 or higher. 62This timecounter is much better than the 63.Dq Li i8254 64timecounter and should be 65used at all times. 66.Pp 67The 68.Va machdep.elan_gpio_config 69.Xr sysctl 8 70variable 71enables configuration of the GPIO pins of the CPU. 72The string must be exactly 32 characters long. 73A 74.Ql - 75means the GPIO is unavailable. 76A 77.Ql l 78(lower-case ell) configures a 79.Xr led 4 80device (active low). 81A 82.Ql L 83configures a 84.Xr led 4 85device (active high). 86A 87.Ql \&. 88means no configuration for this GPIO. 89These 90.Xr led 4 91devices will be named 92.Pa /dev/led/gpio%d . 93For meaning of 94.Ql P , 95.Ql e 96and 97.Ql E , 98see under 99.Cd "options CPU_ELAN_PPS" . 100.Pp 101The 102.Cd "options CPU_ELAN_XTAL" 103and the 104.Va machdep.elan_freq 105.Xr sysctl 8 106variable 107can be used to set the CPU clock crystal frequency in Hz. 108The default is 33333333 Hz. 109.Pp 110The 111.Cd "options CPU_ELAN_PPS" 112enables precision timestamping using the RFC2783 PPS-API via the 113.Pa /dev/elan-mmcr 114device. 115The resolution will be approximately 125 nsec 116and the precision \(+- 125 nsec. 117(For 125 nsec read 118.Dq "4 / CPU clock crystal frequency" . ) 119.Pp 120The input signal must be connected to the TMR1IN pin and 121a GPIO pin. 122The GPIO pin must be configured with a 123.Ql P 124in 125.Va machdep.elan_gpio_config . 126.Pp 127In addition, one GPIO pin can be configured with either 128.Ql e 129(active low) 130or 131.Ql E 132(active high) to become a 133.Dq echo 134output of the input signal. 135Please notice that this signal is not suitable for calibration. 136.Pp 137If the 138.Cd "options CPU_SOEKRIS" 139is given, the support will additionally be tailored to the 140Soekris Engineering 45xx series of embedded computers. 141The 142.Dq error 143led will be configured (as 144.Pa /dev/led/error ) 145and the GPIO pins which are not 146available will be disabled. 147.Sh SEE ALSO 148.Xr led 4 , 149.Xr timecounters 4 , 150.Xr sysctl 8 151.Sh HISTORY 152The 153.Nm 154code first appeared in 155.Fx 4.7 . 156.Sh AUTHORS 157.An Poul-Henning Kamp Aq Mt phk@FreeBSD.org 158