xref: /freebsd/share/man/man4/man4.arm/ti_adc.4 (revision 924226fba12cc9a228c73b956e1b7fa24c60b055)
1.\"
2.\" Copyright (c) 2014 Luiz Otavio O Souza <loos@freebsd.org>
3.\" All rights reserved.
4.\"
5.\" Redistribution and use in source and binary forms, with or without
6.\" modification, are permitted provided that the following conditions
7.\" are met:
8.\" 1. Redistributions of source code must retain the above copyright
9.\"    notice, this list of conditions and the following disclaimer.
10.\" 2. Redistributions in binary form must reproduce the above copyright
11.\"    notice, this list of conditions and the following disclaimer in the
12.\"    documentation and/or other materials provided with the distribution.
13.\"
14.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24.\"
25.\" $FreeBSD$
26.\"
27.Dd June 1, 2014
28.Dt TI_ADC 4
29.Os
30.Sh NAME
31.Nm ti_adc
32.Nd TI AM3XXX analog to digital converter driver
33.Sh SYNOPSIS
34.Cd "device ti_adc"
35.Sh DESCRIPTION
36The
37.Nm
38driver provides access to the AIN (analog inputs) on am3xxx SoCs.
39.Pp
40It provides raw readings of the converted values for each analog inputs.
41.Pp
42The access to
43.Nm
44data is made via the
45.Xr sysctl 8
46interface:
47.Bd -literal
48dev.ti_adc.0.%desc: TI ADC controller
49dev.ti_adc.0.%driver: ti_adc
50dev.ti_adc.0.%pnpinfo: name=adc@44E0D000 compat=ti,adc
51dev.ti_adc.0.%parent: simplebus0
52dev.ti_adc.0.clockdiv: 2400
53dev.ti_adc.0.ain.0.enable: 0
54dev.ti_adc.0.ain.0.open_delay: 0
55dev.ti_adc.0.ain.0.samples_avg: 0
56dev.ti_adc.0.ain.0.input: 0
57dev.ti_adc.0.ain.1.enable: 0
58dev.ti_adc.0.ain.1.open_delay: 0
59dev.ti_adc.0.ain.1.samples_avg: 0
60dev.ti_adc.0.ain.1.input: 0
61dev.ti_adc.0.ain.2.enable: 0
62dev.ti_adc.0.ain.2.open_delay: 0
63dev.ti_adc.0.ain.2.samples_avg: 0
64dev.ti_adc.0.ain.2.input: 0
65dev.ti_adc.0.ain.3.enable: 0
66dev.ti_adc.0.ain.3.open_delay: 0
67dev.ti_adc.0.ain.3.samples_avg: 0
68dev.ti_adc.0.ain.3.input: 0
69dev.ti_adc.0.ain.4.enable: 0
70dev.ti_adc.0.ain.4.open_delay: 0
71dev.ti_adc.0.ain.4.samples_avg: 0
72dev.ti_adc.0.ain.4.input: 0
73dev.ti_adc.0.ain.5.enable: 0
74dev.ti_adc.0.ain.5.open_delay: 0
75dev.ti_adc.0.ain.5.samples_avg: 0
76dev.ti_adc.0.ain.5.input: 0
77dev.ti_adc.0.ain.6.enable: 1
78dev.ti_adc.0.ain.6.open_delay: 0
79dev.ti_adc.0.ain.6.samples_avg: 4
80dev.ti_adc.0.ain.6.input: 2308
81dev.ti_adc.0.ain.7.enable: 1
82dev.ti_adc.0.ain.7.open_delay: 0
83dev.ti_adc.0.ain.7.samples_avg: 0
84dev.ti_adc.0.ain.7.input: 3812
85.Ed
86.Pp
87On Beaglebone-black the analog input 7 is connected to the 3V3B rail through
88a voltage divisor (2:1).
89The 3V3B voltage rail comes from the TL5209 LDO regulator which is limited
90to 500mA maximum.
91.Pp
92Global settings:
93.Bl -tag -width ".Va dev.ti_adc.0.clockdiv"
94.It Va dev.ti_adc.0.clockdiv
95Sets the ADC clock prescaler.
96The minimum value is 10 and the maximum is 65535.
97The ADC clock is based on CLK_M_OSC (24Mhz) / clockdiv.
98This gives a maximum of ~2.4Mhz for the ADC clock and ~10Khz for the default
99setting (clockdiv = 2400).
100.El
101.Pp
102Settings per input:
103.Bl -tag -width ".Va dev.ti_adc.0.ain.%d.samples_avg"
104.It Va dev.ti_adc.0.ain.%d.enable
105Enable the conversion for the input.
106Each input should be individually enabled before it can be used.
107When all the inputs are disabled, the ADC is turned off.
108.It Va dev.ti_adc.0.ain.%d.open_delay
109Sets the number of ADC clock cycles to wait after applying the input
110configuration and before start the ADC conversion.
111.It Va dev.ti_adc.0.ain.%d.samples_avg
112Sets the number of samples average used on each input, it can be set to 0
113(no samples average), 2, 4, 8, or 16.
114.It Va dev.ti_adc.0.ain.%d.input
115Is the converted raw value of the voltage applied on the analog input.
116It is made of a 12 bit value (0 ~ 4095).
117.El
118.Sh SEE ALSO
119.Xr sysctl 8
120.Sh HISTORY
121The
122.Nm
123driver first appeared in
124.Fx 10.1 .
125.Sh AUTHORS
126.An -nosplit
127The driver and this manual page was written by
128.An Luiz Otavio O Souza Aq Mt loos@FreeBSD.org .
129