1cdcd52d4SBartosz Sobczak.\" Copyright(c) 2016 - 2022 Intel Corporation 2cdcd52d4SBartosz Sobczak.\" All rights reserved. 3cdcd52d4SBartosz Sobczak.\" 4cdcd52d4SBartosz Sobczak.\" This software is available to you under a choice of one of two 5cdcd52d4SBartosz Sobczak.\" licenses. You may choose to be licensed under the terms of the GNU 6cdcd52d4SBartosz Sobczak.\" General Public License (GPL) Version 2, available from the file 7cdcd52d4SBartosz Sobczak.\" COPYING in the main directory of this source tree, or the 8cdcd52d4SBartosz Sobczak.\" OpenFabrics.org BSD license below: 9cdcd52d4SBartosz Sobczak.\" 10cdcd52d4SBartosz Sobczak.\" Redistribution and use in source and binary forms, with or 11cdcd52d4SBartosz Sobczak.\" without modification, are permitted provided that the following 12cdcd52d4SBartosz Sobczak.\" conditions are met: 13cdcd52d4SBartosz Sobczak.\" 14cdcd52d4SBartosz Sobczak.\" - Redistributions of source code must retain the above 15cdcd52d4SBartosz Sobczak.\" copyright notice, this list of conditions and the following 16cdcd52d4SBartosz Sobczak.\" disclaimer. 17cdcd52d4SBartosz Sobczak.\" 18cdcd52d4SBartosz Sobczak.\" - Redistributions in binary form must reproduce the above 19cdcd52d4SBartosz Sobczak.\" copyright notice, this list of conditions and the following 20cdcd52d4SBartosz Sobczak.\" disclaimer in the documentation and/or other materials 21cdcd52d4SBartosz Sobczak.\" provided with the distribution. 22cdcd52d4SBartosz Sobczak.\" 23cdcd52d4SBartosz Sobczak.\" THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24cdcd52d4SBartosz Sobczak.\" EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25cdcd52d4SBartosz Sobczak.\" MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26cdcd52d4SBartosz Sobczak.\" NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27cdcd52d4SBartosz Sobczak.\" BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28cdcd52d4SBartosz Sobczak.\" ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29cdcd52d4SBartosz Sobczak.\" CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30cdcd52d4SBartosz Sobczak.\" SOFTWARE. 31cdcd52d4SBartosz Sobczak.\" 32cdcd52d4SBartosz Sobczak.Dd March 30, 2022 33cdcd52d4SBartosz Sobczak.Dt IRDMA 4 34cdcd52d4SBartosz Sobczak.Os 35cdcd52d4SBartosz Sobczak.Sh NAME 36cdcd52d4SBartosz Sobczak.Nm irdma 37cdcd52d4SBartosz Sobczak.Nd RDMA FreeBSD driver for Intel(R) Ethernet Controller E810 38cdcd52d4SBartosz Sobczak.Sh SYNOPSIS 39cdcd52d4SBartosz SobczakThis module relies on 40*777e472cSBartosz Sobczak.Xr ice 4 41*777e472cSBartosz Sobczak.Bl -tag -width indent 42cdcd52d4SBartosz Sobczak.It The following kernel options should be included in the configuration: 43cdcd52d4SBartosz Sobczak.Cd options OFED 44cdcd52d4SBartosz Sobczak.Cd options OFED_DEBUG_INIT 45cdcd52d4SBartosz Sobczak.Cd options COMPAT_LINUXKPI 46cdcd52d4SBartosz Sobczak.Cd options SDP 47cdcd52d4SBartosz Sobczak.Cd options IPOIB_CM 48cdcd52d4SBartosz Sobczak.El 49cdcd52d4SBartosz Sobczak.Sh DESCRIPTION 50cdcd52d4SBartosz Sobczak.Ss Features 51cdcd52d4SBartosz SobczakThe 52cdcd52d4SBartosz Sobczak.Nm 53*777e472cSBartosz Sobczakdriver provides RDMA protocol support on RDMA-capable Intel Ethernet 800 Series 54*777e472cSBartosz SobczakNICs which are supported by 55*777e472cSBartosz Sobczak.Xr ice 4 56cdcd52d4SBartosz Sobczak. 57cdcd52d4SBartosz Sobczak.Pp 58cdcd52d4SBartosz SobczakThe driver supports both iWARP and RoCEv2 protocols. 59cdcd52d4SBartosz Sobczak.Sh CONFIGURATION 60cdcd52d4SBartosz Sobczak.Ss TUNABLES 61cdcd52d4SBartosz SobczakTunables can be set at the 62cdcd52d4SBartosz Sobczak.Xr loader 8 63cdcd52d4SBartosz Sobczakprompt before booting the kernel or stored in 64cdcd52d4SBartosz Sobczak.Xr loader.conf 5 . 65cdcd52d4SBartosz Sobczak.Bl -tag -width indent 66cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.roce_enable 67cdcd52d4SBartosz Sobczakenables RoCEv2 protocol usage on <interface_numer> interface. 68*777e472cSBartosz Sobczak.Pp 69*777e472cSBartosz SobczakBy default RoCEv2 protocol is used. 70cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_cc_cfg_valid 71*777e472cSBartosz Sobczakindicates that all DCQCN parameters are valid and should be updated in 72*777e472cSBartosz Sobczakregisters or QP context. 73cdcd52d4SBartosz Sobczak.Pp 74cdcd52d4SBartosz SobczakSetting this parameter to 1 means that settings in 75cdcd52d4SBartosz Sobczak.Em dcqcn_min_dec_factor , dcqcn_min_rate_MBps , dcqcn_F , dcqcn_T , 76cdcd52d4SBartosz Sobczak.Em dcqcn_B, dcqcn_rai_factor, dcqcn_hai_factor, dcqcn_rreduce_mperiod 77*777e472cSBartosz Sobczakare taken into account. 78*777e472cSBartosz SobczakOtherwise default values are used. 79cdcd52d4SBartosz Sobczak.Pp 80cdcd52d4SBartosz SobczakNote: "roce_enable" must also be set for this tunable to take effect. 81cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_min_dec_factor 82*777e472cSBartosz SobczakThe minimum factor by which the current transmit rate can be changed when 83*777e472cSBartosz Sobczakprocessing a CNP. 84*777e472cSBartosz SobczakValue is given as a percentage (1-100). 85cdcd52d4SBartosz Sobczak.Pp 86*777e472cSBartosz SobczakNote: "roce_enable" and "dcqcn_cc_cfg_valid" must also be set for this tunable 87*777e472cSBartosz Sobczakto take effect. 88cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_min_rate_MBps 89cdcd52d4SBartosz SobczakThe minimum value, in Mbits per second, for rate to limit. 90cdcd52d4SBartosz Sobczak.Pp 91*777e472cSBartosz SobczakNote: "roce_enable" and "dcqcn_cc_cfg_valid" must also be set for this tunable 92*777e472cSBartosz Sobczakto take effect. 93cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_F 94cdcd52d4SBartosz SobczakThe number of times to stay in each stage of bandwidth recovery. 95cdcd52d4SBartosz Sobczak.Pp 96*777e472cSBartosz SobczakNote: "roce_enable" and "dcqcn_cc_cfg_valid" must also be set for this tunable 97*777e472cSBartosz Sobczakto take effect. 98cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_T 99*777e472cSBartosz SobczakThe number of microseconds that should elapse before increasing the CWND 100*777e472cSBartosz Sobczakin DCQCN mode. 101cdcd52d4SBartosz Sobczak.Pp 102*777e472cSBartosz SobczakNote: "roce_enable" and "dcqcn_cc_cfg_valid" must also be set for this tunable 103*777e472cSBartosz Sobczakto take effect. 104cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_B 105cdcd52d4SBartosz SobczakThe number of bytes to transmit before updating CWND in DCQCN mode. 106cdcd52d4SBartosz Sobczak.Pp 107*777e472cSBartosz SobczakNote: "roce_enable" and "dcqcn_cc_cfg_valid" must also be set for this tunable 108*777e472cSBartosz Sobczakto take effect. 109cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_rai_factor 110cdcd52d4SBartosz SobczakThe number of MSS to add to the congestion window in additive increase mode. 111cdcd52d4SBartosz Sobczak.Pp 112*777e472cSBartosz SobczakNote: "roce_enable" and "dcqcn_cc_cfg_valid" must also be set for this tunable 113*777e472cSBartosz Sobczakto take effect. 114cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_hai_factor 115cdcd52d4SBartosz SobczakThe number of MSS to add to the congestion window in hyperactive increase mode. 116cdcd52d4SBartosz Sobczak.Pp 117*777e472cSBartosz SobczakNote: "roce_enable" and "dcqcn_cc_cfg_valid" must also be set for this tunable 118*777e472cSBartosz Sobczakto take effect. 119cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_rreduce_mperiod 120*777e472cSBartosz SobczakThe minimum time between 2 consecutive rate reductions for a single flow. 121*777e472cSBartosz SobczakRate reduction will occur only if a CNP is received during the relevant time 122*777e472cSBartosz Sobczakinterval. 123cdcd52d4SBartosz Sobczak.Pp 124*777e472cSBartosz SobczakNote: "roce_enable" and "dcqcn_cc_cfg_valid" must also be set for this tunable 125*777e472cSBartosz Sobczakto take effect. 126*777e472cSBartosz Sobczak.El 127cdcd52d4SBartosz Sobczak.Ss SYSCTL PROCEDURES 128cdcd52d4SBartosz SobczakSysctl controls are available for runtime adjustments. 129cdcd52d4SBartosz Sobczak.Bl -tag -width indent 130cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.debug 131cdcd52d4SBartosz Sobczakdefines level of debug messages. 132cdcd52d4SBartosz Sobczak.Pp 133cdcd52d4SBartosz SobczakTypical value: 1 for errors only, 0x7fffffff for full debug. 134cdcd52d4SBartosz Sobczak.It Va dev.irdma<interface_number>.dcqcn_enable 135cdcd52d4SBartosz Sobczakenables the DCQCN algorithm for RoCEv2. 136cdcd52d4SBartosz Sobczak.Pp 137cdcd52d4SBartosz SobczakNote: "roce_enable" must also be set for this sysctl to take effect. 138cdcd52d4SBartosz Sobczak.Pp 139*777e472cSBartosz SobczakNote: The change may be set at any time, but it will be applied only to newly 140*777e472cSBartosz Sobczakcreated QPs. 141*777e472cSBartosz Sobczak.El 142cdcd52d4SBartosz Sobczak.Ss TESTING 143cdcd52d4SBartosz Sobczak.Bl -enum 144cdcd52d4SBartosz Sobczak.It 145cdcd52d4SBartosz SobczakTo load the irdma driver, run: 146*777e472cSBartosz Sobczak.Bd -literal -offset indent 147cdcd52d4SBartosz Sobczakkldload irdma 148*777e472cSBartosz Sobczak.Ed 149*777e472cSBartosz SobczakIf if_ice is not already loaded, the system will load it on its own. 150*777e472cSBartosz SobczakPlease check whether the value of sysctl 151cdcd52d4SBartosz Sobczak.Va hw.ice.irdma 152*777e472cSBartosz Sobczakis 1, if the irdma driver is not loading. 153*777e472cSBartosz SobczakTo change the value put: 154*777e472cSBartosz Sobczak.Bd -literal -offset indent 155cdcd52d4SBartosz Sobczakhw.ice.irdma=1 156*777e472cSBartosz Sobczak.Ed 157*777e472cSBartosz Sobczakin 158cdcd52d4SBartosz Sobczak.Pa /boot/loader.conf 159cdcd52d4SBartosz Sobczakand reboot. 160cdcd52d4SBartosz Sobczak.It 161cdcd52d4SBartosz SobczakTo check that the driver was loaded, run: 162*777e472cSBartosz Sobczak.Bd -literal -offset indent 163cdcd52d4SBartosz Sobczaksysctl -a | grep infiniband 164*777e472cSBartosz Sobczak.Ed 165cdcd52d4SBartosz SobczakTypically, if everything goes well, around 190 entries per PF will appear. 166cdcd52d4SBartosz Sobczak.It 167*777e472cSBartosz SobczakEach interface of the card may work in either iWARP or RoCEv2 mode. 168*777e472cSBartosz SobczakTo enable RoCEv2 compatibility, add: 169*777e472cSBartosz Sobczak.Bd -literal -offset indent 170cdcd52d4SBartosz Sobczakdev.irdma<interface_number>.roce_enable=1 171*777e472cSBartosz Sobczak.Ed 172cdcd52d4SBartosz Sobczakwhere <interface_number> is a desired ice interface number on which 173*777e472cSBartosz SobczakRoCEv2 protocol needs to be enabled, into: 174cdcd52d4SBartosz Sobczak.Pa /boot/loader.conf 175*777e472cSBartosz Sobczak, for instance: 176cdcd52d4SBartosz Sobczak.Bl -tag -width indent 177*777e472cSBartosz Sobczak.It dev.irdma0.roce_enable=0 178*777e472cSBartosz Sobczak.It dev.irdma1.roce_enable=1 179cdcd52d4SBartosz Sobczak.El 180*777e472cSBartosz Sobczakwill keep iWARP mode on ice0 and enable RoCEv2 mode on interface ice1. 181*777e472cSBartosz SobczakThe RoCEv2 mode is the default. 182*777e472cSBartosz Sobczak.Pp 183cdcd52d4SBartosz SobczakTo check irdma roce_enable status, run: 184*777e472cSBartosz Sobczak.Bd -literal -offset indent 185cdcd52d4SBartosz Sobczaksysctl dev.irdma<interface_number>.roce_enable 186*777e472cSBartosz Sobczak.Ed 187cdcd52d4SBartosz Sobczakfor instance: 188*777e472cSBartosz Sobczak.Bd -literal -offset indent 189cdcd52d4SBartosz Sobczaksysctl dev.irdma2.roce_enable 190*777e472cSBartosz Sobczak.Ed 191*777e472cSBartosz Sobczakwith returned value of '0' indicate the iWARP mode, and the value of '1' 192*777e472cSBartosz Sobczakindicate the RoCEv2 mode. 193cdcd52d4SBartosz Sobczak.Pp 194cdcd52d4SBartosz SobczakNote: An interface configured in one mode will not be able to connect 195cdcd52d4SBartosz Sobczakto a node configured in another mode. 196cdcd52d4SBartosz Sobczak.Pp 197cdcd52d4SBartosz SobczakNote: RoCEv2 has currently limited support, for functional testing only. 198cdcd52d4SBartosz SobczakDCB and Priority Flow Controller (PFC) are not currently supported which 199cdcd52d4SBartosz Sobczakmay lead to significant performance loss or connectivity issues. 200cdcd52d4SBartosz Sobczak.It 201cdcd52d4SBartosz SobczakEnable flow control in the ice driver: 202*777e472cSBartosz Sobczak.Bd -literal -offset indent 203cdcd52d4SBartosz Sobczaksysctl dev.ice.<interface_number>.fc=3 204*777e472cSBartosz Sobczak.Ed 205*777e472cSBartosz SobczakEnable flow control on the switch your system is connected to. 206*777e472cSBartosz SobczakSee your switch documentation for details. 207cdcd52d4SBartosz Sobczak.It 208cdcd52d4SBartosz SobczakThe source code for krping software is provided with the kernel in 209*777e472cSBartosz Sobczak/usr/src/sys/contrib/rdma/krping/. 210*777e472cSBartosz SobczakTo compile the software, change directory to 211*777e472cSBartosz Sobczak/usr/src/sys/modules/rdma/krping/ and invoke the following: 212cdcd52d4SBartosz Sobczak.Bl -tag -width indent 213*777e472cSBartosz Sobczak.It make clean 214*777e472cSBartosz Sobczak.It make 215*777e472cSBartosz Sobczak.It make install 216*777e472cSBartosz Sobczak.It kldload krping 217cdcd52d4SBartosz Sobczak.El 218cdcd52d4SBartosz Sobczak.It 219cdcd52d4SBartosz SobczakStart a krping server on one machine: 220*777e472cSBartosz Sobczak.Bd -literal -offset indent 221cdcd52d4SBartosz Sobczakecho size=64,count=1,port=6601,addr=100.0.0.189,server > /dev/krping 222*777e472cSBartosz Sobczak.Ed 223cdcd52d4SBartosz Sobczak.It 224cdcd52d4SBartosz SobczakConnect a client from another machine: 225*777e472cSBartosz Sobczak.Bd -literal -offset indent 226cdcd52d4SBartosz Sobczakecho size=64,count=1,port=6601,addr=100.0.0.189,client > /dev/krping 227*777e472cSBartosz Sobczak.Ed 228cdcd52d4SBartosz Sobczak.El 229cdcd52d4SBartosz Sobczak.Sh SUPPORT 230cdcd52d4SBartosz SobczakFor general information and support, go to the Intel support website at: 231cdcd52d4SBartosz Sobczak.Lk http://support.intel.com/ . 232cdcd52d4SBartosz Sobczak.Pp 233*777e472cSBartosz SobczakIf an issue is identified with this driver with a supported adapter, email all 234*777e472cSBartosz Sobczakthe specific information related to the issue to 235cdcd52d4SBartosz Sobczak.Mt freebsd@intel.com . 236cdcd52d4SBartosz Sobczak.Sh SEE ALSO 237*777e472cSBartosz Sobczak.Xr ice 4 238cdcd52d4SBartosz Sobczak.Sh AUTHORS 239cdcd52d4SBartosz Sobczak.An -nosplit 240cdcd52d4SBartosz SobczakThe 241cdcd52d4SBartosz Sobczak.Nm 242cdcd52d4SBartosz Sobczakdriver was prepared by 243cdcd52d4SBartosz Sobczak.An Bartosz Sobczak Aq Mt bartosz.sobczak@intel.com . 244