1*24f93aa0SRavi Pokala.\" 2*24f93aa0SRavi Pokala.\" SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3*24f93aa0SRavi Pokala.\" 4*24f93aa0SRavi Pokala.\" Copyright (c) 2018 Panasas 5*24f93aa0SRavi Pokala.\" All rights reserved. 6*24f93aa0SRavi Pokala.\" 7*24f93aa0SRavi Pokala.\" Redistribution and use in source and binary forms, with or without 8*24f93aa0SRavi Pokala.\" modification, are permitted provided that the following conditions 9*24f93aa0SRavi Pokala.\" are met: 10*24f93aa0SRavi Pokala.\" 1. Redistributions of source code must retain the above copyright 11*24f93aa0SRavi Pokala.\" notice, this list of conditions and the following disclaimer. 12*24f93aa0SRavi Pokala.\" 2. Redistributions in binary form must reproduce the above copyright 13*24f93aa0SRavi Pokala.\" notice, this list of conditions and the following disclaimer in the 14*24f93aa0SRavi Pokala.\" documentation and/or other materials provided with the distribution. 15*24f93aa0SRavi Pokala.\" 16*24f93aa0SRavi Pokala.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17*24f93aa0SRavi Pokala.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18*24f93aa0SRavi Pokala.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19*24f93aa0SRavi Pokala.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20*24f93aa0SRavi Pokala.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21*24f93aa0SRavi Pokala.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22*24f93aa0SRavi Pokala.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23*24f93aa0SRavi Pokala.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24*24f93aa0SRavi Pokala.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25*24f93aa0SRavi Pokala.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26*24f93aa0SRavi Pokala.\" 27*24f93aa0SRavi Pokala.\" $FreeBSD$ 28*24f93aa0SRavi Pokala.\" 29*24f93aa0SRavi Pokala.Dd March 2, 2018 30*24f93aa0SRavi Pokala.Dt IMCSMB 4 31*24f93aa0SRavi Pokala.Os 32*24f93aa0SRavi Pokala.Sh NAME 33*24f93aa0SRavi Pokala.Nm imcsmb 34*24f93aa0SRavi Pokala.Nd Intel integrated Memory Controller (iMC) SMBus controller driver 35*24f93aa0SRavi Pokala.Sh SYNOPSIS 36*24f93aa0SRavi Pokala.Cd device pci 37*24f93aa0SRavi Pokala.Cd device smbus 38*24f93aa0SRavi Pokala.Cd device imcsmb 39*24f93aa0SRavi Pokala.Pp 40*24f93aa0SRavi PokalaAlternatively, to load the driver as a module at boot time, place the following 41*24f93aa0SRavi Pokalaline in 42*24f93aa0SRavi Pokala.Xr loader.conf 5 : 43*24f93aa0SRavi Pokala.Bd -literal -offset indent 44*24f93aa0SRavi Pokalaimcsmb_load="YES" 45*24f93aa0SRavi Pokala.Ed 46*24f93aa0SRavi Pokala.Sh DESCRIPTION 47*24f93aa0SRavi PokalaThe 48*24f93aa0SRavi Pokala.Nm 49*24f93aa0SRavi Pokaladriver provides 50*24f93aa0SRavi Pokala.Xr smbus 4 51*24f93aa0SRavi Pokalasupport for the SMBus controller functionality in the integrated Memory 52*24f93aa0SRavi PokalaControllers (iMCs) embedded in Intel Sandybridge-Xeon, Ivybridge-Xeon, 53*24f93aa0SRavi PokalaHaswell-Xeon, and Broadwell-Xeon CPUs. 54*24f93aa0SRavi PokalaEach CPU implements one or more iMCs, depending on the number of cores; 55*24f93aa0SRavi Pokalaeach iMC implements two SMBus controllers (iMC-SMBs). 56*24f93aa0SRavi PokalaThe iMC-SMBs are used by the iMCs to read configuration information from the 57*24f93aa0SRavi PokalaDIMMs during POST. 58*24f93aa0SRavi PokalaThey may also be used, by motherboard firmware or a BMC, to monitor the 59*24f93aa0SRavi Pokalatemperature of the DIMMs. 60*24f93aa0SRavi Pokala.Pp 61*24f93aa0SRavi PokalaThe iMC-SMBs are 62*24f93aa0SRavi Pokala.Sy not 63*24f93aa0SRavi Pokalageneral-purpose SMBus controllers. 64*24f93aa0SRavi PokalaBy their nature, they are only ever attached to DIMMs, so they implement only 65*24f93aa0SRavi Pokalathe SMBus operations need for communicating with DIMMs. 66*24f93aa0SRavi PokalaSpecifically: 67*24f93aa0SRavi Pokala.Pp 68*24f93aa0SRavi Pokala.Bl -dash -offset indent -compact 69*24f93aa0SRavi Pokala.It 70*24f93aa0SRavi PokalaREADB 71*24f93aa0SRavi Pokala.It 72*24f93aa0SRavi PokalaREADW 73*24f93aa0SRavi Pokala.It 74*24f93aa0SRavi PokalaWRITEB 75*24f93aa0SRavi Pokala.It 76*24f93aa0SRavi PokalaWRITEW 77*24f93aa0SRavi Pokala.El 78*24f93aa0SRavi Pokala.Pp 79*24f93aa0SRavi PokalaA more detailed discussion of the hardware and driver architecture can be found 80*24f93aa0SRavi Pokalaat the top of 81*24f93aa0SRavi Pokala.Pa sys/dev/imcsmb/imcsmb_pci.c . 82*24f93aa0SRavi Pokala.Sh WARNINGS 83*24f93aa0SRavi PokalaAs mentioned above, firmware might use the iMC-SMBs to read DIMM temperatures. 84*24f93aa0SRavi PokalaThe public iMC documentation does not describe any sort of coordination 85*24f93aa0SRavi Pokalamechanism to prevent requests from different sources -- such as the motherboard 86*24f93aa0SRavi Pokalafirmware, a BMC, or the operating system -- from interfering with each other. 87*24f93aa0SRavi Pokala.Pp 88*24f93aa0SRavi Pokala.Bf Sy 89*24f93aa0SRavi PokalaTherefore, it is highly recommended that developers contact the motherboard 90*24f93aa0SRavi Pokalavendor for any board-specific instructions on how to disable and re-enable DIMM 91*24f93aa0SRavi Pokalatemperature monitoring. 92*24f93aa0SRavi Pokala.Ef 93*24f93aa0SRavi Pokala.Pp 94*24f93aa0SRavi PokalaDIMM temperature monitoring should be disabled before returning from 95*24f93aa0SRavi Pokala.Fn imcsmb_pci_request_bus , 96*24f93aa0SRavi Pokalaand re-enabled before returning from 97*24f93aa0SRavi Pokala.Fn imcsmb_pci_release_bus . 98*24f93aa0SRavi PokalaThe driver includes comments to that effect at the appropriate locations. 99*24f93aa0SRavi PokalaThe driver has been tested and shown to work, with only that type of 100*24f93aa0SRavi Pokalamodification, on certain motherboards from Intel. 101*24f93aa0SRavi Pokala.Po 102*24f93aa0SRavi PokalaUnfortunately, those modifications were based on material covered under a 103*24f93aa0SRavi Pokalanon-disclosure agreement, and therefore are not included in this driver. 104*24f93aa0SRavi Pokala.Pc 105*24f93aa0SRavi PokalaThe driver has also been tested and shown to work as-is on various motherboards 106*24f93aa0SRavi Pokalafrom SuperMicro. 107*24f93aa0SRavi Pokala.Pp 108*24f93aa0SRavi PokalaThe 109*24f93aa0SRavi Pokala.Xr smb 4 110*24f93aa0SRavi Pokaladriver will connect to the 111*24f93aa0SRavi Pokala.Xr smbus 4 112*24f93aa0SRavi Pokalainstances created by 113*24f93aa0SRavi Pokala.Nm . 114*24f93aa0SRavi PokalaHowever, since the IMC-SMBs are not general-purpose SMBus controllers, using 115*24f93aa0SRavi Pokala.Xr smbmsg 8 116*24f93aa0SRavi Pokalawith those 117*24f93aa0SRavi Pokala.Xr smb 4 118*24f93aa0SRavi Pokaladevices is not supported. 119*24f93aa0SRavi Pokala.Sh SEE ALSO 120*24f93aa0SRavi Pokala.Xr jedec_dimm 4 , 121*24f93aa0SRavi Pokala.Xr smbus 4 122*24f93aa0SRavi Pokala.Sh HISTORY 123*24f93aa0SRavi PokalaThe 124*24f93aa0SRavi Pokala.Nm 125*24f93aa0SRavi Pokaladriver first appeared in 126*24f93aa0SRavi Pokala.Fx 12.0 . 127*24f93aa0SRavi Pokala.Sh AUTHORS 128*24f93aa0SRavi PokalaThe 129*24f93aa0SRavi Pokala.Nm 130*24f93aa0SRavi Pokaladriver was originally written for Panasas by 131*24f93aa0SRavi Pokala.An Joe Kloss . 132*24f93aa0SRavi PokalaIt was substantially refactored, and this manual page was written, by 133*24f93aa0SRavi Pokala.An Ravi Pokala Aq Mt rpokala@freebsd.org 134