1.\" Copyright (c) 1998, Nicolas Souchu 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.\" $FreeBSD$ 26.\" 27.Dd November 17, 2014 28.Dt IICBUS 4 29.Os 30.Sh NAME 31.Nm iicbus 32.Nd I2C bus system 33.Sh SYNOPSIS 34.Cd "device iicbus" 35.Cd "device iicbb" 36.Pp 37.Cd "device iic" 38.Cd "device ic" 39.Cd "device iicsmb" 40.Sh DESCRIPTION 41The 42.Em iicbus 43system provides a uniform, modular and architecture-independent 44system for the implementation of drivers to control various I2C devices 45and to utilize different I2C controllers. 46.Sh I2C 47I2C is an acronym for Inter Integrated Circuit bus. 48The I2C bus was developed 49in the early 1980's by Philips semiconductors. 50Its purpose was to provide an 51easy way to connect a CPU to peripheral chips in a TV-set. 52.Pp 53The BUS physically consists of 2 active wires and a ground connection. 54The active wires, SDA and SCL, are both bidirectional. 55Where SDA is the 56Serial DAta line and SCL is the Serial CLock line. 57.Pp 58Every component hooked up to the bus has its own unique address whether it 59is a CPU, LCD driver, memory, or complex function chip. 60Each of these chips 61can act as a receiver and/or transmitter depending on its functionality. 62Obviously an LCD driver is only a receiver, while a memory or I/O chip can 63both be transmitter and receiver. 64Furthermore there may be one or 65more BUS MASTERs. 66.Pp 67The BUS MASTER is the chip issuing the commands on the BUS. 68In the I2C protocol 69specification it is stated that the IC that initiates a data transfer on the 70bus is considered the BUS MASTER. 71At that time all the others are regarded to 72as the BUS SLAVEs. 73As mentioned before, the IC bus is a Multi-MASTER BUS. 74This means that more than one IC capable of initiating data transfer can be 75connected to it. 76.Sh DEVICES 77Some I2C device drivers are available: 78.Pp 79.Bl -column "Device drivers" -compact 80.It Em Devices Ta Em Description 81.It Sy iic Ta "general i/o operation" 82.It Sy ic Ta "network IP interface" 83.It Sy iicsmb Ta "I2C to SMB software bridge" 84.El 85.Sh INTERFACES 86The I2C protocol may be implemented by hardware or software. 87Software 88interfaces rely on very simple hardware, usually two lines 89twiddled by 2 registers. 90Hardware interfaces are more intelligent and receive 918-bit characters they write to the bus according to the I2C protocol. 92.Pp 93I2C interfaces may act on the bus as slave devices, allowing spontaneous 94bidirectional communications, thanks to the multi-master capabilities of the 95I2C protocol. 96.Pp 97Some I2C interfaces are available: 98.Pp 99.Bl -column "Interface drivers" -compact 100.It Em Interface Ta Em Description 101.It Sy pcf Ta "Philips PCF8584 master/slave interface" 102.It Sy iicbb Ta "generic bit-banging master-only driver" 103.It Sy lpbb Ta "parallel port specific bit-banging interface" 104.It Sy bktr Ta "Brooktree848 video chipset, hardware and software master-only interface" 105.El 106.Sh BUS FREQUENCY CONFIGURATION 107The operating frequency of an I2C bus may be fixed or configurable. 108The bus may be used as part of some larger standard interface, and that 109interface specification may require a fixed frequency. 110The driver for that hardware would not honor an attempt to configure a 111different speed. 112A general purpose I2C bus, such as those found in many embedded systems, 113will often support multiple bus frequencies. 114.Pp 115When a system supports multiple I2C busses, a different frequency can 116be configured for each bus by number, represented by the 117.Va %d 118in the variable names below. 119Busses can be configured using any combination of device hints, 120Flattened Device Tree (FDT) data, tunables set via 121.Xr loader 8 , 122or at runtime using 123.Xr sysctl 8 . 124When configuration is supplied using more than one method, FDT and 125hint data will be overridden by a tunable, which can be overridden by 126.Xr sysctl 8 . 127.Ss Device Hints 128Set 129.Va hint.iicbus.%d.frequency 130to the frequency in Hz, on systems that use device hints to configure 131I2C devices. 132The hint is also honored by systems that use FDT data if 133no frequency is configured using FDT. 134.Ss Flattened Device Tree Data 135Configure the I2C bus speed using the FDT standard 136.Va clock-frequency 137property of the node describing the I2C controller hardware. 138.Ss Sysctl and Tunable 139Set 140.Va dev.iicbus.%d.frequency 141in 142.Xr loader.conf 5 . 143The same variable can be changed at any time with 144.Xr sysctl 8 . 145Reset the bus using 146.Xr i2c 8 147or the 148.Xr iic 4 149.Va I2CRSTCARD 150ioctl to make the change take effect. 151.Sh SEE ALSO 152.Xr bktr 4 , 153.Xr fdt 4 , 154.Xr iic 4 , 155.Xr iicbb 4 , 156.Xr lpbb 4 , 157.Xr pcf 4 , 158.Xr i2c 8 159.Sh HISTORY 160The 161.Nm 162manual page first appeared in 163.Fx 3.0 . 164.Sh AUTHORS 165This 166manual page was written by 167.An Nicolas Souchu . 168