1.\" 2.\" Copyright (c) 2019 Intel Corporation 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.\" $FreeBSD$ 26.\" 27.Dd January 22, 2020 28.Dt HWPSTATE_INTEL 4 29.Os 30.Sh NAME 31.Nm hwpstate_intel 32.Nd Intel Speed Shift Technology driver 33.Sh SYNOPSIS 34To compile this driver into your kernel 35place the following line in your kernel 36configuration file: 37.Bd -ragged -offset indent 38.Cd "device cpufreq" 39.Ed 40.Sh DESCRIPTION 41The 42.Nm 43driver provides support for hardware-controlled performance states on Intel 44platforms, also known as Intel Speed Shift Technology. 45.Sh LOADER TUNABLES 46.Bl -tag -width indent 47.It Va hint.hwpstate_intel.0.disabled 48Can be used to disable 49.Nm , 50allowing other compatible drivers to manage performance states, like 51.Xr est 4 . 52.Pq default 0 53.El 54.Sh SYSCTL VARIABLES 55The following 56.Xr sysctl 8 57values are available 58.Bl -tag -width indent 59.It Va dev.hwpstate_intel.%d.\%desc 60Describes the attached driver 61.It dev.hwpstate_intel.0.%desc: Intel Speed Shift 62.It Va dev.hwpstate_intel.%d.\%driver 63Driver in use, always hwpstate_intel. 64.It dev.hwpstate_intel.0.%driver: hwpstate_intel 65.It Va dev.hwpstate_intel.%d.\%parent 66.It dev.hwpstate_intel.0.%parent: cpu0 67The cpu that is exposing these frequencies. 68For example 69.Va cpu0 . 70.It Va dev.hwpstate_intel.%d.epp 71Energy/Performance Preference. 72Valid values range from 0 to 100. 73Setting this field conveys a hint to the hardware regarding a preference towards 74performance (at value 0), energy efficiency (at value 100), or somewhere in 75between. 76.It dev.hwpstate_intel.0.epp: 0 77.El 78.Sh COMPATIBILITY 79.Nm 80is only found on supported Intel CPUs. 81.Sh SEE ALSO 82.Xr cpufreq 4 83.Rs 84.%T "Intel 64 and IA-32 Architectures Software Developer Manuals" 85.%U "http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html" 86.Re 87.Sh AUTHORS 88This manual page was written by 89.An D Scott Phillips Aq Mt scottph@FreeBSD.org . 90